nd finally setup century as
expected.
Test results on AMD/Hygon machine show that it works as expected.
Reference:
https://www.amd.com/system/files/TechDocs/51192_Bolton_FCH_RRG.pdf
section: 3.13 Real Time Clock (RTC)
Signed-off-by: Jinke Fan
---
drivers/rtc/rtc-mc146818-lib.c | 9 +++--
inc
On 2019/10/4 4:01, Alexandre Belloni wrote:
> On 24/09/2019 10:41:08+0800, Jinke Fan wrote:
>> Signed-off-by: Jinke Fan
>> ---
>> drivers/rtc/rtc-mc146818-lib.c | 9 +++--
>> include/linux/mc146818rtc.h| 2 ++
>> 2 files changed, 9 insertions(+), 2
er writing and finally setup century as
expected.
Test results on AMD/Hygon machine show that it works as expected.
Reference:
https://www.amd.com/system/files/TechDocs/51192_Bolton_FCH_RRG.pdf
section: 3.13 Real Time Clock (RTC)
Reported-by: kbuild test robot
Signed-off-by: Jinke Fan
---
drivers/rtc/rt
er writing and finally setup century as
expected.
Test results on AMD/Hygon machine show that it works as expected.
Reference:
https://www.amd.com/system/files/TechDocs/51192_Bolton_FCH_RRG.pdf
section: 3.13 Real Time Clock (RTC)
Reported-by: kbuild test robot
Signed-off-by: Jinke Fan
---
v2->
On 2019/10/8 17:44, Alexandre Belloni wrote:
> On 08/10/2019 17:37:12+0800, Jinke Fan wrote:
>> When using following operations:
>> save_control = CMOS_READ(RTC_CONTROL);
>> -CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
>> +CMOS_WRITE((save_cont
Clock (RTC)
Reported-by: kbuild test robot
Signed-off-by: Jinke Fan
---
v3->v4:
- Limited modification to AMD EPYC(17h).
- Change the macro RTC_DV0 to RTC_DIV_RESET2.
- Make sure save_freq_select's bit4 is cleared.
v2->v3:
- Make the changes only relevant to AMD/Hygon.
v1->v2:
- Fix
er writing and finally setup century as
expected.
Test results on AMD/Hygon machine show that it works as expected.
Reference:
https://www.amd.com/system/files/TechDocs/51192_Bolton_FCH_RRG.pdf
section: 3.13 Real Time Clock (RTC)
Reported-by: kbuild test robot
Signed-off-by: Jinke Fan
---
v2->
y more suggestions?
--
Best Regards,
Jinke Fan
er writing and finally setup century as
expected.
Test results on AMD/Hygon machine show that it works as expected.
Reference:
https://www.amd.com/system/files/TechDocs/51192_Bolton_FCH_RRG.pdf
section: 3.13 Real Time Clock (RTC)
Signed-off-by: Jinke Fan
---
drivers/rtc/rtc-mc146818-lib.c | 9 +++-
On 2019/10/20 6:04, Alexandre Belloni wrote:
> On 15/10/2019 16:08:27+0800, Jinke Fan wrote:
>> save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
>> -CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
>> +
>> +#ifdef CONFIG_X86
>>
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