Hi Stephen,
Did you have any chance to take a look at v2? Do you have any remarks?
Best regards.
Marcin
2016-09-06 19:31 GMT+02:00 Marcin Wojtas :
> Hi,
>
> Here is the second version of the patchset adding fixes to CP110
> system controller clock driver. As requested during
Sure, thanks. I'll send it right away.
Best regards,
Marcin
2016-09-19 20:15 GMT+02:00 Stephen Boyd :
> On 09/19, Marcin Wojtas wrote:
>> Hi Stephen,
>>
>> Did you have any chance to take a look at v2? Do you have any remarks?
>>
>
> Hmm I don't have
_init_data
before assigning values for all gated clocks of Armada 7k/8k SoCs family.
Fixes: d3da3eaef7f4 ("clk: mvebu: new driver for Armada CP110 system ...")
Signed-off-by: Marcin Wojtas
CC:
---
drivers/clk/mvebu/cp110-system-controller.c | 2 ++
1 file changed, 2 insertions(+)
diff
gt; v2
* replace setting CLK_IS_BASIC flag with clearing init structure fields
with memset
* minor improvements of allocation and error checking
* add migration to clk_hw
Marcin Wojtas (3):
clk: mvebu: fix setting unwanted flags in CP110 gate clock
clk: mvebu: dynamically allocate resources in
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in Armada
CP110 system controller driver. This commit introduces new
API and registration for all clocks in CP110 HW blocks.
Signed-off-by: Marcin Wojtas
---
drivers/clk
by allocating resources dynamically in the
driver probe and storing it as platform drvdata.
Fixes: d3da3eaef7f4 ("clk: mvebu: new driver for Armada CP110 system ...")
Signed-off-by: Marcin Wojtas
Reviewed-by: Thomas Petazzoni
CC:
---
drivers/clk/mvebu/cp110-system-control
Hi Stephen,
2016-09-23 23:47 GMT+02:00 Stephen Boyd :
> On 09/21, Marcin Wojtas wrote:
>> @@ -203,80 +202,75 @@ static int cp110_syscon_clk_probe(struct
>> platform_device *pdev)
>> if (ret)
>> return ret;
>>
>> - cp110_clks = dev
v3 <- v2
* return -ENOMEM on alloc failures
v1 <- v2
* replace setting CLK_IS_BASIC flag with clearing init structure fields
with memset
* minor improvements of allocation and error checking
* add migration to clk_hw
Marcin Wojtas (1):
clk: mvebu: migrate CP110 system controller to c
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in Armada
CP110 system controller driver. This commit introduces new
API and registration for all clocks in CP110 HW blocks.
Signed-off-by: Marcin Wojtas
---
drivers/clk
Changelog:
v1 -> v2
* replace setting CLK_IS_BASIC flag with clearing init structure fields
with memset
* minor improvements of allocation and error checking
* add migration to clk_hw
Marcin Wojtas (3):
clk: mvebu: fix setting unwanted flags in CP110 gate clock
clk: mvebu: dynamically alloc
by allocating resources dynamically in the
driver probe and storing it as platform drvdata.
Fixes: d3da3eaef7f4 ("clk: mvebu: new driver for Armada CP110 system ...")
Signed-off-by: Marcin Wojtas
Reviewed-by: Thomas Petazzoni
CC:
---
drivers/clk/mvebu/cp110-system-control
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in Armada
CP110 system controller driver. This commit introduces new
API and registration for all clocks in CP110 HW blocks.
Signed-off-by: Marcin Wojtas
---
drivers/clk
_init_data
before assigning values for all gated clocks of Armada 7k/8k SoCs family.
Fixes: d3da3eaef7f4 ("clk: mvebu: new driver for Armada CP110 system ...")
Signed-off-by: Marcin Wojtas
CC:
---
drivers/clk/mvebu/cp110-system-controller.c | 2 ++
1 file changed, 2 insertions(+)
diff
ned-off-by: Marcin Wojtas
CC: v4.7+
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
index db1be4c..903b0f6 100644
I2C and SPI interfaces share common clock trees within the CP110 HW block.
It occurred that SPI0 interface has wrong clock assignment in the device
tree, which is fixed in this commit to a proper value.
Fixes: c749b8d9de32 ("arm64: dts: marvell: add description for the ...")
Signed-off-
Hi,
This tiny patchset comprises fixes for SPI0 interfaces in both
Armada 7k/8k CP110 HW blocks. It's split into two, because
the fix in armada-cp110-master.dtsi is applicable also on
v4.7 stable branch (cc'ed).
Any feedback would be welcome.
Best regards,
Marcin
Marcin Wojtas (2
Hi,
This short patchset introduces two enhancements to mvneta driver
TX packets concatenation support using xmit_more mechanism and also
byte queue limit in order to decrease latency on saturated links.
Any comments or feedback would be welcome.
Best regards,
Marcin
Marcin Wojtas (1):
net
mvneta driver.
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvneta.c | 22 +++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index b9dccea..bb5df35 100644
--- a
From: Simon Guinot
Basing on xmit_more flag of the skb, TX descriptors can be concatenated
before flushing. This commit delay Tx descriptor flush if the queue is
running and if there is more skb's to send.
Signed-off-by: Simon Guinot
---
drivers/net/ethernet/marvell/mvneta.c | 11 ---
HI Andrew,
2016-08-23 16:16 GMT+02:00 Andrew Lunn :
> On Tue, Aug 23, 2016 at 08:26:48AM +0200, Marcin Wojtas wrote:
>> Armada CP110 system controller comprise its own routine responsble
>> for registering gate clocks. Among others 'flags' field in
>> struct clk
From: Nadav Haklai
shci-pxav3 driver is enabling by default the
SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN quirk. However this quirk is not
required for Armada 38x and leads to wrong clock setting in the divider.
Signed-off-by: Nadav Haklai
Signed-off-by: Marcin Wojtas
Cc: # v4.2
---
drivers/mmc
oards.
The last patches enable MMC_CARD bit, using init_card() callback added to
SDHCI hosts.
Any remarks and comments are welcome.
Best regards,
Marcin
Marcin Wojtas (6):
mmc: sdhci-pxav3: fix error handling of armada_38x_quirks
mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC
mmc:
property to Armada
38x SDHCI node ('dat3-cd') with an according binding documentation update.
Signed-off-by: Marcin Wojtas
---
.../devicetree/bindings/mmc/sdhci-pxa.txt | 5 +++
drivers/mmc/host/sdhci-pxav3.c | 38 --
drivers/mmc/ho
n. It is done by using init_card()
callback.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci-pxav3.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
index ce96640..315dc4e 100644
--- a/drivers/mmc
Some sdhci hosts may require handling quirks during card initialization at
the time when its type is already known. Hence a new callback (init_card)
is added in sdhci_ops.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci.c | 9 +
drivers/mmc/host/sdhci.h | 1 +
2 files changed
-by: Marcin Wojtas
---
arch/arm/boot/dts/armada-388-gp.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/armada-388-gp.dts
b/arch/arm/boot/dts/armada-388-gp.dts
index 391dea9..4855963 100644
--- a/arch/arm/boot/dts/armada-388-gp.dts
+++ b/arch/arm/boot
In case of armada_38x_quirks error, all clocks should be cleaned-up, same
as after mv_conf_mbus_windows failure.
Signed-off-by: Marcin Wojtas
Cc: # v4.2
---
drivers/mmc/host/sdhci-pxav3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-pxav3.c b
during a resume.
This commit fixes resuming from suspend by calling MBus windows
configuration routine and therefore enabling proper DMA operation.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci-pxav3.c | 39 ---
1 file changed, 20 insertions(+), 19
From: Nadav Haklai
According to 'FE-2946959' erratum the clock inversion option is
needed to support slow frequencies when the card input hold time
requirement is high. This setting is not required for high speed
MMC and might cause timing violation.
Signed-off-by: Nadav Haklai
Cc: # v4.2
---
Hi Andrew,
2015-10-06 5:31 GMT+02:00 Andrew Lunn :
> On Tue, Oct 06, 2015 at 03:22:40AM +0200, Marcin Wojtas wrote:
>> The newest revisions of A388-GP (v1.5 and higher) support only
>> DAT3-based card detection, which is enabled by this commit. Hitherto
>> revisions, with
Andrew,
2015-10-06 16:45 GMT+02:00 Andrew Lunn :
>> I expected this patch would be controversial, hence I propose a
>> compromise: set A388-GP SDHCI to 'broken-cd' by defeault.
>
> So for boards < 1.5, you are introducing a regression. It used to work
> via GPIO. Now that is ignored and it is decl
Gregory,
2015-10-06 16:51 GMT+02:00 Gregory CLEMENT > + if (of_device_is_compatible(np, "marvell,armada-380-sdhci"))
>> + ret = mv_conf_mbus_windows(dev, pxa->mbus_win_regs,
>> +mv_mbus_dram_info());
>
> I would find it cleaner to not rely on
Gregory,
2015-10-06 17:05 GMT+02:00 Gregory CLEMENT :
> Hi,
>
> On mar., oct. 06 2015, Marcin Wojtas wrote:
>
>> Hi Andrew,
>>
>> 2015-10-06 5:31 GMT+02:00 Andrew Lunn :
>>> On Tue, Oct 06, 2015 at 03:22:40AM +0200, Marcin Wojtas wrote:
>>>&g
Gregory,
>
> Thanks for this series, it looks good I have only one or two comments.
>
> I also want to test it, how do you test the resume?
> using standby or suspend to ram (by hacking the kernel as currently we
> disbaled it) ?
>
Standby works even without the patch, as the registers' contents
This commit enables standby support on Armada 385 DB-AP board, because the PM
initalization routine requires "marvell,armada380" compatible string for all
Armada 38x-based platforms.
Signed-off-by: Marcin Wojtas
---
arch/arm/boot/dts/armada-385-db-ap.dts | 2 +-
1 file changed, 1
Some sdhci hosts may require handling quirks during card initialization at
the time when its type is already known. Hence a new callback (init_card)
is added in sdhci_ops.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci.c | 9 +
drivers/mmc/host/sdhci.h | 1 +
2 files changed
AT3-based detection is in use.
Signed-off-by: Marcin Wojtas
---
.../devicetree/bindings/mmc/sdhci-pxa.txt | 5 ++
drivers/mmc/host/sdhci-pxav3.c | 100 +
2 files changed, 87 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/b
g dat3-cd
* improve MMC_CARD bit modification - do not check Armada 38x compatible
string in pxav3_init_card callback, but use pxa->mbus_win_regs as a flag
Marcin Wojtas (5):
mmc: sdhci-pxav3: enable proper resuming on Armada 38x SoC
mmc: sdhci-pxav3: enable usage of DAT3 pin as HW ca
during a resume.
This commit fixes resuming from suspend by calling MBus windows
configuration routine and therefore enabling proper DMA operation.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci-pxav3.c | 35 ---
1 file changed, 16 insertions(+), 19
use software polling mechanism. Also a
comment is added on possible card detection options in A388-GP
DT board file.
Signed-off-by: Marcin Wojtas
Acked-by: Andrew Lunn
---
arch/arm/boot/dts/armada-388-gp.dts | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/
n. It is done by using init_card()
callback with pxa->mbus_win_regs as a flag, which notifies if Armada 38x
controller is in use.
Signed-off-by: Marcin Wojtas
---
drivers/mmc/host/sdhci-pxav3.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/mmc/host/sdhci-p
This commit adds suspend/resume support by saving and restoring registers'
state in a dedicated array.
Signed-off-by: Marcin Wojtas
---
drivers/pinctrl/mvebu/pinctrl-armada-38x.c | 37 ++
1 file changed, 37 insertions(+)
diff --git a/drivers/pinctrl/mvebu/pi
Hi Ulf,
Do you have any remarks or comments to the series?
Best regards,
Marcin
2015-10-15 18:25 GMT+02:00 Marcin Wojtas :
> Hi,
>
> Thank you for reviewing the patches. According to your remarks and some
> new ideas I prepared third patchset. I modified my HW and now I could
>
Hi Ulf
2015-10-22 15:29 GMT+02:00 Ulf Hansson :
> On 15 October 2015 at 18:25, Marcin Wojtas wrote:
>> When resuming from suspend on Armada 38x SoC MBus windows have to be
>> re-configured and for that purpose mv_conf_mbus_windows function needed
>> rework. MBus windows
MT+02:00 Russell King - ARM Linux :
> On Sat, Oct 17, 2015 at 11:28:48PM +0200, Marcin Wojtas wrote:
>> diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
>> b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
>> index 6ec82c6..094cb48 100644
>> --- a/drivers/pinctrl/mve
Hi Thomas,
2015-10-18 16:01 GMT+02:00 Thomas Petazzoni
:
> Hello Marcin,
>
> On Sun, 18 Oct 2015 10:43:42 +0200, Marcin Wojtas wrote:
>
>> Thanks for pointing this. I based on pinctrl-armada-xp.c (it needs a
>> fix then, too) and it worked. I must have missed, because I
Thomas,
2015-10-19 9:23 GMT+02:00 Thomas Petazzoni
:
> Hello,
>
> On Mon, 19 Oct 2015 08:04:49 +0200, Marcin Wojtas wrote:
>
>> > I don't like this. The mvebu_pinctrl_soc_info structure is meant to be
>> > a read-only structure that only describes static i
edback.
Best regards,
Marcin
2015-10-19 11:25 GMT+02:00 Marcin Wojtas :
> Thomas,
>
> 2015-10-19 9:23 GMT+02:00 Thomas Petazzoni
> :
>> Hello,
>>
>> On Mon, 19 Oct 2015 08:04:49 +0200, Marcin Wojtas wrote:
>>
>>> > I don't like this. The mvebu_pin
Hi Ulf,
2015-10-22 15:29 GMT+02:00 Ulf Hansson :
> On 15 October 2015 at 18:25, Marcin Wojtas wrote:
>> Marvell Armada 38x SDHCI controller enable using DAT3 pin as a hardware
>> card detection. According to the SD sdandard this signal can be used for
>> this purpose comb
Hi Thomas,
>
> @@ -550,16 +572,27 @@ static void armada_370_xp_mpic_resume(void)
> if (virq == 0)
> continue;
>
> - if (irq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
> + data = irq_get_irq_data(virq);
> +
> + if (irq !=
Thomas,
2015-10-26 1:10 GMT+01:00 Thomas Petazzoni
:
> Marcin,
>
> On Sun, 25 Oct 2015 22:22:37 +0100, Marcin Wojtas wrote:
>
>> > @@ -550,16 +572,27 @@ static void armada_370_xp_mpic_resume(void)
>> > if (virq == 0)
>>
Thomas,
2015-10-26 6:09 GMT+01:00 Thomas Petazzoni
:
> Marcin,
>
> On Mon, 26 Oct 2015 05:35:46 +0100, Marcin Wojtas wrote:
>
>> Thanks for the explanation - now it's clear.
>
> Good :-) Hopefully the explanation in PATCH 5/5 is also clear enough.
The Ascii-art is be
Hi Mikulas,
pon., 6 sie 2018 o 14:42 Robin Murphy napisał(a):
>
> On 06/08/18 11:25, Mikulas Patocka wrote:
> [...]
> >> None of this explains why some transactions fail to make it across
> >> entirely. The overlapping writes in question write the same data to
> >> the memory locations that are c
Hi Ard, Mikulas,
pon., 6 sie 2018 o 15:48 Ard Biesheuvel napisał(a):
>
> On 6 August 2018 at 15:41, Marcin Wojtas wrote:
> > Hi Mikulas,
> >
> > pon., 6 sie 2018 o 14:42 Robin Murphy napisał(a):
> >>
> >> On 06/08/18 11:25, Mikulas Patocka wrote:
&g
Ard, Mikulas,
pon., 6 sie 2018 o 22:11 Ard Biesheuvel napisał(a):
>
> On 6 August 2018 at 21:54, Mikulas Patocka wrote:
> >
> >
> > On Mon, 6 Aug 2018, Ard Biesheuvel wrote:
> >
> >> On 6 August 2018 at 19:09, Mikulas Patocka wrote:
> >> >
> >> >
> >> > On Mon, 6 Aug 2018, Ard Biesheuvel wrote:
Hi Rafael,
2018-01-24 3:08 GMT+01:00 Rafael J. Wysocki :
> On Tue, Jan 23, 2018 at 7:12 AM, Marcin Wojtas wrote:
>> Hi Rafael,
>>
>>> > if (res)
>>> > return res;
>>> >
>>> > - return device
Hi Mika,
2018-01-18 14:00 GMT+01:00 Andrew Lunn :
>> I CC'ed Mika since he is more familiar with handling these bits of ACPI
>> specs - I wonder whether this is a problem that cropped up on x86
>> systems too.
>
> Hi Lorenzo
>
> There is nothing about MDIO, PHYs, Ethernet switches, etc in version
> I tested the series on a MacchiatoBin to ensure the mvpp2 DT support was
> still working. I was able to use all supported ports as before, and saw
> no issue.
>
> For all mvpp2 patches, you can add:
>
> Tested-by: Antoine Tenart
>
> Thanks!
> Antoine
>
> On Thu,
2018-01-22 15:43 GMT+01:00 Andrew Lunn :
> On Mon, Jan 22, 2018 at 09:35:25AM -0500, David Miller wrote:
>> From: Marcin Wojtas
>> Date: Mon, 22 Jan 2018 14:00:37 +0100
>>
>> > There's a discussion about the ACPI vs generic MDIO/PHY change under
>> >
2018-01-22 16:57 GMT+01:00 David Miller :
> From: Andrew Lunn
> Date: Mon, 22 Jan 2018 15:43:42 +0100
>
>> On Mon, Jan 22, 2018 at 09:35:25AM -0500, David Miller wrote:
>>> From: Marcin Wojtas
>>> Date: Mon, 22 Jan 2018 14:00:37 +0100
>>>
>>> &g
Hi Rafael,
> > if (res)
> > return res;
> >
> > - return device_get_mac_addr(dev, "address", addr, alen);
> > + return fwnode_get_mac_addr(fwnode, "address", addr, alen);
> > +}
> > +EXPORT_SYMBOL(fwnode_get_mac_address);
>
> That should be EXPORT_SYMBOL_GPL().
Hi Andrew,
2018-01-08 16:42 GMT+01:00 Andrew Lunn :
> w> I am not familiar with MDIO, but if its similar or a specific
>> implementation of a serial bus that does sound sane!
>
Thanks for digging, I will check if and how we can use
GenericSerialBus with MDIO.
Best regards,
Marcin
> It is a tw
lable fwnodes, using the
new function described above.
Signed-off-by: Marcin Wojtas
---
drivers/base/property.c | 26
include/linux/property.h | 6 +
2 files changed, 32 insertions(+)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index adb3893..2343906 1
iver with new helper routines usage
- Improve commit log.
v1 -> v2:
* Remove MDIO patches
* Use PP2 ports only with link interrupts
* Release second region resources in mvpp2 driver (code moved from
mvmdio), as explained in details in 5/5 commit message.
Marcin Wojtas (7):
device pro
eased, before
requesting it again. The care is taken by mvpp2 driver to avoid
concurrent access to this memory region.
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 133 ++--
1 file changed, 94 insertions(+), 39 deletions(-)
diff --git a/drivers/net/ethernet/ma
-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 45 +++-
1 file changed, 24 insertions(+), 21 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index 7f42d90..f16448e 100644
--- a/drivers/net/ethernet/marvell
nodes
associated to kernel's struct platform_device.
This patch introduces new helper routine - fwnode_irq_get(),
which allows to get the IRQ number directly from the fwnode
to be used as common for OF/ACPI worlds.
Signed-off-by: Marcin Wojtas
---
drivers/base/property.c
ing in the controller's private array, whose size is now not
dynamically allocated, but fixed to MVPP2_MAX_PORTS.
This patch simplifies creating and filling list of enabled ports and
is a part of the preparation for adding ACPI support in the mvpp2 driver.
Signed-off-by: Marcin Wojtas
-
.
Signed-off-by: Marcin Wojtas
Acked-by: Rafael J. Wysocki
---
drivers/base/property.c | 24
include/linux/property.h | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index f261d1a..7c4a53d 100644
--- a
duplication.
Signed-off-by: Marcin Wojtas
Acked-by: Rafael J. Wysocki
---
drivers/base/property.c | 28 ++--
include/linux/property.h | 2 ++
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 851b1b6..f261d1a
Hi Andrew,
2018-01-17 19:11 GMT+01:00 Andrew Lunn :
> On Wed, Jan 17, 2018 at 05:55:39PM +0100, Marcin Wojtas wrote:
>> Hi,
>>
>> This is a third version of the patchset introducing mvpp2 driver ability
>> to operate with ACPI. Until follow-up generic MDIO is introduc
eased, before
requesting it again. The care is taken by mvpp2 driver to avoid
concurrent access to this memory region.
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 133 ++--
1 file changed, 94 insertions(+), 39 deletions(-)
diff --git a/drivers/net/ethernet/ma
nodes
comprising their own _CRS methods with interrupts description.
In order to be able o satisfy compilation with !CONFIG_ACPI
and also simplify the new code, introduce a helper macro
(ACPI_HANDLE_FWNODE), with which it is possible to reach
an ACPI handle directly from its fwnode.
Signed-off-by: Marcin W
-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 45 +++-
1 file changed, 24 insertions(+), 21 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index 7f42d90..f16448e 100644
--- a/drivers/net/ethernet/marvell
ing in the controller's private array, whose size is now not
dynamically allocated, but fixed to MVPP2_MAX_PORTS.
This patch simplifies creating and filling list of enabled ports and
is a part of the preparation for adding ACPI support in the mvpp2 driver.
Signed-off-by: Marcin Wojtas
-
- Update driver with new helper routines usage
- Improve commit log.
v1 -> v2:
* Remove MDIO patches
* Use PP2 ports only with link interrupts
* Release second region resources in mvpp2 driver (code moved from
mvmdio), as explained in details in 5/5 commit message.
Marcin Wojta
lable fwnodes, using the
new function described above.
Signed-off-by: Marcin Wojtas
---
drivers/base/property.c | 26
include/linux/property.h | 6 +
2 files changed, 32 insertions(+)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 1d6c9d9..613ba82 1
.
Signed-off-by: Marcin Wojtas
Acked-by: Rafael J. Wysocki
---
drivers/base/property.c | 24
include/linux/property.h | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index f261d1a..7c4a53d 100644
--- a
duplication.
Signed-off-by: Marcin Wojtas
Acked-by: Rafael J. Wysocki
---
drivers/base/property.c | 28 ++--
include/linux/property.h | 2 ++
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 851b1b6..f261d1a
2018-01-09 11:19 GMT+01:00 Graeme Gregory :
> On Mon, Jan 08, 2018 at 06:17:06PM +0100, Marcin Wojtas wrote:
>> Hi Andrew,
>>
>>
>>
>> 2018-01-08 16:42 GMT+01:00 Andrew Lunn :
>> > w> I am not familiar with MDIO, but if its similar or a specific
>>
Hi Jisheng,
śr., 12 gru 2018 o 03:48 Jisheng Zhang napisał(a):
>
> Hi,
>
> On Tue, 11 Dec 2018 13:56:49 +0100 Marcin Wojtas wrote:
>
> > Recent changes in the mvneta driver reworked allocation
> > and handling of the ingress buffers to use entire pages.
> > Apar
Hi Jisheng,
śr., 12 gru 2018 o 10:25 Jisheng Zhang napisał(a):
>
> Hi Marcin,
>
> On Wed, 12 Dec 2018 09:22:57 +0100 Marcin Wojtas wrote:
>
> > Hi Jisheng,
> >
> > śr., 12 gru 2018 o 03:48 Jisheng Zhang
> > napisał(a):
> > >
> > >
Hi Jisheng,
śr., 19 gru 2018 o 04:11 Jisheng Zhang napisał(a):
>
>
> On Mon, 17 Dec 2018 08:37:35 +0100 Thomas Petazzoni wrote:
>
> > Hello Marcin,
> >
> > On Mon, 17 Dec 2018 00:25:58 +0100, Marcin Wojtas wrote:
> >
> > > Thanks. Indeed, the patc
Hi David,
niedz., 16 gru 2018 o 21:41 David Miller napisał(a):
>
> From: Marcin Wojtas
> Date: Tue, 11 Dec 2018 13:56:49 +0100
>
> > Recent changes in the mvneta driver reworked allocation
> > and handling of the ingress buffers to use entire pages.
> > Apart from
unused frag_size field of the mvneta_port
structure.
Fixes: 562e2f467e71 ("net: mvneta: Improve the buffer allocation
method for SWBM")
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvneta.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/d
Hi Gregory,
2015-03-30 16:04 GMT+02:00 Gregory CLEMENT :
> On the Armada 375/38x/39x SoCs, in standby mode the SoC stay powered
> and it is possible to wake-up from any interrupt sources. This patch
> adds flag to the GIC irqchip driver to let linux know this.
>
> Signed-off-by: Gregory CLEMENT
>
Hi Gregory,
When I run standby on A385 I get following error:
root@localhost:~# echo standby > /sys/power/state
[ 122.889266] PM: System core suspend callback
mvebu_mbus_suspend+0x0/0xf4 failed.
Did you see this issue in your setup?
Best regards,
Marcin
2015-03-30 16:04 GMT+02:00 Gregory CLEME
Thanks, it heleped.
Best regards,
Marcin
2015-04-01 11:21 GMT+02:00 Gregory CLEMENT :
> Hi Marcin,
>
> On 01/04/2015 11:02, Marcin Wojtas wrote:
>> Hi Gregory,
>>
>> When I run standby on A385 I get following error:
>> root@localhost:~# echo standby > /
Hi Russell,
czw., 28 lut 2019 o 10:36 Russell King - ARM Linux admin
napisał(a):
>
> On Wed, Feb 27, 2019 at 06:47:32PM +0100, Marcin Wojtas wrote:
> > Current version of the driver was configuring XLG MAC
> > in a way to wait 3 IDLE frames before allowing for the
> >
ylink support")
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
index 16066c2..f1378f9 10
Hi,
czw., 11 lut 2021 o 15:19 Andrew Lunn napisał(a):
>
> On Thu, Feb 11, 2021 at 08:22:19AM +, Stefan Chulski wrote:
> >
> > >
> > > --
> > > From:
> > > Date: Wed, 10 Feb 2021 11:48:17 +0200
> > >
> > > >
> > > > +static i
add PPv23 version definition.
> > > PPv23 is new packet processor in CP115.
> > > Everything that supported by PPv22, also supported by PPv23.
> > > No functional changes in this stage.
> > >
> > > Signed-off-by: Stefan Chulski
> > > Acked-b
śr., 10 lut 2021 o 14:16 napisał(a):
>
> From: Stefan Chulski
>
> This patch enables eth0 10G interface on CN9130-DB paltforms and
> eth0 10G and eth3 10G interfaces on CN9131-DB.
Thank you.
Reviewed-by: Marcin Wojtas
>
> Signed-off-by: Stefan Chulski
> Signed-off-b
_port_config(port);
>
> - if (mvpp22_rss_is_supported())
> + if (mvpp22_rss_is_supported(port))
> mvpp22_port_rss_init(port);
>
> /* Provide an initial Rx packet size */
> @@ -6861,7 +6864,7 @@ static int mvpp2_port_probe(struct platform_device
> *pdev,
> dev->hw_features |= features | NETIF_F_RXCSUM | NETIF_F_GRO |
> NETIF_F_HW_VLAN_CTAG_FILTER;
>
> - if (mvpp22_rss_is_supported()) {
> + if (mvpp22_rss_is_supported(port)) {
> dev->hw_features |= NETIF_F_RXHASH;
> dev->features |= NETIF_F_NTUPLE;
> }
> --
> 1.9.1
>
Reviewed-by: Marcin Wojtas
Thanks!
czw., 28 sty 2021 o 17:43 Russell King - ARM Linux admin
napisał(a):
>
> On Wed, Jan 27, 2021 at 01:43:16PM +0200, stef...@marvell.com wrote:
> > Armada hardware has a pause generation mechanism in GOP (MAC).
> > The GOP generate flow control frames based on an indication programmed in
> > Ports
Hi,
wt., 2 lut 2021 o 09:17 napisał(a):
>
> From: Stefan Chulski
>
> Currently we have PP2v1 and PP2v2 hw-versions, with some different
> handlers depending upon condition hw_version = MVPP21/MVPP22.
> In a future there will be also PP2v3. Let's use now the generic
> "if equal/notEqual MVPP21" f
Hi,
wt., 2 lut 2021 o 09:17 napisał(a):
>
> From: Konstantin Porotchkin
>
> CM3 SRAM address space would be used for Flow Control configuration.
>
> Signed-off-by: Stefan Chulski
> Signed-off-by: Konstantin Porotchkin
> ---
> arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 ++
> 1
Hi,
wt., 2 lut 2021 o 09:18 napisał(a):
>
> From: Stefan Chulski
>
> The firmware needs to monitor the RX Non-occupied descriptor
> bits for flow control to move to XOFF mode.
> These bits need to be unmasked to be functional, but they will
> not raise interrupts as we leave the RX exception sum
Hi,
wt., 2 lut 2021 o 09:17 napisał(a):
>
> From: Stefan Chulski
>
> This patch add PPv23 version definition.
> PPv23 is new packet processor in CP115.
> Everything that supported by PPv22, also supported by PPv23.
> No functional changes in this stage.
>
> Signed-off-by: Stefan Chulski
> ---
>
Hi,
wt., 2 lut 2021 o 09:17 napisał(a):
>
> From: Stefan Chulski
>
> Armada hardware has a pause generation mechanism in GOP (MAC).
> The GOP generate flow control frames based on an indication programmed in
> Ports Control 0 Register. There is a bit per port.
> However assertion of the PortX
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