Re: [PATCH v2 1/4] pwm: Add support for Meson PWM Controller

On Sun, Jul 10, 2016 at 11:24 AM, Neil Armstrong wrote: > Add support for the PWM controller found in the Amlogic SoCs. > This driver supports the Meson8b and GXBB SoCs. > > Signed-off-by: Neil Armstrong > --- > drivers/pwm/Kconfig | 9 + >

Re: [PATCH 10/14] phy: meson8b-usb2: simplify optional reset handling

_reset unconditionally. > > Signed-off-by: Philipp Zabel <p.za...@pengutronix.de> Acked-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> (based on reading the code along with the highly appreciated changes from bb475230b8e5) > Cc: Martin Blumenstingl <ma

Re: [PATCH] reset: fix shared reset triggered_count decrement on error

able to trigger > it again. > > Fixed be removing negation in from of the error code of the reset function. > > Fixes: 7da33a37b48f ("reset: allow using reset_control_reset with shared > reset") > > Signed-off-by: Jerome Brunet <jbru...@baylibre.com> Acked-b

Re: [PATCH v3 1/4] pwm: Add support for Meson PWM Controller

I have tested it with the updated Neil sent today: [0] This is still working fine for me (driving the LPO clock of an AP6330 SDIO wifi chip). Please note that I don't have a scope to measure the actual signal, but I guess it's fine since my AP6330 is happy. So feel free to keep my: Tested-by: Mart

Re: [PATCH] phy: meson-usb2: Fix build dependency

Hi Axel, On Fri, Sep 16, 2016 at 4:07 AM, Axel Lin wrote: > of_usb_get_dr_mode_by_phy will not be compiled if !USB_COMMON, fix below > build error: > > drivers/built-in.o: In function `phy_meson_usb2_probe': > debugfs.c:(.text+0x76b4): undefined reference to

Re: [PATCH v3 3/4] ARM64: dts: meson-gxbb: Add Meson GXBB PWM Controller nodes

compatible = "amlogic,meson-gxbb-pwm"; > + reg = <0x0 0x086c0 0x0 0x10>; > + #pwm-cells = <3>; > + status = "disabled"; > + };

Re: [PATCH v3 1/4] pwm: Add support for Meson PWM Controller

AP6330 SDIO wifi module with this on my meson-gxbb-vega-s95-meta clone, which uses pwm_e to generate the LPO clock for the wifi module (see [0] for the corresponding patches). So thank you Neil, and: Tested-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> [0] https://github.c

Re: net: stmmac: Meson GXBB: attempting to execute userspace memory

Hello Heinrich, On Sat, Nov 26, 2016 at 8:53 AM, Heinrich Schuchardt wrote: > For Odroid C2 I have compiled kernel > 4.9.0-rc6-next-20161124-1-gbf7e142 > with one additional patch >

Re: [PATCH v2 1/2] ARM64: dts: Add support for Meson GXM

5D p23x and S912 q20x boards. > > Then adds a meson-gxm dtsi and reproduce the P23x to Q20x boards > dts files since the S905D and S912 SoCs shares the same pinout > and the P23x and Q20x boards are identical. > > Signed-off-by: Neil Armstrong <narmstr...@baylibre.com> Tes

Re: [RFC PATCH net v2 0/3] Fix OdroidC2 Gigabit Tx link issue

Hi Jerome, On Mon, Nov 21, 2016 at 4:35 PM, Jerome Brunet wrote: > This patchset fixes an issue with the OdroidC2 board (DWMAC + RTL8211F). > Initially reported as a low Tx throughput issue at gigabit speed, the > platform enters LPI too often. This eventually break the

Re: [RFC PATCH net v2 0/3] Fix OdroidC2 Gigabit Tx link issue

On Thu, Nov 24, 2016 at 5:01 PM, Jerome Brunet <jbru...@baylibre.com> wrote: > On Thu, 2016-11-24 at 15:40 +0100, Martin Blumenstingl wrote: >> Hi Jerome, >> >> On Mon, Nov 21, 2016 at 4:35 PM, Jerome Brunet <jbru...@baylibre.com> >> wrote: >> > >

Re: [PATCH v2] ARM64: dts: meson-gxbb-odroidc2: Disable SCPI DVFS

Hi Neil, (adding Brian Kim, one of the Hardkernel developers to this conversation) On Fri, Jan 6, 2017 at 9:04 AM, Neil Armstrong wrote: > The current hardware is not able to run with all cores enabled at a > cluster frequency superior at 1536MHz. > But the currently

Re: [PATCH net-next v3 0/4] Fix OdroidC2 Gigabit Tx link issue

Hi Florian, Hi Jerome, On Wed, Nov 30, 2016 at 2:15 AM, Florian Fainelli wrote: > On 11/29/2016 05:13 PM, David Miller wrote: >> From: Florian Fainelli >> Date: Tue, 29 Nov 2016 16:43:20 -0800 >> >>> On 11/29/2016 04:38 PM, David Miller wrote:

Re: [RFT PATCH 5/6] pinctrl: meson: use gpio-ranges from DT

Hi Neil, On Thu, Mar 23, 2017 at 5:27 PM, Neil Armstrong wrote: > When trying to add a gpio-hog, we enter a weird loop where the gpio-ranges > is needed when gpiochip_add_data() is called but in the current implementation > the ranges are added from the driver

Re: [PATCH v2,1/3] meson_uart: expose CLKID_UARTx

Hi Jerome, On Tue, Mar 28, 2017 at 9:14 PM, Jerome Brunet wrote: > On Tue, 2017-03-28 at 20:18 +0200, Helmut Klein wrote: >> i know for sure that the bluetooth chip of my system is connected to >> uart_A. so this clock must be exposed. >> >> i don't know if the other 2

Re: [PATCH] ARM64: dts: meson-gxbb-odroidc2: enable USB Host Nodes

Hi Anand, On Thu, Mar 9, 2017 at 6:58 PM, Anand Moon wrote: >> Hi Anand, >> >> For this specific use case, the only way to manage this is to use the >> Work-In-Progress >> Power Sequence Library proposer by Peter Chen at : >> https://lkml.org/lkml/2016/11/13/315 >> >>

Re: [PATCH v2 4/4] clk: meson: gxbb-aoclk: Add CEC 32k clock

Hi Neil, thanks for these patches, CEC support is another good step! On Fri, Jul 28, 2017 at 11:53 AM, Neil Armstrong wrote: > The CEC 32K AO Clock is a dual divider with dual counter to provide a more > precise 32768Hz clock for the CEC subsystem from the external

[PATCH] dt-bindings: regulator: pwm-regulator: fix example syntax

The "Continuous Voltage" example specifies a pwm-dutycycle-range. However, an equal sign is missing between the property name and value. Fix this to allow copy and paste from the documentation when writing an own .dts file with a pwm-regulator. Signed-off-by: Martin Blumenstingl <mar

Re: [PATCH] iio: adc: meson-saradc: add NULL check on of_match_device() return value

stavo A. R. Silva <garsi...@embeddedor.com> thanks for finding this. a crash here is a rather theoretical problem (since all compatible strings have their corresponding match data) - but it doesn't hurt either, so: Acked-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> > --

Re: [PATCH] ARM64: meson-gxl: disable broken eee

On Mon, Jul 24, 2017 at 6:09 PM, Jerome Brunet wrote: > On Mon, 2017-07-24 at 14:26 +0200, Neil Armstrong wrote: >> On 07/24/2017 02:06 PM, Neil Armstrong wrote: >> > On 07/23/2017 07:03 PM, Joseph Kogut wrote: >> > > Hi Kevin, >> > > >> > > I tested on a P212 reference

Re: [PATCH v3.1 0/3] soc: amlogic: Add Amlogic SoC Information driver

Hi Kevin, On Fri, Jun 23, 2017 at 10:28 AM, Neil Armstrong wrote: > Amlogic SoCs have a SoC information register for SoC type, package type and > revision information. > This patchset adds support for this register decoding and exposing with the > SoC bus infrastructure,

Re: [PATCH v2 4/4] clk: meson: gxbb-aoclk: Add CEC 32k clock

Hi Neil, On Fri, Jul 28, 2017 at 4:09 PM, Neil Armstrong <narmstr...@baylibre.com> wrote: > On 07/28/2017 12:29 PM, Martin Blumenstingl wrote: >> Hi Neil, >> >> thanks for these patches, CEC support is another good step! > > Hi Martin, > > Thanks for your

Re: [PATCH v2 06/18] arm64: dts: meson-gxl-s905x-khadas-vim: Fix Wifi node name

On Sat, May 13, 2017 at 4:33 PM, Andreas Färber <afaer...@suse.de> wrote: > bcrmf -> brcmf -> wifi > > Fixes: e15d2774b8c0 ("ARM64: dts: meson-gxl: add support for the Khadas VIM > board") > Cc: Martin Blumenstingl <martin.blumensti...@googlemail.com

Re: [PATCH v2 00/18] ARM64: meson: DT cleanups

On Mon, May 15, 2017 at 9:10 PM, Andreas Färber wrote: > Hi Neil, > > Am 15.05.2017 um 10:16 schrieb Neil Armstrong: >> Hi Andreas, >> >> On 05/13/2017 04:33 PM, Andreas Färber wrote: >>> Hello Kevin, >>> >>> This series fixes several cosmetic issues, on top of your for-next

Re: [PATCH v4 6/7] ARM: dts: meson8: switch to new bindings for UART nodes

Hi Neil, On Fri, Jun 9, 2017 at 11:49 AM, Neil Armstrong wrote: > Switch to the stable UART bindings by adding a XTAL node and using the > proper compatible strings. unfortunately this won't apply now that Kevin has merged my "ARM: dts: meson8: add and use the real clock

Re: [PATCH] iio: adc: meson-saradc: use NULL instead of 0 for pointer

roviding a patch to fix it) this looks good to me, so: Acked-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> if you can wait until next weekend then I can also test this on real hardware. > Jonathan >> --- >> drivers/iio/adc/meson_saradc.c | 2 +- >

Re: [PATCH] iio: adc: meson-saradc: use NULL instead of 0 for pointer

Hi Paolo, Hi Jonathan, On Sat, Jun 3, 2017 at 10:52 AM, Jonathan Cameron <ji...@kernel.org> wrote: > On Sun, 28 May 2017 23:17:57 +0200 > Martin Blumenstingl <martin.blumensti...@googlemail.com> wrote: > >> Hi Paolo, Hi Jonathan, >> >> On Sun, May 28

Re: [PATCH v4 6/7] ARM: dts: meson8: switch to new bindings for UART nodes

On Sat, Jun 10, 2017 at 12:37 AM, Martin Blumenstingl <martin.blumensti...@googlemail.com> wrote: > Hi Neil, > > On Fri, Jun 9, 2017 at 11:49 AM, Neil Armstrong <narmstr...@baylibre.com> > wrote: >> Switch to the stable UART bindings by adding a XTAL node and

Re: [PATCH v3 2/4] dt-binding: meson_uart: add documentation for the UARTs of amlogic

Hi Helmut, On Fri, Mar 31, 2017 at 6:54 PM, Helmut Klein wrote: > Add the documentation for the device tree binding of meson_uart > > Signed-off-by: Helmut Klein > --- > .../bindings/serial/amlogic,meson_uart.txt | 30 >

Re: [PATCH 1/2] ARM64: dts: meson-gxm: Add Vega S96 board

Hi Neil, On Tue, Sep 19, 2017 at 2:05 PM, Neil Armstrong wrote: > The Tronsmart Vega S96 is a TV box derived from Amlogic q200 reference design. > > Cc: supp...@tronsmart.com > Signed-off-by: Oleg > Signed-off-by: Neil Armstrong

Re: [PATCH 2/2] ARM64: dts: meson-gxm: Add support for Khadas VIM2

-$(CONFIG_ARCH_MESON) += meson-gxm-nexbox-a1.dtb > dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb > dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts > b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vi

Re: [PATCH] nvmem: meson: use generic compatible

Hi Jerome, On Thu, Oct 12, 2017 at 5:24 PM, Jerome Brunet wrote: > The meson efuse driver seems to be compatible with more SoCs than > initially thought. Let's use the most generic compatible he have in > DT instead of the gxbb specific one > > Signed-off-by: Jerome Brunet

Re: [PATCH 11/12] nvmem: meson-efuse: indicate that this driver is only for Meson GX SoCs

On Mon, Oct 9, 2017 at 3:26 PM, <srinivas.kandaga...@linaro.org> wrote: > From: Martin Blumenstingl <martin.blumensti...@googlemail.com> > > The current Amlogic Meson eFuse driver only supports the 64-bit SoCs > (GXBB and newer). Older SoCs cannot be supported by the same

Re: [PATCH 10/12] dt-bindings: nvmem: Describe the Amlogic Meson6/Meson8/Meson8b efuse

On Mon, Oct 9, 2017 at 3:26 PM, <srinivas.kandaga...@linaro.org> wrote: > From: Martin Blumenstingl <martin.blumensti...@googlemail.com> > > Amlogic Meson6, Meson8 and Meson8b SoCs have an efuse which contains > calibration data from the factory (for the internal tempe

Re: [PATCH] ARM: dts: meson8b: add reserved memory zone to fix silent freezes

gt; boards") > Signed-off-by: Linus Lüssing <linus.luess...@c0d3.blue> Acked-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> > > --- > The following stress-ng command worked fine now: > $ stress-ng -v --sequential 0 -t 120s --exclude sysfs,opcode --metri

Re: linux-next: Signed-off-by missing for commits in the mips tree

Hi Hauke, Hi Ralf, On Sun, Sep 3, 2017 at 6:13 PM, Stephen Rothwell wrote: > Hi all, > > Commits > > bb19a5e5205b MIPS: lantiq: Remove the arch/mips/lantiq/xway/reset.c > implementation > f6a4de1654c9 MIPS: lantiq: Add a GPHY driver which uses the RCU syscon-mfd >

Re: [PATCH 2/5] i2c: meson: add configurable divider factors

On Fri, Nov 17, 2017 at 9:02 AM, Yixun Lan wrote: > From: Jian Hu > > This patch try to add support for I2C controller in Meson-AXG SoC, > Due to the IP changes between I2C controller, we need to introduce > a compatible data to make the divider factor

Re: [PATCH v4 2/4] iio: adc: meson-saradc: remove irrelevant clock "sana"

n <xingyu.c...@amlogic.com> > Signed-off-by: Yixun Lan <yixun@amlogic.com> Reviewed-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> Jonathan, we'll let you know once it's time to apply this (without the previous patches we would break the ADC on t

Re: [PATCH v4 0/4] fix the clock setting for SAR ADC

Hi Yixun, On Tue, Nov 7, 2017 at 10:36 PM, Martin Blumenstingl <martin.blumensti...@googlemail.com> wrote: > Hi Yixun, > > On Tue, Nov 7, 2017 at 3:09 PM, Yixun Lan <yixun@amlogic.com> wrote: >> patch [1/4]: >> Fix wrong SARADC/SANA clock gate bit in

Re: [PATCH v4 4/4] ARM64: dts: meson: drop "sana" clock from SAR ADC

pull requests for the 32-bit and 64-bit .dts changes, so patches should also follow that schema with that fixed, you can add my ACK on both (32-bit and 64-bit) .dts patches: Acked-by: Martin Blumenstingl<martin.blumensti...@googlemail.com> > arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 3

Re: [PATCH v3 3/4] dt-bindings: iio: adc: update the doc for SAR ADC

igned-off-by: Yixun Lan <yixun@amlogic.com> Acked-by: Martin Blumenstingl<martin.blumensti...@googlemail.com> > --- > Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt | 1 - > 1 file changed, 1 deletion(-) > > diff --git > a/Documentation/device

Re: [PATCH v4] tty: serial: meson: allow baud-rates lower than 9600

Hi Thomas, thank you for this patch! On Sun, Nov 5, 2017 at 3:12 PM, Greg Kroah-Hartman wrote: > On Sun, Nov 05, 2017 at 05:29:30AM +0100, Thomas Rohloff wrote: >> Devices like DCF77 receivers need the baud-rate to be as low as 50. >> >> I have tested this on a Meson

Re: [PATCH] ARM: meson: fix spelling mistake: "Couln't" -> "Couldn't"

On Thu, Nov 2, 2017 at 10:27 AM, Colin King <colin.k...@canonical.com> wrote: > From: Colin Ian King <colin.k...@canonical.com> > > Trivial fix to spelling mistake in pr_err error message > > Signed-off-by: Colin Ian King <colin.k...@canonical.com> Acked-by: Mart

Re: [PATCH v4 0/4] fix the clock setting for SAR ADC

Hi Yixun, On Tue, Nov 7, 2017 at 3:09 PM, Yixun Lan wrote: > patch [1/4]: > Fix wrong SARADC/SANA clock gate bit in Meson-GXBB/GXL, > the published datasheets[4] also has wrong description about this. > This patch should be explicitly merged *before* other patches. > >

Re: AXP803 I2C support / AXP devicetree-bindings

Hi ChenYu, On Tue, Nov 7, 2017 at 4:13 AM, Chen-Yu Tsai <w...@csie.org> wrote: > On Tue, Nov 7, 2017 at 6:39 AM, Martin Blumenstingl > <martin.blumensti...@googlemail.com> wrote: >> Hello, >> >> recently I discovered that there are some X-Powers AXP chips t

Re: [PATCH] clk: meson: gxbb: fix wrong clock for SARADC/SANA

Hi Yixun, On Mon, Nov 6, 2017 at 10:31 AM, Yixun Lan wrote: > Hi Neil: > > > On 11/06/17 16:57, Neil Armstrong wrote: >> On 06/11/2017 08:52, Yixun Lan wrote: >>> According to the datasheet, in Meson-GXBB/GXL series, >>> The clock gate bit for SARADC is HHI_GCLK_MPEG2

AXP803 I2C support / AXP devicetree-bindings

Hello, recently I discovered that there are some X-Powers AXP chips that support both, Allwinner's own "RSB" as well as the I2C ("TWSI" in the datasheet) busses. one chip that supports both interfaces is the AXP803 the datasheet is linked in the public PINE64 wiki: [1] (direct link: [0])

Re: [PATCH v2 2/2] usb: dwc3: support clocks and resets for DWC3 core

(adding Yixun from Amlogic to this mail) On Sat, Apr 28, 2018 at 4:41 AM, Masahiro Yamada <yamada.masah...@socionext.com> wrote: > Hi Martin, > > > 2018-04-24 2:44 GMT+09:00 Martin Blumenstingl > <martin.blumensti...@googlemail.com>: >> Hello, >> >&

Re: [reset-control] How to initialize hardware state with the shared reset line?

on is moved from device-tree to the reset controller driver) any "chip" specific differences could be expressed by using a different of_device_id one the other hand: your "reset hog" solution looks fine to me if reset lines can be board specific > From the discussion with M

Re: [reset-control] How to initialize hardware state with the shared reset line?

Hello, On Mon, May 21, 2018 at 3:27 AM, Masahiro Yamada <yamada.masah...@socionext.com> wrote: > Hi. > > > 2018-05-20 19:57 GMT+09:00 Martin Blumenstingl > <martin.blumensti...@googlemail.com>: >> Hi, >> >> On Thu, May 10, 2018 at 11:16 AM, Masahiro Ya

Re: [PATCH v2 1/2] clk: meson: mpll: add round closest support

u...@baylibre.com> Acked-by: Martin Blumenstingl<martin.blumensti...@googlemail.com> I gave it a quick spin on Odroid-C1 (which uses an RGMII Ethernet PHY and the RGMII TX clock is supplied by MPLL2). the clock tree looks fine and Ethernet is still working: mpll2_div

Re: [reset-control] How to initialize hardware state with the shared reset line?

Hi Philipp, On Tue, May 22, 2018 at 4:04 PM, Philipp Zabel <p.za...@pengutronix.de> wrote: > Hi Martin, > > On Mon, 2018-05-21 at 12:40 +0200, Martin Blumenstingl wrote: >> Hello, >> >> On Mon, May 21, 2018 at 3:27 AM, Masahiro Yamada >> <yam

Re: [PATCH] ARM64: dts: meson-gxl-s905x-p212: Add phy-supply for usb0

oller") > Signed-off-by: Neil Armstrong Acked-by: Martin Blumenstingl out of curiosity: I guess you tested this using u-boot? if anyone else is interested: the only other way to test this is by ensuring that the hdmi_5v regulator is turned off by Linux (by removing it from the HDMI nodes) and t

Re: [PATCH 1/2] dt-bindings: nand: meson: add Amlogic NAND controller driver

Hello Yixun, Hello Liang, I have a few small comments inline below additionally I tried to explain the reason behind "amlogic,mmc-syscon", clkin0 and clkin1 so Rob (or the devicetree maintainers in general) can give feedback. feel free to correct me wherever I'm wrong or provide additional notes

Re: [PATCH v2 2/2] net: stmmac: dwmac-meson: extend phy mode setting

PRG_ETH0_EXT_PHY_MODE_MASK, > + PRG_ETH0_EXT_RGMII_MODE); > + break; > + case PHY_INTERFACE_MODE_RMII: > + /* disable RGMII mode -> enables RMII mode */ if you have to re-send it for whatever r

Re: [PATCH v2 3/5] ARM64: dts: meson-axg: uart: Add the pinctrl info description

Hi Yixun, On Sat, Jan 6, 2018 at 1:10 AM, Yixun Lan wrote: > Describe the pinctrl info for the UART controller which is found > in the Meson-AXG SoCs. > > Signed-off-by: Yixun Lan > --- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 97 >

Re: [PATCH 08/19] clk: meson: add regmap to the clock controllers

e-spin this series > Signed-off-by: Jerome Brunet <jbru...@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> > --- > drivers/clk/meson/Kconfig | 2 ++ > drivers/clk/meson/axg.c | 15 ++- > drivers/clk/meson/gxbb.c| 33 +++

Re: [PATCH 18/19] clk: meson: remove obsolete cpu_clk

quot;old" clk-cpu implementation. the new code still seem to lock up in some cases, but now always (so I call it an improvement) > Signed-off-by: Jerome Brunet <jbru...@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> > --- > drivers/clk/meson/

Re: [PATCH 17/19] clk: meson: rework meson8b cpu clock

r patch doesn't fully solve this (I still get some lock-ups), but I still think it's a step forward! > Signed-off-by: Jerome Brunet <jbru...@baylibre.com> I have some minor comments below, with these addressed: Reviewed-by: Martin Blumenstingl <martin.blumensti...@go

Re: [PATCH v2 17/19] clk: meson: rework meson8b cpu clock

any change of the cpu clock > > The notifier and read-write operation will be added back when we have a > solution to the problem. > > Cc: Martin Blumenstingl <martin.blumensti...@googlemail.com> > Signed-off-by: Jerome Brunet <jbru...@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> thank you Jerome!

Re: [PATCH 2/5] pinctrl: meson: Add support to set direction with a secure monitor call

On Thu, Aug 2, 2018 at 1:21 PM Jerome Brunet wrote: > > On Thu, 2018-08-02 at 09:52 +0200, Neil Armstrong wrote: > > On 01/08/2018 22:23, Martin Blumenstingl wrote: > > > Hi Neil, > > > > > > On Wed, Aug 1, 2018 at 12:05 PM Neil Armstrong > >

Re: [PATCH 2/5] pinctrl: meson: Add support to set direction with a secure monitor call

Hi Neil, On Wed, Aug 1, 2018 at 12:05 PM Neil Armstrong wrote: > > The Amlogic Meson GX and AXG SoCs needs to do a Secure Monitor call to > set the TEST_N pin direction. > This patch adds a "smc" boolean to the bank structure to differentiate > the TEST_N bank and call the Secure Monitor in the

Re: [PATCH v2 0/4] clk: meson: clk-pll driver update

: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary > clk: meson: clk-pll: remove od parameters > clk: meson: clk-pll: drop hard-coded rates from pll tables for the whole series: Reviewed-by: Martin Blumenstingl as well as: Tested-by: Martin Blumenstingl (tested on Meson8b / Odroid-C1, even CPU frequency scaling still works with my out-of-tree patches) Regards Martin

Re: [PATCH 4/9] mmc: meson-mx-sdio: fix OF child-node lookup

ing of_get_compatible_child is also backported do we have to inform Greg somehow? > Cc: Carlo Caione > Cc: Martin Blumenstingl > Cc: Ulf Hansson > Signed-off-by: Johan Hovold Acked-by: Martin Blumenstingl Regards Martin

Re: [PATCH 1/2] clk: meson: Add vid_pll divider driver

Hi Neil, On Fri, Jul 20, 2018 at 11:40 AM Neil Armstrong wrote: > > Add support the VID_PLL fully programmable divider used right after the > HDMI PLL clock source. It is used to achieve complex fractional division > with a programmble bitfield. I assume you have no other information that the

Re: [PATCH 2/2] clk: meson-gxbb: Add video clocks

Hi Neil, On Fri, Jul 20, 2018 at 11:40 AM Neil Armstrong wrote: > > Add the clocks entries used in the video clock path, the clock path > is doubled to permit having different synchronized clocks for different > parts of the video pipeline. maybe you can add the comment about

Re: [PATCH 00/14] arm64: dts: meson-axg: add audio support

Hi Jerome, On Tue, Jul 24, 2018 at 2:53 PM Jerome Brunet wrote: > > The main purpose of this patchset is to add the audio devices on amlogic's > AXG SoCs. > > Some codecs require some power supplies. This is why the 3 first patches > deal with the S400 power supplies, even if some are not

Re: [PATCH 10/14] arm64: dts: meson-axg: add linein codec

Hi Jerome, On Tue, Jul 24, 2018 at 3:09 PM Jerome Brunet wrote: > > Add the es7241 analog to digital converter which is fed by the > lienin jack of the s400 > > Signed-off-by: Jerome Brunet > --- > arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 10 ++ > 1 file changed, 10

Re: [PATCH 00/14] arm64: dts: meson-axg: add audio support

Hi Jerome, On Wed, Jul 25, 2018 at 11:19 PM wrote: > > On Wed, 2018-07-25 at 21:11 +0200, Martin Blumenstingl wrote: > > nit-pick: one patch uses "arm64: dts: meson-axg: s400" in the subject > > while other patches that are touching the s400 board aren't > >

Re: [PATCH 3/3] clk: meson: clk-pll: drop hard-coded rates from pll tables

On Thu, Jul 19, 2018 at 10:44 AM Neil Armstrong wrote: > > On 17/07/2018 11:56, Jerome Brunet wrote: > > Putting hard-coded rates inside the parameter tables assumes that > > the parent is known and will never change. That's a big assumption > > we should not make. > > > > We have everything we

Re: [PATCH 2/3] clk: meson: clk-pll: remove od parameters

Hi Jerome, On Sat, Jul 21, 2018 at 10:42 PM Jerome Brunet wrote: > > On Sat, 2018-07-21 at 22:01 +0200, Martin Blumenstingl wrote: > > > +static struct clk_regmap gxbb_hdmi_pll_od = { > > > + .data = &(struct clk_regmap_div_data){ > > > +

Re: [PATCH 2/3] clk: meson: clk-pll: remove od parameters

Hi Jerome, On Tue, Jul 17, 2018 at 11:56 AM Jerome Brunet wrote: > > Remove od parameters from pll clocks and add post dividers clocks > instead. Some clock, especially the one which feature several ods, > may provide output between those ods. Also, some drivers, such > as the hdmi driver, may

Re: [PATCH 1/3] clk: meson: clk-pll: add enable bit

e questions inline, but with those answered: Acked-by: Martin Blumenstingl > --- > drivers/clk/meson/axg.c | 28 --- > drivers/clk/meson/clk-pll.c | 47 > - > drivers/clk/meson/clkc.h| 1 + &g

Re: [PATCH 0/3] clk: meson: clk-pll driver update

Hi Jerome, On Tue, Jul 17, 2018 at 11:56 AM Jerome Brunet wrote: > > This patchset is yet another round of update to the amlogic pll driver. > > 1) Enable bit is added so we don't rely on the bootloader or the init > value to enable to pll device. > 2) OD post dividers are removed from the

Re: [PATCH 3/3] clk: meson: clk-pll: drop hard-coded rates from pll tables

Hi Jerome, On Sat, Jul 21, 2018 at 10:46 PM Jerome Brunet wrote: > > On Sat, 2018-07-21 at 22:16 +0200, Martin Blumenstingl wrote: > > > We could even add ranges instead of table when we know the PLL supports a > > > well-known continuous dividers range. > > &

Re: [PATCH 1/3] dt-bindings: clk: g12a: New binding for Meson-G12A SoC

On Wed, Jul 11, 2018 at 3:06 PM Jian Hu wrote: > > > > On 2018/7/10 17:29, Jerome Brunet wrote: > > On Mon, 2018-07-09 at 19:12 +0800, Jian Hu wrote: > >> Add new binding for Meson-G12A SoC Everything-Else part > > > > nitpick: I would prefer if the words 'clock' and 'controller' was somewhere >

Re: [PATCH 0/3] pinctrl: meson-g12a: add pinctrl driver support

On Tue, Jul 10, 2018 at 12:07 AM Martin Blumenstingl wrote: > > Hi Linus, > > On Mon, Jul 9, 2018 at 3:35 PM Linus Walleij wrote: > > > > On Wed, Jul 4, 2018 at 4:48 PM Yixun Lan wrote: > > > > > > This patch series try to add pinctrl d

Re: [PATCH 1/3] soc: amlogic: Add Meson GX Clock Measure driver

Hi Neil, On Wed, Jul 11, 2018 at 10:37 AM Neil Armstrong wrote: > > On 09/07/2018 23:41, Kevin Hilman wrote: > > Martin Blumenstingl writes: > > > >> Hi Neil, > >> > >> On Wed, Jul 4, 2018 at 10:41 AM Neil Armstrong > >> wrote: > >

Re: [PATCH 2/3] dt-bindings: pinctrl: meson-g12a: document pin name

commit message) stating that GPIOE is actually located (checked with the ASIC / hardware team) in the AO bank > Signed-off-by: Yixun Lan with that: Acked-by: Martin Blumenstingl > --- > include/dt-bindings/gpio/meson-g12a-gpio.h | 114 + > 1 file changed, 114 inser

Re: [PATCH 3/3] pinctrl: meson-g12a: add pinctrl driver support

uot;HIZ" line of the the pwm_ao_a controller) -> to have a consistent naming it would either have to be "uart_ao_a_rx" or "pwm_hiz_ao_a" > Signed-off-by: Yixun Lan with the few notes fixed (see below): Acked-by: Martin Blumenstingl > --- > drivers/pinctrl/meson/K

Re: [PATCH] ARM64: dts: meson-gxbb-wetek: add ttyAML1 uart for Bluetooth

Hi Christian, On Tue, Sep 4, 2018 at 4:47 PM chewitt wrote: > > This change adds the ttyAML1 uart used by the brmcfmac sdio module in > the WeTek Hub and WeTek Play 2 devices. do you know which Broadcom chip this is exactly? I assume you want to use the "patchram" userspace program (or

Re: [PATCH] arm64: dts: meson-axg: use the proper compatible for ethmac

On Mon, Sep 10, 2018 at 8:39 PM Neil Armstrong wrote: > > Use the correct compatible for the AXG ethernet mac node. > > Signed-off-by: Neil Armstrong I wonder if you should add a "Fixes" tag. apart from that: Acked-by: Martin Blumenstingl

Re: [PATCH v2] ARM64: dts: meson-gxbb-wetek: add ttyAML1 uart for Bluetooth

Hi Rob, On Fri, Sep 7, 2018 at 2:16 PM Christian Hewitt wrote: > > This change adds the uart_A used by the brmcfmac sdio module in the > WeTek Hub and WeTek Play 2 devices. meson_uart_probe seems to mandate > an alias (without it, BT is not working) so this is also included. > > Signed-off-by:

Re: [PATCH] arm64: dts: meson-axg-s400: Add chosen and memory nodes

thout it you can't use earlycon (without parameters) Acked-by: Martin Blumenstingl

Re: [PATCH 1/2] Revert "tick: Prefer a lower rating device only if it's CPU local device"

tead of cpu_possible_mask. > > > > Cc: Thomas Gleixner > > Signed-off-by: Sudeep Holla > > Tested-by: Kevin Hilman Tested-by: Martin Blumenstingl > And verified to fix a regression on the 32-bit ARM platform mesion8b-odroidc1. I also tested it on Meson8b as well as Meson8m2 Regards Martin

Re: [PATCH 1/3] dt-bindings: clk: g12a: New binding for Meson-G12A SoC

adding Rob Herring so it doesn't get lost on the devicetree mailing list On Mon, Jul 9, 2018 at 1:13 PM Jian Hu wrote: > > Add new binding for Meson-G12A SoC Everything-Else part > > Signed-off-by: Jian Hu > --- > Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt | 1 + > 1 file

Re: [PATCH 0/3] pinctrl: meson-g12a: add pinctrl driver support

Hi Yixun, On Thu, Jul 5, 2018 at 4:53 AM Yixun Lan wrote: > > HI Neil > > On 07/04/18 22:57, Neil Armstrong wrote: > > Hi Yixun, > > > > On 05/07/2018 00:45, Yixun Lan wrote: > >> This patch series try to add pinctrl driver support for > >> the Meson-G12A SoC. > > > > Thanks for submitting these

Re: [PATCH 2/3] dt-bindings: clk: meson-g12a: Add G12A EE Clock Bindings

On Mon, Jul 9, 2018 at 1:13 PM Jian Hu wrote: > > Add dt-bindings headers for the Meson-G12A's Everything-Else > part clock controller. I wonder if this should be folded into patch #1 along with an update to Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt so it's clear which header

Re: [PATCH 0/3] pinctrl: meson-g12a: add pinctrl driver support

Hi Linus, On Mon, Jul 9, 2018 at 3:35 PM Linus Walleij wrote: > > On Wed, Jul 4, 2018 at 4:48 PM Yixun Lan wrote: > > > > This patch series try to add pinctrl driver support for > > the Meson-G12A SoC. > > > > > > Yixun Lan (3): > > documentation: Add compatibles for Amlogic Meson G12A pin

Re: [PATCH] tick: prefer a lower rating device only if it's CPU local device

Hi Thomas, On Tue, Jul 3, 2018 at 6:48 PM Sudeep Holla wrote: > > Hi Thomas, > > On Tue, Jul 03, 2018 at 06:08:19PM +0200, Thomas Gleixner wrote: > > [...] > > > > > / # cat /sys/devices/system/clockevents/broadcast/current_device > > > > meson6_tick > > > > > > OK, it can support broadcast > >

Re: [PATCH 1/3] soc: amlogic: Add Meson GX Clock Measure driver

Hi Neil, On Wed, Jul 4, 2018 at 10:41 AM Neil Armstrong wrote: > > Hi Martin, > > On 03/07/2018 21:18, Martin Blumenstingl wrote: > > Hi Neil, > > > > On Tue, Jul 3, 2018 at 3:23 PM Neil Armstrong > > wrote: > >> > >> The Amlog

Re: [PATCH 1/3] clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate definition

On Wed, Jul 4, 2018 at 6:55 PM Jerome Brunet wrote: > > HHI_GEN_CLK_CTNL is defined twice, just remove the duplicate definition > > Fixes: 738f66d3211d ("clk: gxbb: add AmLogic GXBB clk controller driver") > Signed-off-by: Jerome Brunet Acked-by: Martin Blumenstingl good catch Jerome!

Re: [PATCH 3/3] clk: meson: add sub EMMC clock controller driver

Hi Yixun, apart from what Jerome found this looks good to me. one small "issue" and a question are inline below On Tue, Jul 3, 2018 at 9:00 AM Yixun Lan wrote: > > This patch will add a EMMC clock controller driver support, > It provide a mux and divider clock. > > This clock driver can be

Re: [PATCH 1/3] soc: amlogic: Add Meson GX Clock Measure driver

Hi Neil, On Tue, Jul 3, 2018 at 3:23 PM Neil Armstrong wrote: > > The Amlogic Meson GX SoCs embeds a clock measurer IP to measure the internal > clock paths frequencies. > The precision is in the order of the MHz. > > Signed-off-by: Neil Armstrong > --- > drivers/soc/amlogic/Kconfig

Re: [PATCH] MIPS: lantiq: gphy: Drop reboot/remove reset asserts

el.org # 4.14+ > Signed-off-by: Mathias Kresin <d...@kresin.me> Acked-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> thank you Mathias! @Hauke: maybe you can also review this and give feedback? > --- > drivers/soc/lantiq/gphy.c | 34

Re: [PATCH 0/3] USB: musb: dsps: phy fix and DT-topology support

Hi Johan, On Fri, Apr 13, 2018 at 5:15 PM, Johan Hovold wrote: > I've been carrying a patch out-of-tree since my work on improving the > USB device-tree support which is needed to be able to describe USB > topologies for musb based controllers. > > This patch, which associates

Re: [PATCH v2 2/2] usb: dwc3: support clocks and resets for DWC3 core

Hello, On Thu, Apr 19, 2018 at 1:03 PM, Masahiro Yamada wrote: > Historically, the clocks and resets are handled on the glue layer > side instead of the DWC3 core. For simple cases, dwc3-of-simple.c > takes care of arbitrary number of clocks and resets. The DT

Re: [PATCH 0/3] USB: musb: dsps: phy fix and DT-topology support

Hello Johan, On Thu, Apr 19, 2018 at 9:43 AM, Johan Hovold <jo...@kernel.org> wrote: > On Wed, Apr 18, 2018 at 09:18:30PM +0200, Martin Blumenstingl wrote: >> Hi Johan, >> >> On Fri, Apr 13, 2018 at 5:15 PM, Johan Hovold <jo...@kernel.org> wrote: >> > I'

Re: [PATCH 1/3] iio: adc: meson-saradc: squash and share the common adc platform data

and make the code more maintainable. > > Signed-off-by: Yixun Lan <yixun....@amlogic.com> Acked-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> this will also help me when I add support for the internal temperature sensor (as Meson8b and Meson8m2 shar

Re: [PATCH 2/3] dt-bindings: iio: adc: document the Meson AXG support

On Mon, Mar 26, 2018 at 10:46 AM, Yixun Lan <yixun@amlogic.com> wrote: > From: Xingyu Chen <xingyu.c...@amlogic.com> > > Update the documentation to expicitly support the Meson-AXG SoC. > > Signed-off-by: Xingyu Chen <xingyu.c...@amlogic.com> Acked-by: Mart

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