According to the datasheet we have to set some bits as 0 and others as 1.
Make sure we do this for CFG1 and CFG3.
Signed-off-by: Michael Walle
---
drivers/hwmon/adt7411.c | 53 +
1 file changed, 49 insertions(+), 4 deletions(-)
diff --git a
If the EXT_TDM bit is set and ain[12]_input will be switch to a temp2_input
attribute.
Signed-off-by: Michael Walle
---
drivers/hwmon/adt7411.c | 51 +
1 file changed, 43 insertions(+), 8 deletions(-)
diff --git a/drivers/hwmon/adt7411.c b
: e7d48e5fbf30 ("net: enetc: add a mini driver for the Integrated Endpoint
Register Block")
Signed-off-by: Michael Walle
---
drivers/net/ethernet/freescale/enetc/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/freescale/enetc/Kconfig
b/d
Hi Rob,
Am 2021-04-20 16:08, schrieb Rob Herring:
On Fri, Apr 16, 2021 at 09:26:03PM +0200, Michael Walle wrote:
Am 2021-04-16 20:44, schrieb Rob Herring:
> On Fri, Apr 16, 2021 at 01:49:23PM +0200, Michael Walle wrote:
> > The goal is to fetch a (base) MAC address from the OTP re
Am 2021-02-14 03:24, schrieb Vladimir Oltean:
On Sun, Feb 14, 2021 at 03:18:49AM +0100, Michael Walle wrote:
Am 14. Februar 2021 02:57:33 MEZ schrieb Vladimir Oltean
:
>Hi Michael,
>
>On Sun, Feb 14, 2021 at 02:04:05AM +0100, Michael Walle wrote:
>> at803x_aneg_done()
otp.c
- dropped the patches introduced in v2
Changes since v1:
- added methods for Macronix and similar flashes
- added patch to cleanup/consolidate code in core.c
Michael Walle (2):
mtd: spi-nor: add OTP support
mtd: spi-nor: implement OTP support for Winbond and similar flashes
drivers/mt
ps will be given an address offset to operate on while the locking ops use
regions because locking always affects a whole region. It is up to the
flash driver to implement these ops.
Signed-off-by: Michael Walle
---
drivers/mtd/spi-nor/Makefile | 1 +
drivers/mtd/spi-nor/core.c | 8 ++
drive
documented) first OTP area of the newer flashes is the actual SFDP
table.
On a side note, Winbond devices also allow erasing the OTP regions as
long as the area isn't locked down.
This was tested on a Winbond W25Q32JW as well as on a W25Q32FW.
Signed-off-by: Michael Walle
---
drivers/mtd
Am 2021-04-07 00:09, schrieb Michael Walle:
[..]
diff --git a/drivers/of/of_net.c b/drivers/of/of_net.c
index bc0a27de69d4..2d5d5e59aea5 100644
--- a/drivers/of/of_net.c
+++ b/drivers/of/of_net.c
@@ -45,42 +45,35 @@ int of_get_phy_mode(struct device_node *np,
phy_interface_t *interface
Winbond flashes with OTP support provide a command to erase the OTP
data. This might come in handy during development.
This was tested with a Winbond W25Q32JW on a LS1028A SoC with the
NXP FSPI controller.
Signed-off-by: Michael Walle
---
drivers/mtd/spi-nor/core.c| 4 +-
drivers/mtd/spi
Hi Tudor,
Am 2021-04-08 07:51, schrieb tudor.amba...@microchip.com:
Would you please resend this patch, together with the mtd-utils
and the SPI NOR patch in a single patch set? You'll help us all
having all in a single place.
This has already been picked-up:
https://git.kernel.org/pub/scm/linu
returns a template of the read op. The
callers can then fill in the details like address, data length, data
buffer location.
Signed-off-by: Pratyush Yadav
Reviewed-by: Michael Walle
The AR8031 has two register sets: Copper and Fiber. The fiber page is
used in case of 100Base-FX and 1000Base-X. But more importantly it is
also used for the SGMII link. Add support to switch between these two.
Signed-off-by: Michael Walle
---
drivers/net/phy/at803x.c | 35
reading the mode register and be a bit more
precise on the warning message.
Signed-off-by: Michael Walle
---
drivers/net/phy/at803x.c | 37 -
1 file changed, 16 insertions(+), 21 deletions(-)
diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x
/netdev/20210212172341.3489046-1-olte...@gmail.com/
Michael Walle (2):
net: phy: at803x: add pages support to AR8031/33
net: phy: at803x: use proper locking in at803x_aneg_done()
drivers/net/phy/at803x.c | 72
1 file changed, 51 insertions(+), 21 deletions
AR8035 recently gained MDIX support. The same functions will work for
the AR8031/33 PHY. We just need to add the at803x_config_aneg()
callback.
This was tested on a Kontron sl28 board.
Signed-off-by: Michael Walle
---
drivers/net/phy/at803x.c | 1 +
1 file changed, 1 insertion(+)
diff --git a
Am 14. Februar 2021 02:57:33 MEZ schrieb Vladimir Oltean :
>Hi Michael,
>
>On Sun, Feb 14, 2021 at 02:04:05AM +0100, Michael Walle wrote:
>> at803x_aneg_done() checks if auto-negotiation is completed on the
>SGMII
>> side. This doesn't take the mdio bus lock and the pa
Am 2021-02-22 22:26, schrieb Heiko Thiery:
The Kontron pitx-imx8m board is based on an i.MX8MQ soc.
Signed-off-by: Heiko Thiery
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Michael Walle
Hi,
Am 2021-02-10 08:03, schrieb Heiner Kallweit:
On 09.02.2021 17:40, Michael Walle wrote:
Registers >= 16 are paged. Be sure to set the page. It seems this was
working for now, because the default is correct for the registers used
in the driver at the moment. But this will also ass
Hi,
Am 2021-02-10 10:03, schrieb Heiner Kallweit:
[..]
+ return phy_restore_page(phydev, oldpage, err);
If a random page was set before entering config_init, do we actually
want
to restore it? Or wouldn't it be better to set the default page as
part
of initialization?
First, I want to
Am 2021-02-10 11:30, schrieb Russell King - ARM Linux admin:
On Wed, Feb 10, 2021 at 08:03:07AM +0100, Heiner Kallweit wrote:
On 09.02.2021 17:40, Michael Walle wrote:
> +out:
> + return phy_restore_page(phydev, oldpage, err);
If a random page was set before entering config_init,
Am 2021-02-10 11:49, schrieb Russell King - ARM Linux admin:
On Wed, Feb 10, 2021 at 11:38:18AM +0100, Michael Walle wrote:
Am 2021-02-10 11:30, schrieb Russell King - ARM Linux admin:
> On Wed, Feb 10, 2021 at 08:03:07AM +0100, Heiner Kallweit wrote:
> > On 09.02.2021 17:40, Mich
Am 2021-02-09 17:38, schrieb Michael Walle:
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -308,7 +308,7 @@ void phy_ethtool_ksettings_get(struct phy_device
*phydev,
if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
cmd->base.port = PORT_BNC;
Am 2021-02-10 12:54, schrieb Russell King - ARM Linux admin:
On Wed, Feb 10, 2021 at 12:20:02PM +0100, Michael Walle wrote:
Am 2021-02-09 17:38, schrieb Michael Walle:
> --- a/drivers/net/phy/phy.c
> +++ b/drivers/net/phy/phy.c
> @@ -308,7 +308,7 @@ void phy_ethtool_ksettings_g
Am 2021-02-10 12:48, schrieb Russell King - ARM Linux admin:
On Wed, Feb 10, 2021 at 12:14:35PM +0100, Michael Walle wrote:
Am 2021-02-10 11:49, schrieb Russell King - ARM Linux admin:
The PHY doesn't support fiber and register 0..15 are always available
regardless of the selected page fo
Don't sometimes use the address operator and sometimes not. Drop it and
make the code look uniform.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v1:
- none
drivers/net/phy/icplus.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --
Simpify the initializations of the structures. There is no functional
change.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v1:
- none
drivers/net/phy/icplus.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/net/phy
According to the datasheet of the IP101A/G there is no revision field
and MII_PHYSID2 always reads as 0x0c54. Use PHY_ID_MATCH_EXACT() then.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v1:
- none
drivers/net/phy/icplus.c | 4 ++--
1 file changed, 2 insertions
The PHY core already resets the PHY before .config_init() if a
.soft_reset() op is registered. Drop the open-coded ip1xx_reset().
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v1:
- none
drivers/net/phy/icplus.c | 32 ++--
1 file changed
her active page
before booting linux.
The last two patches add the new features.
Michael Walle (9):
net: phy: icplus: use PHY_ID_MATCH_MODEL() macro
net: phy: icplus: use PHY_ID_MATCH_EXACT() for IP101A/G
net: phy: icplus: drop address operator for functions
net: phy: icplus: use the .soft_re
Implement the operations to set desired mode and retrieve the current
mode.
This feature was tested with an IP101G.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v1:
- none, except that the callbacks are register for both IP101A and IP101G
PHY drivers
drivers
the page select register which - according
to the datasheet - is not available on the IP101A. If this register is
writable, assume we have an IP101G.
Split the combined IP101A/G driver into two separate drivers.
Signed-off-by: Michael Walle
---
Changes since v1:
- use match_phy_device() as
is _not_ reset with a soft reset of the PHY.
To ease the function reuse between the non-paged register space of the
IP101A and the IP101G, add noop read_page()/write_page() callbacks so
the IP101G functions can also be used for the IP101A.
Signed-off-by: Michael Walle
---
Changes since v1:
- introd
error counters implement only support for the error counters.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v1:
- renamed the functions to represend a IP101G-only function
- enable the counters in IP101G's config_init()
drivers/net/phy/icp
This bit is reserved as 'always-write-1'. While this is not a particular
error, because we are only setting it, guard it by checking the model to
prevent errors in the future.
Signed-off-by: Michael Walle
---
Changes since v1:
- dropped the model check. Instead use two different
her active page
before booting linux.
The last two patches add the new features.
Michael Walle (9):
net: phy: icplus: use PHY_ID_MATCH_MODEL() macro
net: phy: icplus: use PHY_ID_MATCH_EXACT() for IP101A/G
net: phy: icplus: drop address operator for functions
net: phy: icplus: use the .soft_re
According to the datasheet of the IP101A/G there is no revision field
and MII_PHYSID2 always reads as 0x0c54. Use PHY_ID_MATCH_EXACT() then.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v2:
- none
Changes since v1:
- none
drivers/net/phy/icplus.c | 4 ++--
1 file
Don't sometimes use the address operator and sometimes not. Drop it and
make the code look uniform.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v2:
- none
Changes since v1:
- none
drivers/net/phy/icplus.c | 10 +-
1 file changed, 5 insertions(
Simpify the initializations of the structures. There is no functional
change.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v2:
- none
Changes since v1:
- none
drivers/net/phy/icplus.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions
The PHY core already resets the PHY before .config_init() if a
.soft_reset() op is registered. Drop the open-coded ip1xx_reset().
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v2:
- none
Changes since v1:
- none
drivers/net/phy/icplus.c | 32
This bit is reserved as 'always-write-1'. While this is not a particular
error, because we are only setting it, guard it by checking the model to
prevent errors in the future.
Signed-off-by: Michael Walle
---
Changes since v2:
- none
Changes since v1:
- dropped the model check. I
error counters implement only support for the error counters.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v2:
- none
Changes since v1:
- renamed the functions to represend a IP101G-only function
- enable the counters in IP101G's config_init()
drivers/net/ph
is _not_ reset with a soft reset of the PHY.
To ease the function reuse between the non-paged register space of the
IP101A and the IP101G, add noop read_page()/write_page() callbacks so
the IP101G functions can also be used for the IP101A.
Signed-off-by: Michael Walle
---
Changes since v2:
- n
Implement the operations to set desired mode and retrieve the current
mode.
This feature was tested with an IP101G.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v2:
- none
Changes since v1:
- none, except that the callbacks are register for both IP101A and IP101G
the page select register which - according
to the datasheet - is not available on the IP101A. If this register is
writable, assume we have an IP101G.
Split the combined IP101A/G driver into two separate drivers.
Signed-off-by: Michael Walle
---
Changes since v2:
- dropped the PHY_BASIC_FEATURES
Am 2021-02-10 22:08, schrieb Michael Walle:
Registers >= 16 are paged. Be sure to set the page. It seems this was
working for now, because the default is correct for the registers used
in the driver at the moment. But this will also assume, nobody will
change the page select register bef
Am 2021-02-10 22:08, schrieb Michael Walle:
Implement the operations to set desired mode and retrieve the current
mode.
This feature was tested with an IP101G.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v2:
- none
Changes since v1:
- none, except that the
Don't sometimes use the address operator and sometimes not. Drop it and
make the code look uniform.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v3:
- none
Changes since v2:
- none
Changes since v1:
- none
drivers/net/phy/icplus.c | 10 +-
1
her active page
before booting linux.
The last two patches add the new features.
Michael Walle (9):
net: phy: icplus: use PHY_ID_MATCH_MODEL() macro
net: phy: icplus: use PHY_ID_MATCH_EXACT() for IP101A/G
net: phy: icplus: drop address operator for functions
net: phy: icplus: use the .soft_re
Simpify the initializations of the structures. There is no functional
change.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v3:
- none
Changes since v2:
- none
Changes since v1:
- none
drivers/net/phy/icplus.c | 19 ++-
1 file changed, 10
error counters implement only support for the error counters.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v3:
- none
Changes since v2:
- none
Changes since v1:
- renamed the functions to represend a IP101G-only function
- enable the counters in IP101G's c
Implement the operations to set desired mode and retrieve the current
mode.
This feature was tested with an IP101G.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v3:
- added return code check on phy_select_page()
Changes since v2:
- none
Changes since v1:
- none
is _not_ reset with a soft reset of the PHY.
To ease the function reuse between the non-paged register space of the
IP101A and the IP101G, add noop read_page()/write_page() callbacks so
the IP101G functions can also be used for the IP101A.
Signed-off-by: Michael Walle
---
Changes since v3:
- ad
This bit is reserved as 'always-write-1'. While this is not a particular
error, because we are only setting it, guard it by checking the model to
prevent errors in the future.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v3:
- none
Changes since v2:
- non
According to the datasheet of the IP101A/G there is no revision field
and MII_PHYSID2 always reads as 0x0c54. Use PHY_ID_MATCH_EXACT() then.
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v3:
- none
Changes since v2:
- none
Changes since v1:
- none
drivers/net
The PHY core already resets the PHY before .config_init() if a
.soft_reset() op is registered. Drop the open-coded ip1xx_reset().
Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
---
Changes since v3:
- none
Changes since v2:
- none
Changes since v1:
- none
drivers/net/phy/icplus.c
the page select register which - according
to the datasheet - is not available on the IP101A. If this register is
writable, assume we have an IP101G.
Split the combined IP101A/G driver into two separate drivers.
Signed-off-by: Michael Walle
---
Changes since v3:
- none
Changes since v2
Hi Greg,
> There's no need to keep around a dentry pointer to a simple file that
> debugfs itself can look up when we need to remove it from the system.
> So simplify the code by deleting the variable and cleaning up the logic
> around the debugfs file.
This will generate the following oops on my
Am 2021-02-17 22:50, schrieb Marc Zyngier:
On Wed, 17 Feb 2021 20:10:50 +,
Michael Walle wrote:
Am 2021-02-17 21:02, schrieb Marc Zyngier:
> On 2021-02-17 19:57, Michael Walle wrote:
>> Hi Greg,
>>
>>> There's no need to keep around a dentry pointer to a
Am 2021-02-18 08:31, schrieb Greg KH:
On Wed, Feb 17, 2021 at 09:50:38PM +, Marc Zyngier wrote:
On Wed, 17 Feb 2021 20:10:50 +,
Michael Walle wrote:
>
> Am 2021-02-17 21:02, schrieb Marc Zyngier:
> > On 2021-02-17 19:57, Michael Walle wrote:
> >> Hi Greg,
> >
Am 2021-02-18 09:40, schrieb Greg KH:
On Wed, Feb 17, 2021 at 08:57:17PM +0100, Michael Walle wrote:
Hi Greg,
> There's no need to keep around a dentry pointer to a simple file that
> debugfs itself can look up when we need to remove it from the system.
> So simplify the code b
Am 2021-02-18 09:52, schrieb Greg KH:
On Thu, Feb 18, 2021 at 09:27:09AM +0100, Michael Walle wrote:
Am 2021-02-18 08:31, schrieb Greg KH:
> On Wed, Feb 17, 2021 at 09:50:38PM +, Marc Zyngier wrote:
> > On Wed, 17 Feb 2021 20:10:50 +0000,
> > Michael Walle wrote:
> >
Am 2021-02-18 13:33, schrieb Heiko Thiery:
Add the Kontron pITX-imx8m board compatibles binding.
Signed-off-by: Heiko Thiery
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml
b/Documentation/dev
Am 2021-02-18 13:33, schrieb Heiko Thiery:
The Kontron pitx-imx8m board is based on an i.MX8MQ soc.
Signed-off-by: Heiko Thiery
---
arch/arm64/boot/dts/freescale/Makefile| 1 +
.../freescale/imx8mq-kontron-pitx-imx8m.dts | 675 ++
2 files changed, 676 insertions(+)
at803x_aneg_done() is pretty much dead code since the patch series
"net: phy: improve and simplify phylib state machine" [1]. Just remove
it.
[1]
https://lore.kernel.org/netdev/922c223b-7bc0-e0ec-345d-2034b796a...@gmail.com/
Suggested-by: Vladimir Oltean
Signed-off-by: Mic
Vladimir Oltean mentioned that it is dead code.
Therefore, the second patch will just remove it.
changes since v1:
- second patch will remove at803x_aneg_done() altogether
Michael Walle (2):
net: phy: at803x: add pages support to AR8031/33
net: phy: at803x: remove at803x_aneg_done()
drivers
The AR8031 has two register sets: Copper and Fiber. The fiber page is
used in case of 100Base-FX and 1000Base-X. But more importantly it is
also used for the SGMII link. Add support to switch between these two.
Signed-off-by: Michael Walle
---
drivers/net/phy/at803x.c | 35
Am 2021-02-18 20:26, schrieb Vladimir Oltean:
On Thu, Feb 18, 2021 at 07:52:38PM +0100, Michael Walle wrote:
Add paging support to the QCA AR8031/33 PHY. This will be needed if we
add support for the .config_inband_aneg callback, see series [1].
The driver itself already accesses the fiber
Add the pinctrl entries for the GPIOs which are connected to the
push buttons on this board.
Signed-off-by: Michael Walle
---
arch/arm/boot/dts/zynq-ebaz4205.dts | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/zynq-ebaz4205.dts
b/arch/arm/boot/dts
Hi Bjorn,
Am 2021-01-17 20:27, schrieb Michael Walle:
Am 2021-01-16 00:57, schrieb Bjorn Helgaas:
On Wed, Jan 13, 2021 at 12:32:32AM +0100, Michael Walle wrote:
Am 2021-01-12 23:58, schrieb Bjorn Helgaas:
> On Sat, Jan 09, 2021 at 07:31:46PM +0100, Michael Walle wrote:
> > Am 2021-01
It is nowhere used in the kernel. It also seems to be lacking the
proper fiber advertise flags. Remove it.
Signed-off-by: Michael Walle
---
drivers/net/phy/broadcom.c | 93 +-
1 file changed, 1 insertion(+), 92 deletions(-)
diff --git a/drivers/net/phy
It is nowhere used in the kernel. It also seems to be lacking the
proper fiber advertise flags. Remove it.
Signed-off-by: Michael Walle
Acked-by: Florian Fainelli
---
changes since v1:
- added queue to subject
- reworded 1000BX to 1000Base-BX
drivers/net/phy/broadcom.c | 93
cannot find the correct
subdevice.
Signed-off-by: Michael Walle
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 262fbad8f0ec
genphy_read_status() is already the default for the .read_status() op.
Drop the unnecessary references.
Signed-off-by: Michael Walle
---
drivers/net/phy/marvell.c | 1 -
drivers/net/phy/micrel.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy
Hi,
Am 2021-01-19 06:27, schrieb Sai Krishna Potthuri:
Sai Krishna Potthuri (3):
firmware: xilinx: Added pinctrl support
dt-bindings: pinctrl: Added binding for ZynqMP pinctrl driver
pinctrl: Added Xilinx ZynqMP pinctrl driver support
There is mixed present and past tense in the subject
.
Suggested-by: Andrew Lunn
Signed-off-by: Michael Walle
---
drivers/net/phy/broadcom.c | 2 ++
drivers/net/phy/dp83822.c| 3 +++
drivers/net/phy/dp83869.c| 4
drivers/net/phy/lxt.c| 1 +
drivers/net/phy/marvell.c| 1 +
drivers/net/phy/marvell10g.c | 2 ++
drivers/net/phy
her active page
before booting linux.
The last two patches add the new features.
Michael Walle (9):
net: phy: icplus: use PHY_ID_MATCH_MODEL() macro
net: phy: icplus: use PHY_ID_MATCH_EXACT() for IP101A/G
net: phy: icplus: drop address operator for functions
net: phy: icplus: use the .soft_re
Simpify the initializations of the structures. There is no functional
change.
Signed-off-by: Michael Walle
---
drivers/net/phy/icplus.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c
index b632947cbcdf
The PHY core already resets the PHY before .config_init() if a
.soft_reset() op is registered. Drop the open-coded ip1xx_reset().
Signed-off-by: Michael Walle
---
drivers/net/phy/icplus.c | 32 ++--
1 file changed, 2 insertions(+), 30 deletions(-)
diff --git a
Don't sometimes use the address operator and sometimes not. Drop it and
make the code look uniform.
Signed-off-by: Michael Walle
---
drivers/net/phy/icplus.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c
According to the datasheet of the IP101A/G there is no revision field
and MII_PHYSID2 always reads as 0x0c54. Use PHY_ID_MATCH_EXACT() then.
Signed-off-by: Michael Walle
---
drivers/net/phy/icplus.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/icplus.c
the page select register which - according
to the datasheet - is not available on the IP101A. If this register is
writable, assume we have an IP101G.
Signed-off-by: Michael Walle
---
drivers/net/phy/icplus.c | 43 +++-
1 file changed, 42 insertions(+), 1
error counters implement only support for the error counters.
Signed-off-by: Michael Walle
---
drivers/net/phy/icplus.c | 78
1 file changed, 78 insertions(+)
diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c
index 858b9326a72d..d1b57d8
This bit is reserved as 'always-write-1'. While this is not a particular
error, because we are only setting it, guard it by checking the model to
prevent errors in the future.
Signed-off-by: Michael Walle
---
drivers/net/phy/icplus.c | 15 ++-
1 file changed, 10 insert
is _not_ reset with a soft reset of the PHY.
Add read_page()/write_page() support for the IP101G and use it
accordingly.
Signed-off-by: Michael Walle
---
drivers/net/phy/icplus.c | 50 +++-
1 file changed, 39 insertions(+), 11 deletions(-)
diff --git a/drivers/
Implement the operations to set desired mode and retrieve the current
mode.
This feature was tested with an IP101G.
Signed-off-by: Michael Walle
---
drivers/net/phy/icplus.c | 91
1 file changed, 91 insertions(+)
diff --git a/drivers/net/phy/icplus.c b
le test support")
Reported-by: kbuild test robot
Signed-off-by: Michael Walle
---
Hi,
this patch contains a Fixes tag, but is sent to the net-next because the
commit which is fixed is only in net-next.
-michael
drivers/net/phy/bcm-phy-lib.c | 6 ++
1 file changed, 2 insertions(+), 4 deleti
Keep the switch port labels consistent across the different board
variants. If the user wants to rename them, it should be done in
user-space.
Fixes: ab43f0307449 ("arm64: dts: ls1028a: sl28: add support for variant 2")
Signed-off-by: Michael Walle
---
.../boot/dts/freescale/fsl-ls102
Am 2020-08-10 09:31, schrieb Michael Walle:
Am 2020-08-10 09:13, schrieb Lee Jones:
On Fri, 07 Aug 2020, Michael Walle wrote:
Hi Uwe, Hi Lee,
Am 2020-08-06 10:40, schrieb Uwe Kleine-König:
> On Mon, Aug 03, 2020 at 11:35:52AM +0200, Michael Walle wrote:
> > diff --git a/drivers/pwm/
035-3-he...@sntech.de/
Fixes: 4e130dc7b413 ("iio: adc: rockchip_saradc: Add support iio buffers")
Signed-off-by: Michael Walle
---
drivers/iio/adc/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 66d9cc073157..d94d
Add support for the GPIO controller of the sl28 board management
controller. This driver is part of a multi-function device.
A controller has 8 lines. There are three different flavors:
full-featured GPIO with interrupt support, input-only and output-only.
Signed-off-by: Michael Walle
Reviewed
Add a pwm-fan mapped to the PWM channel 0 which is connected to the
fan connector of the carrier.
Signed-off-by: Michael Walle
---
Changes since v6:
- none
Changes since v5:
- none
Changes since v4:
- none
Changes since v3:
- see cover letter
.../dts/freescale/fsl-ls1028a-kontron-sl28
GPIO input and needs polling.
Signed-off-by: Michael Walle
---
Changes since v6:
- none
Changes since v5:
- none
Changes since v4:
- none
Changes since v3:
- see cover letter
.../freescale/fsl-ls1028a-kontron-sl28.dts| 32 +++
1 file changed, 32 insertions(+)
diff
Enable the kernel modules for the board management controller "sl28cpld"
which is used on the SMARC-sAL28 board.
Signed-off-by: Michael Walle
---
Changes since v6:
- none
Changes since v5:
- new patch
arch/arm64/configs/defconfig | 5 +
1 file changed, 5 insertions(+)
diff --
Add support for the PWM controller of the sl28cpld board management
controller. This is part of a multi-function device driver.
The controller has one PWM channel and can just generate four distinct
frequencies.
Signed-off-by: Michael Walle
Acked-by: Thierry Reding
---
Changes since v6
Add support for the interrupt controller inside the sl28 CPLD management
controller.
The interrupt controller can handle at most 8 interrupts and is really
simplistic and consists only of an interrupt mask and an interrupt
pending register.
Signed-off-by: Michael Walle
Acked-by: Marc Zyngier
Add support for the hardware monitoring controller of the sl28cpld board
management controller. This driver is part of a multi-function device.
Signed-off-by: Michael Walle
Acked-by: Guenter Roeck
Reviewed-by: Andy Shevchenko
---
Changes since v6:
- none
Changes since v5:
- none
Changes
Add support for the watchdog of the sl28cpld board management
controller. This is part of a multi-function device driver.
Signed-off-by: Michael Walle
Acked-by: Guenter Roeck
---
Changes since v6:
- none
Changes since v5:
- none
Changes since v4:
- update copyright year
- remove #include
"
- removed the interrupts-extended rule
- cleaned up the unit-address space, see above
Michael Walle (13):
mfd: add simple regmap based I2C driver
dt-bindings: mfd: Add bindings for sl28cpld
mfd: simple-mfd-i2c: add sl28cpld support
irqchip: add sl28cpld interrupt controller s
Add a device tree bindings for the board management controller found on
the Kontron SMARC-sAL28 board.
Signed-off-by: Michael Walle
Reviewed-by: Rob Herring
---
Changes since v6:
- renamed "sl28cpld-r1" to "sl28cpld"
- made paths relative
- moved "reg" and &qu
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