Hi Shawn
>
> > I didn't put headphone detect GPIO in audmux group in imx6sl-evk
> > patch, Still in hog group.
>
> Ok, sorry. You grouped it with MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT,
> which I also think should not be part of the hog group.
>
> > And I think headphone detect GPIO is not belong
Hi Shawn, Fabio
> >
> > > I would like to know your opinion, should I move headphone detect
> > > GPIO To audmux group?
> >
> > What about adding a dedicated pinctrl_hp for the headphone detect pin
> > like it is done at:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.
> > > > +
> > > > + /* restore registers by regcache_sync */
> > > > + fsl_esai_register_restore(esai_priv);
> > > > +
> > > > + regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR,
> > > > +ESAI_xCR_xPR_MASK, 0);
> > > > +
Hi Mark
>
> On Fri, Aug 16, 2019 at 01:03:14AM -0400, Shengjiu Wang wrote:
>
> > + for (i = 0; i < reg_max; i++)
> > + regcache[i] = readl(audmux_base + i * 4);
>
> If only there were some framework which provided a register cache!
Yes, next step I can refine this driver to use
Hi
>
> Commit 8973112aa41b ("ASoC: fsl_esai: ETDR and TX0~5 registers are non
> volatile") removed TX data registers from the volatile_reg list and appended
> default values for them. However, being data registers of TX, they should
> not have been removed from the list because they should not be
> > Configure the SAI device node, configure audio clock and pinctrl.
> >
> > Enable the audio sound card, which use the SAI1 and wm8960, and enable
> > headphone detection.
> >
> > Signed-off-by: Shengjiu Wang
>
> s/notes/nodes in subject?
Yes. Thanks for fixing it.
Best regards
Wang
> > {
> > imx6x-sdb {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <_hog>;
>
> Instead of adding a hog group, please add the headphone detect GPIO under
> the audmux group like you did in the imx6sl-evk patch.
>
I didn't put headphone detect GPIO in
Hi
>
> On Fri, Sep 13, 2019 at 05:48:40AM +0000, S.j. Wang wrote:
> > Hi
> >
> > >
> > > On Tue, Sep 10, 2019 at 02:07:25AM +, S.j. Wang wrote:
> > > > > On Mon, Sep 09, 2019 at 06:33:20PM -0400, Shengjiu Wang wrote:
> > > >
Hi
>
> When set the runtime hardware parameters, we may need to query the
> capability of DMA to complete the parameters.
>
> This patch is to Extract this operation from
> dmaengine_pcm_set_runtime_hwparams function to a separate function
> snd_dmaengine_pcm_set_runtime_hwparams, that other
Hi
>
> On Mon, Sep 09, 2019 at 06:33:20PM -0400, Shengjiu Wang wrote:
> > The ASRC support 24bit/16bit/8bit input width, so S20_3LE format
> > should not be supported, it is word width is 20bit.
>
> I thought 3LE used 24-bit physical width. And the driver assigns
> ASRC_WIDTH_24_BIT to "width"
Hi
>
> On Mon, Sep 09, 2019 at 06:33:19PM -0400, Shengjiu Wang wrote:
> > snd_pcm_format_t is more formal than enum asrc_word_width, which
> has
> > two property, width and physical width, which is more accurate than
> > enum asrc_word_width. So it is better to use in(out)put_format instead
> >
Hi
>
> On Mon, Sep 09, 2019 at 06:33:21PM -0400, Shengjiu Wang wrote:
> > There is error "aplay: pcm_write:2023: write error: Input/output error"
> > on i.MX8QM/i.MX8QXP platform for S24_3LE format.
> >
> > In i.MX8QM/i.MX8QXP, the DMA is EDMA, which don't support 24bit
> > sample, but we
>
> Hi Shengjiu,
>
> Mostly looks good to me, just some small comments.
>
> On Mon, Jul 08, 2019 at 02:38:52PM +0800, shengjiu.w...@nxp.com wrote:
>
> > +static void fsl_esai_hw_reset(unsigned long arg) {
> > + struct fsl_esai *esai_priv = (struct fsl_esai *)arg;
> > + u32 saisr,
Hi
> > + /*
> > + * Add fifo reset here, because the regcache_sync will
> > + * write one more data to ETDR.
> > + * Which will cause channel shift.
>
> Sounds like a bug to me...should fix it first by marking the data registers as
> volatile.
>
The ETDR is a writable
Hi
> On Thu, May 23, 2019 at 09:53:42AM +0000, S.j. Wang wrote:
> > > > + /*
> > > > + * Add fifo reset here, because the regcache_sync will
> > > > + * write one more data to ETDR.
> > > > + * Which will cause channel shif
Hi
>
> On Tue, Sep 10, 2019 at 02:07:25AM +0000, S.j. Wang wrote:
> > > On Mon, Sep 09, 2019 at 06:33:20PM -0400, Shengjiu Wang wrote:
> > > > The ASRC support 24bit/16bit/8bit input width, so S20_3LE format
> > > > should not be supported, it is word wi
Hi
>
> On Thu, Oct 17, 2019 at 02:21:08PM +0800, Shengjiu Wang wrote:
> > For P2P output, the output divider should align with the output sample
>
> I think we should avoid "P2P" (or "M2M") keyword in the mainline code as
> we know M2M will never get merged while somebody working with the
>
Assign clocks and clock-rates for audio plls, that audio
drivers can utilize them.
Add dai-tdm-slot-num and dai-tdm-slot-width for sound-wm8524,
that sai driver can generate correct bit clock.
Fixes: 13f3b9fdef6c ("arm64: dts: imx8mm-evk: Enable audio codec wm8524")
Signed-off-by: Shengjiu Wang
Hi
>
> One issue for error-out and some nit-pickings inline. Thanks.
>
> On Thu, Sep 19, 2019 at 08:11:42PM +0800, Shengjiu Wang wrote:
> > There is error "aplay: pcm_write:2023: write error: Input/output error"
> > on i.MX8QM/i.MX8QXP platform for S24_3LE format.
> >
> > In i.MX8QM/i.MX8QXP,
Hi
> On Tue, Sep 24, 2019 at 06:52:35PM +0800, Shengjiu Wang wrote:
> > There is error "aplay: pcm_write:2023: write error: Input/output error"
> > on i.MX8QM/i.MX8QXP platform for S24_3LE format.
> >
> > In i.MX8QM/i.MX8QXP, the DMA is EDMA, which don't support 24bit
> > sample, but we didn't
Hi
> Just a small concern...
>
> On Thu, Sep 26, 2019 at 09:29:51AM +0800, Shengjiu Wang wrote:
> > static int fsl_asrc_dma_startup(struct snd_pcm_substream *substream)
> > {
> > +
> > + release_pair = false;
> > + ret = snd_soc_set_runtime_hwparams(substream,
> > + _imx_hardware);
>
>
Hi
> > > > > Sounds like a bug to me...should fix it first by marking the
> > > > > data registers as volatile.
> > > > >
> > > > The ETDR is a writable register, it is not volatile. Even we
> > > > change it to Volatile, I don't think we can't avoid this issue.
> > > > for the regcache_sync Just
>
> > +
> > + /* restore registers by regcache_sync */
> > + fsl_esai_register_restore(esai_priv);
> > +
> > + regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR,
> > +ESAI_xCR_xPR_MASK, 0);
> > + regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR,
> > +
Hi
>
> On Thu, Jun 18, 2020 at 02:03:44PM +0800, Shengjiu Wang wrote:
> > Add audio support for imx6sx platform.
> > Enable ASRC, ESAI, SPDIF, MQS.
> >
> > Shengjiu Wang (5):
> > ARM: dts: imx6sx: Enable ASRC device
> > ARM: dts: imx6sx-sdb: Add MQS support
>
> Applied the series, except
Hi
>
> On Thu, Apr 18, 2019 at 08:50:48AM +0000, S.j. Wang wrote:
> > > And this is according to IMX6DQRM:
> > > Limited support for the case when output sampling rates is
> > > between 8kHz and 30kHz. The limitation is the supported ratio
> > &
Hi
>
>
> On Sat, Apr 20, 2019 at 09:12:52AM +, Daniel Baluta wrote:
> > From: Shengjiu Wang
> >
> > SAI has 4 clock sources, which can be selected using MSEL bit of SAI
> > TCR2 register.
>
> I have a doubt at this statement. As far as I can understand, this MSEL is
> probably used by its
When the output sample rate is [8kHz, 30kHz], the limitation
of the supported ratio range is [1/24, 8]. In the driver
we use (8kHz, 30kHz) instead of [8kHz, 30kHz].
So this patch is to fix this issue and the potential rounding
issue with divider.
Fixes: fff6e03c7b65 ("ASoC: fsl_asrc: add support
Support more sample rate in asrc
Shengjiu Wang (3):
ASoC: fsl_asrc: Fix the issue about unsupported rate
ASoC: fsl_asrc: replace the process_option table with function
ASoC: fsl_asrc: Unify the supported input and output rate
Changes in RESEND V6
- change the Content-Transfer-Encoding to
Unify the supported input and output rate, add the
12kHz/24kHz/128kHz to the support list
Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
---
sound/soc/fsl/fsl_asrc.c | 32 +++-
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git
When we want to support more sample rate, for example 12kHz/24kHz
we need update the process_option table, if we want to support more
sample rate next time, the table need to be updated again. which
is not flexible.
We got a function fsl_asrc_sel_proc to replace the table, which can
give the
Add macros to define masks and bits for imx6sx MQS registers
Signed-off-by: Shengjiu Wang
---
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
index
Handle the reset GPIO and reset the device in
pm_runtime_resume
Signed-off-by: Shengjiu Wang
---
sound/soc/codecs/cs42xx8.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/sound/soc/codecs/cs42xx8.c b/sound/soc/codecs/cs42xx8.c
index ebb9e0cf8364..fc28e6d26c6d 100644
Hi Mark
>
> On Mon, Apr 29, 2019 at 10:46:03AM +0000, S.j. Wang wrote:
>
> > + cs42xx8->gpio_reset = of_get_named_gpio(dev->of_node, "gpio-
> reset", 0);
> > + if (gpio_is_valid(cs42xx8->gpio_reset)) {
> > + ret
Add regcache_mark_dirty before regcache_sync for power
of codec may be lost at suspend, then all the register
need to be reconfigured.
Fixes: 0c516b4ff85c ("ASoC: cs42xx8: Add codec driver
support for CS42448/CS42888")
Cc:
Signed-off-by: Shengjiu Wang
---
sound/soc/codecs/cs42xx8.c | 1 +
1
Handle the reset GPIO and reset the device every time we
start it.
Signed-off-by: Shengjiu Wang
---
Changes in v2
- use devm_gpiod_get_optional instead of of_get_named_gpio
sound/soc/codecs/cs42xx8.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/sound/soc/codecs/cs42xx8.c
Hi
>
> On Thu, May 16, 2019 at 06:04:58AM +0000, S.j. Wang wrote:
>
> > + cs42xx8->gpiod_reset = devm_gpiod_get_optional(dev, "reset",
> > + GPIOD_OUT_HIGH);
> > + if (IS_ERR(cs42xx8->gpiod_res
Handle the reset GPIO and reset the device every time we
start it.
Signed-off-by: Shengjiu Wang
---
Changes in v3
- update binding document.
Changes in v2
- use devm_gpiod_get_optional instead of of_get_named_gpio
Documentation/devicetree/bindings/sound/cs42xx8.txt | 6 ++
Hi
>
> On Thu, May 16, 2019 at 11:09:27AM +0000, S.j. Wang wrote:
>
> > > You also need a binding document update for this.
> > ok, will send v3
>
> Separate patch please, I already applied this and binding docs should be
> separate patches anyway.
Ok, I alrea
Add reset-gpio property, which is an optional option
Signed-off-by: Shengjiu Wang
---
Changes in RESEND v3
- send updated binding document only
Changes in v3
- update binding document.
Changes in v2
- use devm_gpiod_get_optional instead of of_get_named_gpio
Hi
>
> > +Optional properties:
> > +
> > + - reset-gpio : a GPIO spec to define which pin is connected to the chip's
> > +!RESET pin
>
> gpio properties are supposed to be called -gpios even if there's a single
> GPIO possible due to DT rules. The code will accept plain -gpio but the
>
Add reset-gpios property, which is optional.
Signed-off-by: Shengjiu Wang
---
Changes in V4
- use gpios instead of gpio
Changes in RESEND v3
- send updated binding document only
Changes in v3
- update binding document.
Changes in v2
- use devm_gpiod_get_optional instead of of_get_named_gpio
Hi
> On Thu, May 16, 2019 at 8:36 AM S.j. Wang
> wrote:
>
> > cs42888: codec@48 {
> > @@ -25,4 +30,5 @@ cs42888: codec@48 {
> > VD-supply = <_audio>;
> > VLS-supply = <_audio>;
> > VLC-supply = <_audio>;
>
Add reset-gpios property, which is optional.
Signed-off-by: Shengjiu Wang
---
Changes in V5
- use GPIO_ACTIVE_LOW
Changes in V4
- use gpios instead of gpio
Changes in RESEND v3
- send updated binding document only
Changes in v3
- update binding document.
Changes in v2
- use
Hi
Do I need to resend the patch?
Best regards
Wang shengjiu
>
> In commit
>
> b06c58c2a1ee ("ASoC: fsl_asrc: Fix the issue about unsupported rate")
>
> Fixes tag
>
> Fixes: fff6e03c7b65 ("ASoC: fsl_asrc: add support for 8-30kHz
>
> has these problem(s):
>
> - Subject has leading
There is chip errata ERR008000, the reference doc is
(https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf),
The issue is "While using ESAI transmit or receive and
an underrun/overrun happens, channel swap may occur.
The only recovery mechanism is to reset the ESAI."
In this commit add a tasklet to
Hi
> Add regcache_mark_dirty before regcache_sync for power of codec may be
> lost at suspend, then all the register need to be reconfigured.
>
> Fixes: 0c516b4ff85c ("ASoC: cs42xx8: Add codec driver support for
> CS42448/CS42888")
The Fixes tag is split, will send v2.
Best regards
Wang
Add regcache_mark_dirty before regcache_sync for power
of codec may be lost at suspend, then all the register
need to be reconfigured.
Fixes: 0c516b4ff85c ("ASoC: cs42xx8: Add codec driver support for
CS42448/CS42888")
Cc:
Signed-off-by: Shengjiu Wang
---
Changs in V2
- Don't split Fixes tag.
case ESAI_HCKT_EXTAL and case ESAI_HCKR_EXTAL should be
independent of each other, so replace fall-through with break.
Fixes: 43d24e76b698 ("ASoC: fsl_esai: Add ESAI CPU DAI driver")
Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
Cc:
---
Changes in v5
- remove new line after Fixes
Hi
>
> On Mon, Dec 07, 2020 at 02:21:40PM +0100, Krzysztof Kozlowski wrote:
> > On Mon, Dec 07, 2020 at 02:53:24PM +0800, Shengjiu Wang wrote:
> > > Error log:
> > > sysfs: cannot create duplicate filename
> '/bus/platform/devices/3000.bus'
> > >
> > > The spba bus name is duplicate with
> > > >
> > > > On Mon, Dec 07, 2020 at 02:21:40PM +0100, Krzysztof Kozlowski wrote:
> > > > > On Mon, Dec 07, 2020 at 02:53:24PM +0800, Shengjiu Wang wrote:
> > > > > > Error log:
> > > > > > sysfs: cannot create duplicate filename
> > > > '/bus/platform/devices/3000.bus'
> > > > > >
> > > >
> On Tue, Dec 08, 2020 at 08:44:51AM +0000, S.j. Wang wrote:
> > > > > >
> > > > > > On Mon, Dec 07, 2020 at 02:21:40PM +0100, Krzysztof Kozlowski
> wrote:
> > > > > > > On Mon, Dec 07, 2020 at 02:53:24PM +0800, Shengjiu Wang wrote:
>
> On Tue, Dec 08, 2020 at 08:57:49AM +0000, S.j. Wang wrote:
> > > On Tue, Dec 08, 2020 at 08:44:51AM +, S.j. Wang wrote:
> > > > > > > >
> > > > > > > > On Mon, Dec 07, 2020 at 02:21:40PM +0100, Krzysztof
> > > >
> >
> > Using a higher bitclk then expected doesn't always work.
> > Here is an example:
> >
> > aplay -Dhw:0,0 -d 5 -r 48000 -f S24_LE -c 2 audio48k24b2c.wav
> >
> > In this case, the required bitclk is 48000 * 24 * 2 = 2304000 but the
> > closest bitclk that can be derived is 3072000. Since the
53 matches
Mail list logo
