Re: [PATCH 7/7] ARM: dts: sun7i: Add dts file for the A20-linova1-7 HMI

Hi, Giulio, On 05/05/2018 12:52 AM, Giulio Benetti wrote: Hi Maxime! Il 04/05/2018 10:06, Maxime Ripard ha scritto: Hi, On Wed, May 02, 2018 at 06:41:34PM +0200, Giulio Benetti wrote: You don't have to handcode the fragments anymore with the new syntax, and U-Boot makes it really trivial to

Re: [PATCH v2 12/26] drm/sun4i: Add support for multiple DW HDMI PHY clock parents

Hi, Jernej, On 05/18/2018 06:15 PM, Jernej Škrabec wrote: Hi, Dne petek, 18. maj 2018 ob 17:09:40 CEST je Sergey Suloev napisal(a): Hi, guys, On 05/18/2018 05:46 PM, Jernej Škrabec wrote: Hi, Dne petek, 18. maj 2018 ob 12:01:16 CEST je Maxime Ripard napisal(a): On Fri, May 18, 2018 at 03

Re: [PATCH v2 12/26] drm/sun4i: Add support for multiple DW HDMI PHY clock parents

Hi, guys, On 05/18/2018 05:46 PM, Jernej Škrabec wrote: Hi, Dne petek, 18. maj 2018 ob 12:01:16 CEST je Maxime Ripard napisal(a): On Fri, May 18, 2018 at 03:15:22PM +0530, Jagan Teki wrote: From: Jernej Skrabec Some SoCs with DW HDMI have multiple possible clock

Re: [PATCH 0/3] Fix broken bananapi m2 devicetree/regulators

On 02/11/2018 01:07 AM, Philipp Rossak wrote: On 10.02.2018 22:08, Sergey Suloev wrote: On 02/11/2018 12:01 AM, Philipp Rossak wrote: Hey Sergey, Thanks for mentioning, but I think the problem has nothing to do with those patches. I tested them with the v4.15.0 Kernel since

Re: [PATCH 0/3] Fix broken bananapi m2 devicetree/regulators

On 02/11/2018 01:07 AM, Philipp Rossak wrote: On 10.02.2018 22:08, Sergey Suloev wrote: On 02/11/2018 12:01 AM, Philipp Rossak wrote: Hey Sergey, Thanks for mentioning, but I think the problem has nothing to do with those patches. I tested them with the v4.15.0 Kernel since

Re: [PATCH 0/3] Fix broken bananapi m2 devicetree/regulators

, without those patches and the kernel is not booting (I can't see any uart output). Thanks, Philipp On 10.02.2018 14:56, Sergey Suloev wrote: On 02/09/2018 08:52 PM, Philipp Rossak wrote: This patchseries fixes the bananapi m1 devicetree, to be able to boot again. The first two patches update

Re: [PATCH 0/3] Fix broken bananapi m2 devicetree/regulators

On 02/11/2018 02:30 PM, Philipp Rossak wrote: Am Sonntag, den 11.02.2018, 10:55 +0300 schrieb Sergey Suloev: On 02/11/2018 01:07 AM, Philipp Rossak wrote: On 10.02.2018 22:08, Sergey Suloev wrote: On 02/11/2018 12:01 AM, Philipp Rossak wrote: Hey Sergey, Thanks for mentioning, but I think

Re: [PATCH 0/3] Fix broken bananapi m2 devicetree/regulators

On 02/11/2018 02:30 PM, Philipp Rossak wrote: Am Sonntag, den 11.02.2018, 10:55 +0300 schrieb Sergey Suloev: On 02/11/2018 01:07 AM, Philipp Rossak wrote: On 10.02.2018 22:08, Sergey Suloev wrote: On 02/11/2018 12:01 AM, Philipp Rossak wrote: Hey Sergey, Thanks for mentioning, but I think

Re: [PATCH 0/3] Fix broken bananapi m2 devicetree/regulators

On 02/09/2018 08:52 PM, Philipp Rossak wrote: This patchseries fixes the bananapi m1 devicetree, to be able to boot again. The first two patches update/improve the devicetree and the last patch adds all missing regulators. Regards, Philipp Philipp Rossak (3): arm: dts: sun6i: a31s: bpi-m2:

Re: [PATCH 5/6] spi: sun4i: introduce register set/unset helpers

On 04/03/2018 11:14 AM, Maxime Ripard wrote: On Thu, Mar 29, 2018 at 09:59:06PM +0300, Sergey Suloev wrote: Two helper functions were added in order to update registers easily. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> I'm not really sure what's easier about this one.

Re: [PATCH 2/6] spi: sun4i: restrict transfer length in PIO-mode

On 04/03/2018 02:40 PM, Maxime Ripard wrote: On Tue, Apr 03, 2018 at 02:08:43PM +0300, Sergey Suloev wrote: On 04/03/2018 11:10 AM, Maxime Ripard wrote: On Thu, Mar 29, 2018 at 09:59:03PM +0300, Sergey Suloev wrote: There is no need to handle 3/4 empty/full interrupts as the maximum supported

Re: [PATCH 2/6] spi: sun4i: restrict transfer length in PIO-mode

On 04/03/2018 11:10 AM, Maxime Ripard wrote: On Thu, Mar 29, 2018 at 09:59:03PM +0300, Sergey Suloev wrote: There is no need to handle 3/4 empty/full interrupts as the maximum supported transfer length in PIO mode is 64 bytes for sun4i-family SoCs. That assumes that you'll be able to treat

Re: [PATCH 2/6] spi: sun4i: restrict transfer length in PIO-mode

On 04/03/2018 11:10 AM, Maxime Ripard wrote: On Thu, Mar 29, 2018 at 09:59:03PM +0300, Sergey Suloev wrote: There is no need to handle 3/4 empty/full interrupts as the maximum supported transfer length in PIO mode is 64 bytes for sun4i-family SoCs. That assumes that you'll be able to treat

Re: [PATCH 6/6] spi: sun4i: add DMA transfers support

On 04/03/2018 11:17 AM, Maxime Ripard wrote: On Thu, Mar 29, 2018 at 09:59:07PM +0300, Sergey Suloev wrote: +static int sun4i_spi_dma_setup(struct device *dev, + struct resource *res) +{ + struct spi_master *master = dev_get_drvdata(dev); + struct

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/05/2018 12:19 PM, Maxime Ripard wrote: On Wed, Apr 04, 2018 at 02:35:14PM +0300, Sergey Suloev wrote: On 04/04/2018 09:50 AM, Maxime Ripard wrote: On Tue, Apr 03, 2018 at 06:44:46PM +0300, Sergey Suloev wrote: There is no need to handle 3/4 empty interrupt as the maximum supported

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/04/2018 09:50 AM, Maxime Ripard wrote: On Tue, Apr 03, 2018 at 06:44:46PM +0300, Sergey Suloev wrote: There is no need to handle 3/4 empty interrupt as the maximum supported transfer length in PIO mode is equal to FIFO depth, i.e. 128 bytes for sun6i and 64 bytes for sun8i SoCs. Changes

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/05/2018 04:17 PM, Mark Brown wrote: On Thu, Apr 05, 2018 at 12:59:35PM +0300, Sergey Suloev wrote: On 04/05/2018 12:19 PM, Maxime Ripard wrote: The point of that patch was precisely to allow to send more data than the FIFO. You're breaking that behaviour without any justification

Re: [PATCH v2 1/6] spi: core: handle timeout error from transfer_one()

On 04/04/2018 10:08 AM, Maxime Ripard wrote: On Tue, Apr 03, 2018 at 07:24:11PM +0300, Sergey Suloev wrote: On 04/03/2018 07:18 PM, Mark Brown wrote: On Tue, Apr 03, 2018 at 07:00:55PM +0300, Sergey Suloev wrote: On 04/03/2018 06:52 PM, Mark Brown wrote: On Tue, Apr 03, 2018 at 06:29:00PM

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/09/2018 12:27 PM, Maxime Ripard wrote: On Fri, Apr 06, 2018 at 06:48:23PM +0300, Sergey Suloev wrote: On 04/06/2018 10:34 AM, Maxime Ripard wrote: On Thu, Apr 05, 2018 at 04:44:16PM +0300, Sergey Suloev wrote: On 04/05/2018 04:17 PM, Mark Brown wrote: On Thu, Apr 05, 2018 at 12:59:35PM

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/09/2018 02:36 PM, Maxime Ripard wrote: On Mon, Apr 09, 2018 at 02:10:40PM +0300, Sergey Suloev wrote: On 04/09/2018 01:50 PM, Mark Brown wrote: On Mon, Apr 09, 2018 at 01:26:23PM +0300, Sergey Suloev wrote: On 04/09/2018 12:27 PM, Maxime Ripard wrote: On Fri, Apr 06, 2018 at 06:48:23PM

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/09/2018 01:50 PM, Mark Brown wrote: On Mon, Apr 09, 2018 at 01:26:23PM +0300, Sergey Suloev wrote: On 04/09/2018 12:27 PM, Maxime Ripard wrote: On Fri, Apr 06, 2018 at 06:48:23PM +0300, Sergey Suloev wrote: On 04/06/2018 10:34 AM, Maxime Ripard wrote: According to what you said

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/06/2018 10:34 AM, Maxime Ripard wrote: On Thu, Apr 05, 2018 at 04:44:16PM +0300, Sergey Suloev wrote: On 04/05/2018 04:17 PM, Mark Brown wrote: On Thu, Apr 05, 2018 at 12:59:35PM +0300, Sergey Suloev wrote: On 04/05/2018 12:19 PM, Maxime Ripard wrote: The point of that patch

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/06/2018 10:34 AM, Maxime Ripard wrote: On Thu, Apr 05, 2018 at 04:44:16PM +0300, Sergey Suloev wrote: On 04/05/2018 04:17 PM, Mark Brown wrote: On Thu, Apr 05, 2018 at 12:59:35PM +0300, Sergey Suloev wrote: On 04/05/2018 12:19 PM, Maxime Ripard wrote: The point of that patch

[PATCH 5/6] spi: sun6i: introduce register set/unset helpers

Two helper functions were added in order to update registers easily. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.c | 31 +++ 1 file changed, 15 insertions(+), 16 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/drivers/s

[PATCH 6/6] spi: sun6i: add DMA transfers support

DMA transfers are now available for sun6i and sun8i SoCs. The DMA mode is used automatically as soon as requested transfer length is more than FIFO length. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.c | 296 -

[PATCH 3/6] spi: sun6i: restrict transfer length in PIO-mode

There is no need to handle 3/4 empty/full interrupts as the maximum supported transfer length in PIO mode is 128 bytes for sun6i- and 64 bytes for sun8i-family SoCs. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.

[PATCH 4/6] spi: sun6i: use completion provided by SPI core

As long as the completion is already provided by the SPI core then there is no need to waste extra-memory on this. Also a waiting function was added to avoid code duplication. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.

[PATCH 0/6] spi: Add support for DMA transfers in sun6i SPI driver

The following patchset provides corrections for PIO-mode and support for DMA transfers in sun6i SPI driver. Sergey Suloev (6): spi: sun6i: coding style/readability improvements spi: sun6i: handle chip select polarity flag spi: sun6i: restrict transfer length in PIO-mode spi: sun6i: use

[PATCH 1/6] spi: sun6i: coding style/readability improvements

Minor changes to fulfill the coding style and improve the readability. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.c | 115 +++- 1 file changed, 65 insertions(+), 50 deletions(-) diff --git a/drivers/spi/spi-s

[PATCH 2/6] spi: sun6i: handle chip select polarity flag

The chip select polarity flag is declared as supported but is not handled in the code. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index f

[PATCH v2 4/6] spi: sun6i: use completion provided by SPI core

As long as the completion is already provided by the SPI core then there is no need to waste extra-memory on this. Also a waiting function was added to avoid code duplication. Changes in v2: 1) Fixed issue with passing an invalid argument into devm_request_irq() function. Signed-off-by: Sergey

[PATCH v2 1/6] spi: sun6i: coding style/readability improvements

-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.c | 97 + 1 file changed, 58 insertions(+), 39 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index 8533f4e..88ad45e 100644 --- a/drivers/spi/spi-s

[PATCH v2 6/6] spi: sun6i: add DMA transfers support

DMA transfers are now available for sun6i and sun8i SoCs. The DMA mode is used automatically as soon as requested transfer length is more than FIFO length. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.c | 296 -

[PATCH v2 0/6] spi: Add support for DMA transfers in sun6i SPI driver

is not available. 2) Fixed issue with passing an invalid argument into devm_request_irq() function. Sergey Suloev (6): spi: sun6i: coding style/readability improvements spi: sun6i: handle chip select polarity flag spi: sun6i: restrict transfer length in PIO-mode spi: sun6i: use completion provided

[PATCH v2 3/6] spi: sun6i: restrict transfer length in PIO-mode

There is no need to handle 3/4 empty/full interrupts as the maximum supported transfer length in PIO mode is 128 bytes for sun6i- and 64 bytes for sun8i-family SoCs. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.

[PATCH v2 5/6] spi: sun6i: introduce register set/unset helpers

Two helper functions were added in order to update registers easily. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.c | 39 +-- 1 file changed, 17 insertions(+), 22 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/d

[PATCH v2 2/6] spi: sun6i: handle chip select polarity flag

The chip select polarity flag is declared as supported but is not handled in the code. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index 8

[PATCH 5/6] spi: sun4i: introduce register set/unset helpers

Two helper functions were added in order to update registers easily. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun4i.c | 40 +++- 1 file changed, 19 insertions(+), 21 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/d

[PATCH 6/6] spi: sun4i: add DMA transfers support

DMA transfers are now available for sun4i-family SoCs. The DMA mode is used automatically as soon as requested transfer length is more than FIFO length. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun4i.c | 291 -

[PATCH 1/6] spi: core: handle timeout error from transfer_one()

As long as sun4i/sun6i SPI drivers have overriden the default "wait for completion" procedure then we need to properly handle -ETIMEDOUT error from transfer_one(). Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi.c | 5 +++-- 1 file changed, 3 insertions

[PATCH 0/6] spi: Add support for DMA transfers in sun4i SPI driver

The following patchset provides corrections for PIO-mode and support for DMA transfers in sun4i SPI driver. Sergey Suloev (6): spi: core: handle timeout error from transfer_one() spi: sun4i: restrict transfer length in PIO-mode spi: sun4i: coding style/readability improvements spi: sun4i

[PATCH 4/6] spi: sun4i: use completion provided by SPI core driver

As long as the completion already provided by the SPI core then there is no need to waste extra-memory on this. Also a waiting function was added to avoid code duplication. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun4i.

[PATCH 3/6] spi: sun4i: coding style/readability improvements

Minor changes to fulfill the coding style and improve the readability. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun4i.c | 32 +--- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drive

[PATCH 2/6] spi: sun4i: restrict transfer length in PIO-mode

There is no need to handle 3/4 empty/full interrupts as the maximum supported transfer length in PIO mode is 64 bytes for sun4i-family SoCs. As long as a problem was reported previously with filling FIFO on A10s then we stick with 63 bytes depth. Signed-off-by: Sergey Suloev <s

[PATCH v3 2/6] spi: sun6i: handle chip select polarity flag

The chip select polarity flag is declared as supported but is not handled in the code. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index 8

[PATCH v3 1/6] spi: sun6i: coding style/readability improvements

-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.c | 97 + 1 file changed, 58 insertions(+), 39 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index 8533f4e..88ad45e 100644 --- a/drivers/spi/spi-s

[PATCH v2 6/6] spi: sun4i: add DMA transfers support

DMA transfers are now available for sun4i-family SoCs. The DMA mode is used automatically as soon as requested transfer length is more than FIFO length. Changes in v2: 1) Debug log enhancements. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun4i.c

[PATCH v2 0/6] spi: Add support for DMA transfers in sun4i SPI driver

The following patchset provides corrections for PIO-mode and support for DMA transfers in sun4i SPI driver. Changes in v2: 1) Restored processing of 3/4 FIFO full interrupt. 2) Debug log enhancements. Sergey Suloev (6): spi: core: handle timeout error from transfer_one() spi: sun4i

[PATCH v2 2/6] spi: sun4i: restrict transfer length in PIO-mode

. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun4i.c | 37 ++--- 1 file changed, 10 insertions(+), 27 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 4141003..08fd007 100644 --- a/drivers/spi/spi-s

[PATCH v3 6/6] spi: sun6i: add DMA transfers support

DMA transfers are now available for sun6i and sun8i SoCs. The DMA mode is used automatically as soon as requested transfer length is more than FIFO length. Changes in v3: 1) Debug log enhancements. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.c

[PATCH v3 5/6] spi: sun6i: introduce register set/unset helpers

Two helper functions were added in order to set/unset specified flags in registers. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun6i.c | 37 - 1 file changed, 16 insertions(+), 21 deletions(-) diff --git a/drivers/spi/spi-s

[PATCH v3 0/6] spi: Add support for DMA transfers in sun6i SPI driver

is not available. 2) Fixed issue with passing an invalid argument into devm_request_irq() function. Changes in v3: 1) Restored processing of 3/4 FIFO full interrupt. 2) Debug log enhancements. Sergey Suloev (6): spi: sun6i: coding style/readability improvements spi: sun6i: handle chip select polarity

[PATCH v3 4/6] spi: sun6i: use completion provided by SPI core

As long as the completion is already provided by the SPI core then there is no need to waste extra-memory on this. Also a waiting function was added to avoid code duplication. Changes in v2: 1) Fixed issue with passing an invalid argument into devm_request_irq() function. Signed-off-by: Sergey

[PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

There is no need to handle 3/4 empty interrupt as the maximum supported transfer length in PIO mode is equal to FIFO depth, i.e. 128 bytes for sun6i and 64 bytes for sun8i SoCs. Changes in v3: 1) Restored processing of 3/4 FIFO full interrupt. Signed-off-by: Sergey Suloev <ssul...@orpaltech.

Re: [PATCH v2 1/6] spi: core: handle timeout error from transfer_one()

On 04/03/2018 06:52 PM, Mark Brown wrote: On Tue, Apr 03, 2018 at 06:29:00PM +0300, Sergey Suloev wrote: As long as sun4i/sun6i SPI drivers have overriden the default "wait for completion" procedure then we need to properly handle -ETIMEDOUT error from transfer_one(). Why is this

[PATCH v2 1/6] spi: core: handle timeout error from transfer_one()

As long as sun4i/sun6i SPI drivers have overriden the default "wait for completion" procedure then we need to properly handle -ETIMEDOUT error from transfer_one(). Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi.c | 5 +++-- 1 file changed, 3 insertions

[PATCH v2 4/6] spi: sun4i: use completion provided by SPI core driver

As long as the completion already provided by the SPI core then there is no need to waste extra-memory on this. Also a waiting function was added to avoid code duplication. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun4i.

[PATCH v2 3/6] spi: sun4i: coding style/readability improvements

Minor changes to fulfill the coding style and improve the readability. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun4i.c | 32 +--- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/s

[PATCH v2 5/6] spi: sun4i: introduce register set/unset helpers

Two helper functions were added in order to set/unset specified flags in registers. Signed-off-by: Sergey Suloev <ssul...@orpaltech.com> --- drivers/spi/spi-sun4i.c | 40 +++- 1 file changed, 19 insertions(+), 21 deletions(-) diff --git a/drivers/s

Re: [PATCH v2 1/6] spi: core: handle timeout error from transfer_one()

On 04/03/2018 07:18 PM, Mark Brown wrote: On Tue, Apr 03, 2018 at 07:00:55PM +0300, Sergey Suloev wrote: On 04/03/2018 06:52 PM, Mark Brown wrote: On Tue, Apr 03, 2018 at 06:29:00PM +0300, Sergey Suloev wrote: As long as sun4i/sun6i SPI drivers have overriden the default "wait for compl

[PATCH 5/6] spi: sun4i: introduce register set/unset helpers

Two helper functions were added in order to update registers easily. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun4i.c | 40 +++- 1 file changed, 19 insertions(+), 21 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index

[PATCH 6/6] spi: sun4i: add DMA transfers support

DMA transfers are now available for sun4i-family SoCs. The DMA mode is used automatically as soon as requested transfer length is more than FIFO length. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun4i.c | 291 1 file changed, 271

[PATCH 1/6] spi: core: handle timeout error from transfer_one()

As long as sun4i/sun6i SPI drivers have overriden the default "wait for completion" procedure then we need to properly handle -ETIMEDOUT error from transfer_one(). Signed-off-by: Sergey Suloev --- drivers/spi/spi.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)

[PATCH 0/6] spi: Add support for DMA transfers in sun4i SPI driver

The following patchset provides corrections for PIO-mode and support for DMA transfers in sun4i SPI driver. Sergey Suloev (6): spi: core: handle timeout error from transfer_one() spi: sun4i: restrict transfer length in PIO-mode spi: sun4i: coding style/readability improvements spi: sun4i

[PATCH 4/6] spi: sun4i: use completion provided by SPI core driver

As long as the completion already provided by the SPI core then there is no need to waste extra-memory on this. Also a waiting function was added to avoid code duplication. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun4i.c | 62 - 1 file

[PATCH 3/6] spi: sun4i: coding style/readability improvements

Minor changes to fulfill the coding style and improve the readability. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun4i.c | 32 +--- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 2a49c22

[PATCH 2/6] spi: sun4i: restrict transfer length in PIO-mode

There is no need to handle 3/4 empty/full interrupts as the maximum supported transfer length in PIO mode is 64 bytes for sun4i-family SoCs. As long as a problem was reported previously with filling FIFO on A10s then we stick with 63 bytes depth. Signed-off-by: Sergey Suloev --- drivers/spi

[PATCH 4/6] spi: sun6i: use completion provided by SPI core

As long as the completion is already provided by the SPI core then there is no need to waste extra-memory on this. Also a waiting function was added to avoid code duplication. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun6i.c | 50 - 1

[PATCH 5/6] spi: sun6i: introduce register set/unset helpers

Two helper functions were added in order to update registers easily. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun6i.c | 31 +++ 1 file changed, 15 insertions(+), 16 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index fc43752

[PATCH 6/6] spi: sun6i: add DMA transfers support

DMA transfers are now available for sun6i and sun8i SoCs. The DMA mode is used automatically as soon as requested transfer length is more than FIFO length. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun6i.c | 296 1 file changed, 275

[PATCH 3/6] spi: sun6i: restrict transfer length in PIO-mode

There is no need to handle 3/4 empty/full interrupts as the maximum supported transfer length in PIO mode is 128 bytes for sun6i- and 64 bytes for sun8i-family SoCs. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun6i.c | 61 ++--- 1 file changed

[PATCH 2/6] spi: sun6i: handle chip select polarity flag

The chip select polarity flag is declared as supported but is not handled in the code. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun6i.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index ff790dc..f992a7d 100644

[PATCH 0/6] spi: Add support for DMA transfers in sun6i SPI driver

The following patchset provides corrections for PIO-mode and support for DMA transfers in sun6i SPI driver. Sergey Suloev (6): spi: sun6i: coding style/readability improvements spi: sun6i: handle chip select polarity flag spi: sun6i: restrict transfer length in PIO-mode spi: sun6i: use

[PATCH 1/6] spi: sun6i: coding style/readability improvements

Minor changes to fulfill the coding style and improve the readability. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun6i.c | 115 +++- 1 file changed, 65 insertions(+), 50 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi

[PATCH v2 2/6] spi: sun6i: handle chip select polarity flag

The chip select polarity flag is declared as supported but is not handled in the code. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun6i.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index 88ad45e..78acc1f 100644

[PATCH v2 6/6] spi: sun6i: add DMA transfers support

DMA transfers are now available for sun6i and sun8i SoCs. The DMA mode is used automatically as soon as requested transfer length is more than FIFO length. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun6i.c | 296 1 file changed, 275

[PATCH v2 0/6] spi: Add support for DMA transfers in sun6i SPI driver

is not available. 2) Fixed issue with passing an invalid argument into devm_request_irq() function. Sergey Suloev (6): spi: sun6i: coding style/readability improvements spi: sun6i: handle chip select polarity flag spi: sun6i: restrict transfer length in PIO-mode spi: sun6i: use completion provided

[PATCH v2 3/6] spi: sun6i: restrict transfer length in PIO-mode

There is no need to handle 3/4 empty/full interrupts as the maximum supported transfer length in PIO mode is 128 bytes for sun6i- and 64 bytes for sun8i-family SoCs. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun6i.c | 61 ++--- 1 file changed

[PATCH v2 5/6] spi: sun6i: introduce register set/unset helpers

Two helper functions were added in order to update registers easily. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun6i.c | 39 +-- 1 file changed, 17 insertions(+), 22 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index

[PATCH v2 4/6] spi: sun6i: use completion provided by SPI core

As long as the completion is already provided by the SPI core then there is no need to waste extra-memory on this. Also a waiting function was added to avoid code duplication. Changes in v2: 1) Fixed issue with passing an invalid argument into devm_request_irq() function. Signed-off-by: Sergey

[PATCH v2 1/6] spi: sun6i: coding style/readability improvements

-by: Sergey Suloev --- drivers/spi/spi-sun6i.c | 97 + 1 file changed, 58 insertions(+), 39 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index 8533f4e..88ad45e 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi

Re: [PATCH 7/7] ARM: dts: sun7i: Add dts file for the A20-linova1-7 HMI

Hi, Giulio, On 05/05/2018 12:52 AM, Giulio Benetti wrote: Hi Maxime! Il 04/05/2018 10:06, Maxime Ripard ha scritto: Hi, On Wed, May 02, 2018 at 06:41:34PM +0200, Giulio Benetti wrote: You don't have to handcode the fragments anymore with the new syntax, and U-Boot makes it really trivial to

Re: [PATCH v2 12/26] drm/sun4i: Add support for multiple DW HDMI PHY clock parents

Hi, guys, On 05/18/2018 05:46 PM, Jernej Škrabec wrote: Hi, Dne petek, 18. maj 2018 ob 12:01:16 CEST je Maxime Ripard napisal(a): On Fri, May 18, 2018 at 03:15:22PM +0530, Jagan Teki wrote: From: Jernej Skrabec Some SoCs with DW HDMI have multiple possible clock parents, like A64 and R40.

Re: [PATCH v2 12/26] drm/sun4i: Add support for multiple DW HDMI PHY clock parents

Hi, Jernej, On 05/18/2018 06:15 PM, Jernej Škrabec wrote: Hi, Dne petek, 18. maj 2018 ob 17:09:40 CEST je Sergey Suloev napisal(a): Hi, guys, On 05/18/2018 05:46 PM, Jernej Škrabec wrote: Hi, Dne petek, 18. maj 2018 ob 12:01:16 CEST je Maxime Ripard napisal(a): On Fri, May 18, 2018 at 03

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/04/2018 09:50 AM, Maxime Ripard wrote: On Tue, Apr 03, 2018 at 06:44:46PM +0300, Sergey Suloev wrote: There is no need to handle 3/4 empty interrupt as the maximum supported transfer length in PIO mode is equal to FIFO depth, i.e. 128 bytes for sun6i and 64 bytes for sun8i SoCs. Changes

Re: [PATCH v2 1/6] spi: core: handle timeout error from transfer_one()

On 04/04/2018 10:08 AM, Maxime Ripard wrote: On Tue, Apr 03, 2018 at 07:24:11PM +0300, Sergey Suloev wrote: On 04/03/2018 07:18 PM, Mark Brown wrote: On Tue, Apr 03, 2018 at 07:00:55PM +0300, Sergey Suloev wrote: On 04/03/2018 06:52 PM, Mark Brown wrote: On Tue, Apr 03, 2018 at 06:29:00PM

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/05/2018 12:19 PM, Maxime Ripard wrote: On Wed, Apr 04, 2018 at 02:35:14PM +0300, Sergey Suloev wrote: On 04/04/2018 09:50 AM, Maxime Ripard wrote: On Tue, Apr 03, 2018 at 06:44:46PM +0300, Sergey Suloev wrote: There is no need to handle 3/4 empty interrupt as the maximum supported

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/05/2018 04:17 PM, Mark Brown wrote: On Thu, Apr 05, 2018 at 12:59:35PM +0300, Sergey Suloev wrote: On 04/05/2018 12:19 PM, Maxime Ripard wrote: The point of that patch was precisely to allow to send more data than the FIFO. You're breaking that behaviour without any justification

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/09/2018 02:36 PM, Maxime Ripard wrote: On Mon, Apr 09, 2018 at 02:10:40PM +0300, Sergey Suloev wrote: On 04/09/2018 01:50 PM, Mark Brown wrote: On Mon, Apr 09, 2018 at 01:26:23PM +0300, Sergey Suloev wrote: On 04/09/2018 12:27 PM, Maxime Ripard wrote: On Fri, Apr 06, 2018 at 06:48:23PM

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/06/2018 10:34 AM, Maxime Ripard wrote: On Thu, Apr 05, 2018 at 04:44:16PM +0300, Sergey Suloev wrote: On 04/05/2018 04:17 PM, Mark Brown wrote: On Thu, Apr 05, 2018 at 12:59:35PM +0300, Sergey Suloev wrote: On 04/05/2018 12:19 PM, Maxime Ripard wrote: The point of that patch

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/06/2018 10:34 AM, Maxime Ripard wrote: On Thu, Apr 05, 2018 at 04:44:16PM +0300, Sergey Suloev wrote: On 04/05/2018 04:17 PM, Mark Brown wrote: On Thu, Apr 05, 2018 at 12:59:35PM +0300, Sergey Suloev wrote: On 04/05/2018 12:19 PM, Maxime Ripard wrote: The point of that patch

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/09/2018 12:27 PM, Maxime Ripard wrote: On Fri, Apr 06, 2018 at 06:48:23PM +0300, Sergey Suloev wrote: On 04/06/2018 10:34 AM, Maxime Ripard wrote: On Thu, Apr 05, 2018 at 04:44:16PM +0300, Sergey Suloev wrote: On 04/05/2018 04:17 PM, Mark Brown wrote: On Thu, Apr 05, 2018 at 12:59:35PM

Re: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode

On 04/09/2018 01:50 PM, Mark Brown wrote: On Mon, Apr 09, 2018 at 01:26:23PM +0300, Sergey Suloev wrote: On 04/09/2018 12:27 PM, Maxime Ripard wrote: On Fri, Apr 06, 2018 at 06:48:23PM +0300, Sergey Suloev wrote: On 04/06/2018 10:34 AM, Maxime Ripard wrote: According to what you said

Re: [PATCH 2/6] spi: sun4i: restrict transfer length in PIO-mode

On 04/03/2018 11:10 AM, Maxime Ripard wrote: On Thu, Mar 29, 2018 at 09:59:03PM +0300, Sergey Suloev wrote: There is no need to handle 3/4 empty/full interrupts as the maximum supported transfer length in PIO mode is 64 bytes for sun4i-family SoCs. That assumes that you'll be able to treat

Re: [PATCH 5/6] spi: sun4i: introduce register set/unset helpers

On 04/03/2018 11:14 AM, Maxime Ripard wrote: On Thu, Mar 29, 2018 at 09:59:06PM +0300, Sergey Suloev wrote: Two helper functions were added in order to update registers easily. Signed-off-by: Sergey Suloev I'm not really sure what's easier about this one. Maxime

Re: [PATCH 2/6] spi: sun4i: restrict transfer length in PIO-mode

On 04/03/2018 11:10 AM, Maxime Ripard wrote: On Thu, Mar 29, 2018 at 09:59:03PM +0300, Sergey Suloev wrote: There is no need to handle 3/4 empty/full interrupts as the maximum supported transfer length in PIO mode is 64 bytes for sun4i-family SoCs. That assumes that you'll be able to treat

Re: [PATCH 2/6] spi: sun4i: restrict transfer length in PIO-mode

On 04/03/2018 02:40 PM, Maxime Ripard wrote: On Tue, Apr 03, 2018 at 02:08:43PM +0300, Sergey Suloev wrote: On 04/03/2018 11:10 AM, Maxime Ripard wrote: On Thu, Mar 29, 2018 at 09:59:03PM +0300, Sergey Suloev wrote: There is no need to handle 3/4 empty/full interrupts as the maximum supported

Re: [PATCH 6/6] spi: sun4i: add DMA transfers support

On 04/03/2018 11:17 AM, Maxime Ripard wrote: On Thu, Mar 29, 2018 at 09:59:07PM +0300, Sergey Suloev wrote: +static int sun4i_spi_dma_setup(struct device *dev, + struct resource *res) +{ + struct spi_master *master = dev_get_drvdata(dev); + struct

[PATCH v2 0/6] spi: Add support for DMA transfers in sun4i SPI driver

The following patchset provides corrections for PIO-mode and support for DMA transfers in sun4i SPI driver. Changes in v2: 1) Restored processing of 3/4 FIFO full interrupt. 2) Debug log enhancements. Sergey Suloev (6): spi: core: handle timeout error from transfer_one() spi: sun4i

[PATCH v2 2/6] spi: sun4i: restrict transfer length in PIO-mode

. Signed-off-by: Sergey Suloev --- drivers/spi/spi-sun4i.c | 37 ++--- 1 file changed, 10 insertions(+), 27 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index 4141003..08fd007 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi

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