The allocated range check is removed. On 32bit ARM kernel with LPAE
enabled the base may be allocated outside the fist 4GB of physical
memory (keystone SoC for example).
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
---
drivers/base/dma-contiguous.c |6 +-
1 f
The allocated range check is removed. On 32bit ARM kernel with LPAE
enabled the base may be allocated outside the fist 4GB of physical
memory (keystone SoC for example).
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
---
drivers/base/dma-contiguous.c |
a problem on 32-bit PAE machines where unsigned long is 32-bit
but physical address space is larger.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
---
drivers/base/dma-contiguous.c | 24 ++--
include/linux/dma-contiguous.h |4 ++--
2 files changed
The Keystone SA module has a hardware random generator module.
This commit adds binding doc for the KS2 SA HWRNG driver.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Murali Karicheri
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/rng/ks-sa-rng.txt | 21
Keyston2 Security Accelerator has a hardware random generator sub-module.
This series adds the driver for the sub-module.
Changes in v2:
- Changed subject prefix in 1/2 patch
- renamed dts node
Vitaly Andrianov (2):
dt-bindings: rng: add bindings doc for Keystone SA HWRNG driver
hw_random
Keystone Security Accelerator module has a hardware random generator
sub-module. This commit adds the driver for this sub-module.
Signed-off-by: Vitaly Andrianov
[t-kri...@ti.com: dropped one unnecessary dev_err message]
Signed-off-by: Tero Kristo
Signed-off-by: Murali Karicheri
---
drivers
This patch adds dts node for k2e hw_random generator driver
Signed-off-by: Vitaly Andrianov
Signed-off-by: Murali Karicheri
---
arch/arm/boot/dts/keystone-k2e-netcp.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
b/arch
This patch adds dts node for k2hk hw_random generator driver
Signed-off-by: Vitaly Andrianov
[t-kri...@ti.com: added missing addresses from node identifiers]
Signed-off-by: Tero Kristo
Signed-off-by: Murali Karicheri
---
arch/arm/boot/dts/keystone-k2hk-netcp.dtsi | 20
1
This series adds dts nodes for Keystone2 hw_rng driver
Vitaly Andrianov (3):
ARM: dts: k2hk: add dts node for k2hk hw_rng driver
ARM: dts: k2l: add dts node for k2l hw_rng driver
ARM: dts: k2e: add dts node for k2e hw_rng driver
arch/arm/boot/dts/keystone-k2e-netcp.dtsi | 20
This patch adds dts node for k2l hw_random generator driver
Signed-off-by: Vitaly Andrianov
[t-kri...@ti.com: added missing addresses from node identifiers]
Signed-off-by: Tero Kristo
Signed-off-by: Murali Karicheri
---
arch/arm/boot/dts/keystone-k2l-netcp.dtsi | 20
1
On a 32 bit ARM architecture with LPAE extension physical addresses
cannot fit into unsigned long variable.
This patch fixes the ioremap_page, __map_ioremap_pfn_caller,
__arm_ioremap and __arm_ioremap_exec functions.
Signed-off-by: Vitaly Andrianov
Acked-by: Murali Karicheri
---
arch/arm
On a 32 bit ARM architecture with LPAE extension physical addresses
cannot fit into unsigned long variable.
This patch fixes the ioremap_page function.
Signed-off-by: Vitaly Andrianov
Acked-by: Murali Karicheri
- Fixing the commit log and resending
---
arch/arm/include/asm/mach/map.h | 2
On 01/14/2015 12:44 PM, Russell King - ARM Linux wrote:
On Wed, Jan 14, 2015 at 12:44:12PM -0500, Vitaly Andrianov wrote:
On a 32 bit ARM architecture with LPAE extension physical addresses
cannot fit into unsigned long variable.
This patch fixes the ioremap_page function.
Signed-off-by
This patch removes unused ioremap_page().
Signed-off-by: Vitaly Andrianov
---
arch/arm/include/asm/mach/map.h | 5 -
arch/arm/mm/ioremap.c | 8
2 files changed, 13 deletions(-)
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index f98c7f3
This patch fixes pfn_to_kaddr() to use phys_addr_t. Without this,
this macro is broken on LPAE systems. For physical addresses above
first 4GB result of shifting pfn with PAGE_SHIFT may be truncated.
Signed-off-by: Vitaly Andrianov
---
arch/arm/include/asm/memory.h | 2 +-
1 file changed, 1
This patch is to get correct physical address of the reset function for
PAE systems, which use aliased physical memory for booting.
See the "ARM: mm: Introduce virt_to_idmap() with an arch hook" for details.
Signed-off-by: Vitaly Andrianov
---
arch/arm/kernel/reboot.c | 2 +-
1 file
Interrupts for GPIOs 16 through 31 are enabled by bit 1 in the
"binten" register (offset 8). Previous versions of GPIO only
used bit 0, which enables GPIO 0-15 interrupts.
Signed-off-by: Reece Pollack
Signed-off-by: Vitaly Andrianov
---
drivers/gpio/gpio-davinci.c | 2 ++
1 file
This patch adds ARM L1/L2 ECC handler support and DDR3 ECC interrupt
handling for Keystone II devices, the kernel will reboot if the error
is 2-bit error for DDR ECC or L1/L2 ECC error.
Signed-off-by: Hao Zhang
Signed-off-by: Murali Karicheri
Signed-off-by: Vitaly Andrianov
---
arch/arm/mach
The Keystone SA module has a hardware random generator module.
This commit adds binding doc for the KS2 SA HWRNG driver.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Murali Karicheri
---
Documentation/devicetree/bindings/rng/ks-sa-rng.txt | 21 +
1 file changed, 21
Keystone Security Accelerator module has a hardware random generator
sub-module. This commit adds the driver for this sub-module.
Signed-off-by: Vitaly Andrianov
[t-kri...@ti.com: dropped one unnecessary dev_err message]
Signed-off-by: Tero Kristo
Signed-off-by: Murali Karicheri
---
drivers
Keyston2 Security Accelerator has a hardware random generator sub-module.
This series adds the driver for the sub-module.
Vitaly Andrianov (2):
Documentation: dt: rng: add bindings doc for Keystone SA HWRNG driver
hw_random: keystone2: add hw_random driver
.../devicetree/bindings/rng/ks-sa
On 07/16/2015 05:04 AM, Sekhar Nori wrote:
On Tuesday 14 July 2015 07:31 PM, Linus Walleij wrote:
On Thu, Jun 18, 2015 at 7:10 PM, Vitaly Andrianov wrote:
Interrupts for GPIOs 16 through 31 are enabled by bit 1 in the
"binten" register (offset 8). Previous versions of GPIO only
On 07/17/2015 01:02 AM, Sekhar Nori wrote:
On Thursday 16 July 2015 11:11 PM, Vitaly Andrianov wrote:
On 07/16/2015 05:04 AM, Sekhar Nori wrote:
On Tuesday 14 July 2015 07:31 PM, Linus Walleij wrote:
On Thu, Jun 18, 2015 at 7:10 PM, Vitaly Andrianov
wrote:
Interrupts for GPIOs 16
On 07/17/2015 08:16 AM, Linus Walleij wrote:
On Thu, Jul 2, 2015 at 8:31 PM, Vitaly Andrianov wrote:
Interrupts for GPIOs 16 through 31 are enabled by bit 1 in the
"binten" register (offset 8). Previous versions of GPIO only
used bit 0, which enables GPIO 0-15 interrupts.
Sig
The "ARM: mm: Introduce virt_to_idmap() with an arch hook" defines
arch_virt_to_idmap hook in arch/arm/mm/idmap.c. That breaks systems w/o
MMU because that file is not built for them.
This patch fixes this bug.
Signed-off-by: Vitaly Andrianov
---
arch/arm/include/asm/memory.h | 4 ++
On 06/29/2015 05:37 PM, Russell King - ARM Linux wrote:
On Mon, Jun 29, 2015 at 10:28:14PM +0100, Russell King - ARM Linux wrote:
On Mon, Jun 29, 2015 at 02:43:44PM -0400, Vitaly Andrianov wrote:
On 06/29/2015 01:52 PM, Mark Rutland wrote:
On Mon, Jun 29, 2015 at 06:52:32PM +0100, Vitaly
On 06/30/2015 10:54 AM, Russell King - ARM Linux wrote:
On Tue, Jun 30, 2015 at 09:47:55AM -0400, Vitaly Andrianov wrote:
On 06/29/2015 05:37 PM, Russell King - ARM Linux wrote:
Oh, it was Murali who tested it, not yourself. Sorry. Suggest you
dig out the patches either from mainline
If we enable psci support we don't need keystone_smp_ops anymore.
Signed-off-by: Vitaly Andrianov
---
arch/arm/mach-keystone/Makefile | 2 ++
arch/arm/mach-keystone/keystone.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm/mach-keystone/Makefile b/arch/arm/mach-key
This commit adds definition for cpu_on, cpu_off and cpu_suspend commands.
These definitions must match the corresponding PSCI definitions in
boot monitor.
Signed-off-by: Vitaly Andrianov
---
arch/arm/boot/dts/keystone.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm
On 07/01/2015 08:41 AM, Mark Rutland wrote:
On Wed, Jul 01, 2015 at 01:13:04PM +0100, Vitaly Andrianov wrote:
This commit adds definition for cpu_on, cpu_off and cpu_suspend commands.
These definitions must match the corresponding PSCI definitions in
boot monitor.
Signed-off-by: Vitaly
Interrupts for GPIOs 16 through 31 are enabled by bit 1 in the
"binten" register (offset 8). Previous versions of GPIO only
used bit 0, which enables GPIO 0-15 interrupts.
Signed-off-by: Vitaly Andrianov
---
I posted this patch on 06/18/15 and didn't get any response.
Please, c
Interrupts for GPIOs 16 through 31 are enabled by bit 1 in the
"binten" register (offset 8). Previous versions of GPIO only
used bit 0, which enables GPIO 0-15 interrupts.
Signed-off-by: Vitaly Andrianov
Reviewed-by: Grygorii Strashko
---
History
v2.
- use GENMASK to set binten. Than
Hello,
I'm working on two drivers "crypto" and "hwrng", which use the same
hardware module and the same block of registers. Actually the drivers
don't need to access the same registers except several common ones.
Here is fragment of dts.
sa_subsys: subsys@1234000 {
compatible =
On 06/29/2016 02:31 PM, Mark Brown wrote:
On Wed, Jun 29, 2016 at 01:19:37PM -0400, Vitaly Andrianov wrote:
Here is my question. Is that actually possible to use in regmap framework
the same registers in multiple different drivers?
Of course, this is how the vast majority of MFDs work. The
This commit add cpu_die implementation using psci api
Signed-off-by: Vitaly Andrianov
---
arch/arm/mach-keystone/platsmp.c | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c
index 5f46a7c
software
v1: initial version in one patch
Vitaly Andrianov (3):
ARM: keystone: clean and sort keystone.c headers
ARM: keystone: ecc: add ARM L1/L2 ecc interrupt handling
ARM: keystone: ecc: add DDR3 ecc interrupt handling
.../devicetree/bindings/arm/keystone/keystone.txt | 17 +++
arch/arm
This patch remove unused and sort remaining headers.
Signed-off-by: Vitaly Andrianov
---
arch/arm/mach-keystone/keystone.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-keystone/keystone.c
b/arch/arm/mach-keystone/keystone.c
index 0662087
This patch adds DDR3 ECC handler support interrupt handling
for Keystone II devices, the kernel will reboot if the error
is 2-bit error for DDR3 ECC error.
Signed-off-by: Hao Zhang
Signed-off-by: Murali Karicheri
Signed-off-by: Vitaly Andrianov
---
.../devicetree/bindings/arm/keystone
This patch adds ARM L1/L2 ECC handler support interrupt handling
for Keystone II devices, the kernel will reboot if the error
is 2-bit error for L1/L2 ECC error.
Signed-off-by: Hao Zhang
Signed-off-by: Murali Karicheri
Signed-off-by: Vitaly Andrianov
---
arch/arm/mach-keystone/keystone.c | 69
On 06/25/2015 10:59 AM, santosh shilimkar wrote:
On 6/25/2015 7:45 AM, Mark Rutland wrote:
Hi,
On Thu, Jun 25, 2015 at 03:02:50PM +0100, Vitaly Andrianov wrote:
This commit add cpu_die implementation using psci api
I don't understand. If you have a PSCI implementation, it shou
On 06/25/2015 12:13 PM, Mark Rutland wrote:
On Thu, Jun 25, 2015 at 05:01:36PM +0100, Vitaly Andrianov wrote:
On 06/25/2015 10:59 AM, santosh shilimkar wrote:
On 6/25/2015 7:45 AM, Mark Rutland wrote:
Hi,
On Thu, Jun 25, 2015 at 03:02:50PM +0100, Vitaly Andrianov wrote:
This commit add
On 06/25/2015 05:35 PM, Stephen Boyd wrote:
On 06/25/2015 02:30 PM, santosh shilimkar wrote:
On 6/25/2015 2:02 PM, Stephen Boyd wrote:
On 06/25/2015 08:04 AM, santosh shilimkar wrote:
On 6/25/2015 7:31 AM, Vitaly Andrianov wrote:
This patch series adds support for arm L1/L2 ecc and ddr3
On 06/25/2015 02:42 PM, santosh shilimkar wrote:
On 6/25/2015 10:20 AM, Mark Rutland wrote:
I need rework and re-test the patch.
One more question. Shall I post the dts related commit, which add PSCI
command together with this commit? Or it may be posted later
independently?
The DTS and Kcon
On 06/26/2015 01:47 PM, Grygorii Strashko wrote:
Hi,
On 06/26/2015 07:57 PM, Vitaly Andrianov wrote:
On 06/25/2015 02:42 PM, santosh shilimkar wrote:
On 6/25/2015 10:20 AM, Mark Rutland wrote:
I need rework and re-test the patch.
One more question. Shall I post the dts related commit
This commit add cpu_die implementation
Signed-off-by: Vitaly Andrianov
---
The discussion of the "keystone: psci: adds cpu_die implementation" commit
shows that if PCSI is enabled platform code doesn't need that implementation
at all. Having PSCI commands in DTB shoul
On 06/29/2015 01:52 PM, Mark Rutland wrote:
On Mon, Jun 29, 2015 at 06:52:32PM +0100, Vitaly Andrianov wrote:
This commit add cpu_die implementation
Signed-off-by: Vitaly Andrianov
---
The discussion of the "keystone: psci: adds cpu_die implementation" commit
shows that if PCSI
: Vitaly Andrianov
---
include/net/sctp/sctp.h | 1 +
net/sctp/outqueue.c | 1 +
net/sctp/proc.c | 2 ++
3 files changed, 4 insertions(+)
diff --git a/include/net/sctp/sctp.h b/include/net/sctp/sctp.h
index ce13cf2..fd806ea 100644
--- a/include/net/sctp/sctp.h
+++ b/include/net/sctp
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