Mediatek V4l2 depend on the IOMMU and SMI. we should add probe-defer
to wait for the IOMMU and SMI is ready.
Signed-off-by: Yong Wu
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/media/platform/mtk-vcodec
If DRM begin to probe before SMI probe done. It will hang:
[7.832359] Call trace:
[7.834778] [] mtk_smi_larb_get+0x24/0xa8
[7.840300] [] mtk_drm_crtc_enable+0x6c/0x450
Use the new interface(mtk_smi_larb_is_ready) to wait for IOMMU and
SMI probe done.
Signed-off-by: Yong Wu
eir probe. If it return false, the iommu consumer should
probe-defer for the IOMMU and SMI.
Signed-off-by: Yong Wu
---
Adding this interface is for avoid adjust the sequence of power
domain probe[1]. This patch-set is based on next-20160719. And
patch[1/3] base on [2], patch[3/3] base on [3], b
On Fri, 2015-10-09 at 19:19 +0100, Will Deacon wrote:
> On Fri, Oct 09, 2015 at 06:41:51PM +0100, Robin Murphy wrote:
> > On 09/10/15 16:57, Will Deacon wrote:
> > >On Tue, Sep 22, 2015 at 03:12:47PM +0100, Yong Wu wrote:
> > >> I would like to show you a problem
On Wed, 2015-10-14 at 14:56 +0200, Joerg Roedel wrote:
> On Fri, Oct 09, 2015 at 10:23:02AM +0800, Yong Wu wrote:
> > Yong Wu (6):
> > dt-bindings: iommu: Add binding for mediatek IOMMU
> > dt-bindings: mediatek: Add smi dts binding
> > iommu: add ARM short desc
On Wed, 2015-10-14 at 14:53 +0200, Joerg Roedel wrote:
> On Fri, Oct 09, 2015 at 10:23:07AM +0800, Yong Wu wrote:
> > + /*
> > +* There is a domain for each a iommu device in normal case.
> > +* But MTK only has one iommu domain called the m4u domain which all
>
On Wed, 2018-01-24 at 14:55 +, Robin Murphy wrote:
> On 23/01/18 08:39, Yong Wu wrote:
> > In the commit 05f80300dc8b ("iommu: Finish making iommu_group support
> > mandatory"), the iommu framework has supposed all the iommu drivers have
> > their owner iommu
Zhang
Fixes: 05f80300dc8b ('iommu: Finish making iommu_group support mandatory')
Reported-by: Ryder Lee
Signed-off-by: Yong Wu
---
changes notes:
v3: don't use the global variable and allocate a new iommu group before
arm_iommu_attach_device following Robin
umer devices to fix this issue.
CC: Robin Murphy
CC: Honghui Zhang
Fixes: 05f80300dc8b ("iommu: Finish making iommu_group support mandatory")
Reported-by: Ryder Lee
Signed-off-by: Yong Wu
---
Change notes:
v4: Get rid of device_group callback.
v3: https://lists.linuxfoundation
omain.
CC: Robin Murphy
CC: Honghui Zhang
Fixes: 05f80300dc8b ('iommu: Finish making iommu_group support mandatory')
Reported-by: Ryder Lee
Tested-by: Bibby Hsieh
Signed-off-by: Yong Wu
---
base on v4.15-rc1
---
drivers/iommu/mtk_iommu_v1.c | 41 ++
xes: 05f80300dc8b ("iommu: Finish making iommu_group support mandatory")
Reported-by: Ryder Lee
Tested-by: Bibby Hsieh
Signed-off-by: Yong Wu
---
changes since v1:
Add mtk_domain_v1=NULL in domain_free for symmetry.
v1: https://patchwork.kernel.org/patch/10176255/
---
drivers/iommu/
On Thu, 2018-01-25 at 12:02 +, Robin Murphy wrote:
> On 25/01/18 11:14, Yong Wu wrote:
> > In the commit 05f80300dc8b, the iommu framework has supposed all the
> > iommu drivers have their owner iommu-group, it get rid of the FIXME
> > workarounds while the group is
Hi Joerg,
On Tue, 2018-03-20 at 13:57 -0500, Joerg Roedel wrote:
> On Sun, Mar 18, 2018 at 09:52:54AM +0800, Yong Wu wrote:
> > To avoid adding this complex macro or a new function, I put
> > it in the code and backup its value in the suspend registers.
>
> Missing Signed-o
On Wed, 2018-03-21 at 06:14 -0500, Joerg Roedel wrote:
> On Wed, Mar 21, 2018 at 01:18:24PM +0800, Yong Wu wrote:
> > On Tue, 2018-03-20 at 13:57 -0500, Joerg Roedel wrote:
> > > On Sun, Mar 18, 2018 at 09:52:54AM +0800, Yong Wu wrote:
> > > > To avoid adding this c
t; clocks for smi-common and add a "gals" clock for smi-larb.
>From the diagram above, IPU0/IPU1(Image Processor Unit) and CCU(Camera
Control Unit) is connected with smi-common directly, we can take them
as "larb2", "larb3" and "larb7", and thei
patch for v7s two helpers(paddr_to_iopte and
iopte_to_paddr).
5) Change some comment for MTK 4GB mode.
v1: base on v4.19-rc1.
http://lists.infradead.org/pipermail/linux-mediatek/2018-September/014881.html
Arvind Yadav (1):
iommu/mediatek: Constify iommu_ops
Yong Wu (17):
dt-bindings: med
Use a struct as the platform special data instead of the enumeration.
This is a prepare patch for adding mt8183 iommu support.
Signed-off-by: Yong Wu
---
drivers/iommu/mtk_iommu.c | 24
drivers/iommu/mtk_iommu.h | 6 +-
2 files changed, 21 insertions(+), 9
Add two helper functions: paddr_to_iopte and iopte_to_paddr.
Signed-off-by: Yong Wu
Reviewed-by: Robin Murphy
---
drivers/iommu/io-pgtable-arm-v7s.c | 45 --
1 file changed, 33 insertions(+), 12 deletions(-)
diff --git a/drivers/iommu/io-pgtable-arm-v7s.c
8183.
Signed-off-by: Yong Wu
---
drivers/memory/mtk-smi.c | 35 ---
1 file changed, 24 insertions(+), 11 deletions(-)
diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
index 3b9ad0e..a5ddd42 100644
--- a/drivers/memory/mtk-smi.c
+++ b/drivers/memor
mt8183,
IPU0/1 and CCU connect with smi-common directly, they also are not
the normal larb. Hence, we add a "larb_special_mask" for these special
larbs.
This is also a preparing patch for adding mt8183 SMI support.
Signed-off-by: Yong Wu
---
drivers/memory/mtk-smi.c | 12 +-
address could be over 4GB, the mt8183
support it while the previous mt8173 don't. thus keep it as is.
Signed-off-by: Yong Wu
Reviewed-by: Robin Murphy
---
drivers/iommu/io-pgtable-arm-v7s.c | 31 ---
drivers/iommu/io-pgtable.h | 7 +++
driv
In some SoCs, M4U doesn't have its "bclk", it will use the EMI
clock instead which has always been enabled when entering kernel.
This also is a preparing patch for mt8183.
Signed-off-by: Yong Wu
---
drivers/iommu/mtk_iommu.c | 10 +++---
drivers/iommu/mtk_iommu.h | 3 +++
i-common.
...
If the larb-id reported in the isr is 7, actually it's larb1(vdec).
In order to output the right larb-id in the isr, we add a larb-id
remapping relationship in this patch.
This also is a preparing patch for mt8183.
Signed-off-by: Yong Wu
---
drivers/iommu/mt
above, we add "gals0" and
"gals1" clocks for smi-common and add a "gals" clock for smi-larb.
This patch adds gals clock supporting in the SMI. Note that some larbs
may still don't have the "gals" clock like larb1 and larb4 above.
This is also a prepar
dard ttbr0[1] means the S bit which is enabled defaultly, Hence,
we add a mask.
5) mt8183 HW has a GALS modules, SMI should enable "has_gals" support.
6) the larb-id in smi-common is remapped. M4U should enable
larbid_remapped support.
Signed-off-by:
hat register is 0 which means all the larbs go to mmu0
defaultly.
This is a preparing patch for adjusting SMI_BUS_SEL for mt8183.
Signed-off-by: Yong Wu
---
drivers/iommu/mtk_iommu.c | 47 +--
1 file changed, 29 insertions(+), 18 deletions(-)
diff --gi
so it gives a chance to get rid of mtk_smi_larb_get/put which could
be a next topic.
Signed-off-by: Yong Wu
---
drivers/memory/mtk-smi.c | 113 ++-
1 file changed, 72 insertions(+), 41 deletions(-)
diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-
mt8173 and mt2712, we don't get the performance issue,
Keep its default value(0x0), that means all the larbs enter mmu0.
Signed-off-by: Yong Wu
---
drivers/memory/mtk-smi.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/memory/mtk-sm
The register VLD_PA_RNG(0x118) was forgot to backup while adding 4GB
mode support for mt2712. this patch add it.
Fixes: 30e2fccf9512 ("iommu/mediatek: Enlarge the validate PA range
for 4GB mode")
Signed-off-by: Yong Wu
---
drivers/iommu/mtk_iommu.c | 2 ++
drivers/iommu/mtk_iommu.
d for mt2712
which have 2 M4Us. In the other SoCs, we can get the larb-id from M4U
in which the larbs in the "mediatek,larbs" always are ordered.
Signed-off-by: Yong Wu
---
drivers/memory/mtk-smi.c | 26 ++
1 file changed, 2 insertions(+), 24 deletions(-)
diff
Switch to SPDX license identifier for MediaTek iommu/smi and their
header files.
Signed-off-by: Yong Wu
Reviewed-by: Rob Herring
---
drivers/iommu/mtk_iommu.c | 10 +-
drivers/iommu/mtk_iommu.h | 10 +-
drivers/iommu/mtk_iommu_v1.c
In the reboot burning test, if some Multimedia HW has something wrong,
It may keep send the invalid request to IOMMU. In order to avoid
affect the reboot flow, we add the shutdown callback to disable
M4U HW when shutdown.
Signed-off-by: Yong Wu
---
drivers/iommu/mtk_iommu.c | 6 ++
1 file
From: Arvind Yadav
iommu_ops are not supposed to change at runtime.
Functions 'iommu_device_set_ops' and 'bus_set_iommu' working with
const iommu_ops provided by . So mark the non-const
structs as const.
Signed-off-by: Arvind Yadav
Signed-off-by: Yong Wu
[Yong: Chang
larb5larb7 larb8 larb9
disp0 vdec cam venc jpg mdp1/disp1 mdp2/disp2 mdp3 vdo/nr tvd
All the connections are HW fixed, SW can NOT adjust it.
Signed-off-by: Yong Wu
Acked-by: Rob Herring
---
change notes:
v4: change the license of the new file in this patch to SPDX.
v3: http
If CONFIG_RANDOMIZE_BASE is enabled, the "memstart_addr" will be updated
randomly, then the PHYS_OFFSET may be random.
Fixes: 82db33dc5e49 ("iommu/io-pgtable-arm: Check for v7s-incapable
systems")
Reported-by: CK Hu
Signed-off-by: Yong Wu
---
drivers/iommu/io-pgtable-arm-
> Signed-off-by: Joerg Roedel
> ---
> drivers/iommu/mtk_iommu.c| 21 -
> drivers/iommu/mtk_iommu_v1.c | 28
> 2 files changed, 28 insertions(+), 21 deletions(-)
Tested-by: Yong Wu
On Wed, 2018-12-12 at 13:39 +, Robin Murphy wrote:
> On 12/12/2018 13:02, Yong Wu wrote:
> > If CONFIG_RANDOMIZE_BASE is enabled, the "memstart_addr" will be updated
> > randomly, then the PHYS_OFFSET may be random.
>
> Oh, I hadn't ever realised that, goo
now.
And this check may lead to fail. For example, If CONFIG_RANDOMIZE_BASE
is enabled, the "memstart_addr" will be updated randomly, then the
PHYS_OFFSET may be random.
Reported-by: CK Hu
Signed-off-by: Yong Wu
---
drivers/iommu/io-pgtable-arm-v7s.c | 4
1 file changed, 4 d
On Fri, 2018-12-21 at 12:43 +0800, Nicolas Boichat wrote:
> On Sat, Dec 8, 2018 at 4:42 PM Yong Wu wrote:
> >
> > The M4U IP blocks in mt8183 is MediaTek's generation2 M4U which use
> > the ARM Short-descriptor like mt8173, and most of the HW registers
> > are
On Fri, 2018-12-21 at 12:47 +0800, Nicolas Boichat wrote:
> On Sat, Dec 8, 2018 at 4:43 PM Yong Wu wrote:
> >
> > There are 2 mmu cells in a M4U HW. we could adjust some larbs entering
> > mmu0 or mmu1 to balance the bandwidth via the smi-common register
> > SMI_BUS_SE
Hi Nicolas,
Thanks for the review of this patchset.
On Fri, 2018-12-21 at 11:35 +0800, Nicolas Boichat wrote:
> On Sat, Dec 8, 2018 at 4:42 PM Yong Wu wrote:
> >
> > The larb-id may be remapped in the smi-common, this means the
> > larb-id reported in the mtk_iommu_isr i
On Fri, 2018-12-21 at 18:47 +0100, Matthias Brugger wrote:
>
> On 08/12/2018 09:39, Yong Wu wrote:
> > The config_port of mt2712 and mt8183 are the same. Use a general
> > config_port interface instead.
> >
> > In addition, in mt2712, larb8 and larb9 are the bdps
On Sat, 2018-12-22 at 08:31 +0800, Nicolas Boichat wrote:
> On Fri, Dec 21, 2018 at 4:02 PM Yong Wu wrote:
> >
> > On Fri, 2018-12-21 at 12:43 +0800, Nicolas Boichat wrote:
> > > On Sat, Dec 8, 2018 at 4:42 PM Yong Wu wrote:
> > > >
> > > > The M
On Fri, 2018-12-21 at 19:31 +0100, Matthias Brugger wrote:
>
> On 08/12/2018 09:39, Yong Wu wrote:
> > The M4U IP blocks in mt8183 is MediaTek's generation2 M4U which use
> > the ARM Short-descriptor like mt8173, and most of the HW registers
> > are the same.
> &
xfoundation.org/pipermail/iommu/2018-September/030164.html
1) Fix typo in the commit message of dt-binding.
2) Change larb2/larb3 to the special larbs.
3) Refactor the larb-id remapped array(larbid_remapped), then we
don't need add the new function(mtk_iommu_get_larbid).
4) Add
t; clocks for smi-common and add a "gals" clock for smi-larb.
>From the diagram above, IPU0/IPU1(Image Processor Unit) and CCU(Camera
Control Unit) is connected with smi-common directly, we can take them
as "larb2", "larb3" and "larb7", and thei
Use a struct as the platform special data instead of the enumeration.
This is a prepare patch for adding mt8183 iommu support.
Signed-off-by: Yong Wu
Reviewed-by: Matthias Brugger
---
drivers/iommu/mtk_iommu.c | 24
drivers/iommu/mtk_iommu.h | 6 +-
2 files
mt8183,
IPU0/1 and CCU connect with smi-common directly, they also are not
the normal larb. Hence, we add a "larb_direct_to_common_mask" for these
larbs which connect to smi-commmon directly.
This is also a preparing patch for adding mt8183 SMI support.
Signed-off-by: Yong Wu
Reviewed-by
8183.
Signed-off-by: Yong Wu
Reviewed-by: Matthias Brugger
---
drivers/memory/mtk-smi.c | 35 ---
1 file changed, 24 insertions(+), 11 deletions(-)
diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
index 9fd6b3d..8a2f968 100644
--- a/drivers/me
address could be over 4GB, the mt8183
support it while the previous mt8173 don't. thus keep it as is.
Signed-off-by: Yong Wu
Reviewed-by: Robin Murphy
---
drivers/iommu/io-pgtable-arm-v7s.c | 31 ---
drivers/iommu/io-pgtable.h | 7 +++
driv
In some SoCs, M4U doesn't have its "bclk", it will use the EMI
clock instead which has always been enabled when entering kernel.
This also is a preparing patch for mt8183.
Signed-off-by: Yong Wu
---
drivers/iommu/mtk_iommu.c | 10 +++---
drivers/iommu/mtk_iommu.h | 3 +++
Add two helper functions: paddr_to_iopte and iopte_to_paddr.
Signed-off-by: Yong Wu
Reviewed-by: Robin Murphy
---
drivers/iommu/io-pgtable-arm-v7s.c | 45 --
1 file changed, 33 insertions(+), 12 deletions(-)
diff --git a/drivers/iommu/io-pgtable-arm-v7s.c
above, we add "gals0" and
"gals1" clocks for smi-common and add a "gals" clock for smi-larb.
This patch adds gals clock supporting in the SMI. Note that some larbs
may still don't have the "gals" clock like larb1 and larb4 above.
This is also a prepar
Both mt8173 and mt8183 don't have this vld_pa_rng(valid physical address
range) register while mt2712 have. Move it into the plat_data.
Signed-off-by: Yong Wu
---
drivers/iommu/mtk_iommu.c | 3 ++-
drivers/iommu/mtk_iommu.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --
In mt8173 and mt8183, 0x48 is REG_MMU_STANDARD_AXI_MODE while
it is extended to REG_MMU_CTRL which contains _STANDARD_AXI_MODE in
the other SoCs. I move this property to plat_data since both mt8173
and mt8183 use this property.
It is a preparing patch for mt8183.
Signed-off-by: Yong Wu
his also is a preparing patch for mt8183.
Signed-off-by: Yong Wu
---
drivers/iommu/mtk_iommu.c | 4
drivers/iommu/mtk_iommu.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 847082c..eca1536 100644
--- a/drivers/iommu/mtk_iommu.c
"F_MMU_TF_PROT_TO_PROGRAM_ADDR" instead of the hard code(2)
which means the M4U will output the dirty data to the programmed
address that we allocated dynamically when translation fault occurs.
Signed-off-by: Yong Wu
---
@Nicalos, I don't put it in the plat_data since only the
mt8173 and mt2712, we don't get the performance issue,
Keep its default value(0x0), that means all the larbs enter mmu0.
Note: smi gen1(mt2701/mt7623) don't have this bus_sel.
CC: Matthias Brugger
Signed-off-by: Yong Wu
---
drivers/memory/mtk-smi.c | 22 --
1 fi
so it gives a chance to get rid of mtk_smi_larb_get/put which could
be a next topic.
CC: Matthias Brugger
Signed-off-by: Yong Wu
---
drivers/memory/mtk-smi.c | 113 ++-
1 file changed, 72 insertions(+), 41 deletions(-)
diff --git a/drivers/memory/mtk-sm
dard ttbr0[1] means the S bit which is enabled defaultly, Hence,
we add a mask.
5) mt8183 HW has a GALS modules, SMI should enable "has_gals" support.
6) mt8183 need reset_axi like mt8173.
7) the larb-id in smi-common is remapped. M4U should add its larbid_remap.
Signed-off-by:
d for mt2712
which have 2 M4Us. In the other SoCs, we can get the larb-id from M4U
in which the larbs in the "mediatek,larbs" always are ordered.
CC: Matthias Brugger
Signed-off-by: Yong Wu
---
drivers/memory/mtk-smi.c | 26 ++
1 file changed, 2 insertion
hat register is 0 which means all the larbs go to mmu0
defaultly.
This is a preparing patch for adjusting SMI_BUS_SEL for mt8183.
Signed-off-by: Yong Wu
---
drivers/iommu/mtk_iommu.c | 47 +--
1 file changed, 29 insertions(+), 18 deletions(-)
diff --gi
The register VLD_PA_RNG(0x118) was forgot to backup while adding 4GB
mode support for mt2712. this patch add it.
Fixes: 30e2fccf9512 ("iommu/mediatek: Enlarge the validate PA range
for 4GB mode")
Signed-off-by: Yong Wu
---
drivers/iommu/mtk_iommu.c | 2 ++
drivers/iommu/mtk_iommu.
In the reboot burning test, if some Multimedia HW has something wrong,
It may keep send the invalid request to IOMMU. In order to avoid
affect the reboot flow, we add the shutdown callback to disable
M4U HW when shutdown.
Signed-off-by: Yong Wu
---
drivers/iommu/mtk_iommu.c| 6
Switch to SPDX license identifier for MediaTek iommu/smi and their
header files.
Signed-off-by: Yong Wu
Reviewed-by: Rob Herring
---
drivers/iommu/mtk_iommu.c | 10 +-
drivers/iommu/mtk_iommu.h | 10 +-
drivers/iommu/mtk_iommu_v1.c
sumer connects with from
iommu id in the "iommus=" property.
Signed-off-by: Yong Wu
---
I guess it should go through Matthias's tree if the patch is ok,
thus I don't separate to different patches. If it's really needed,
please feel free to tell me.
---
.../devicetree/bind
iommu consumer don't need call the mtk_smi_larb_get/put to enable
the power and clock of smi-larb and smi-common.
This patchset depends on "MT8183 IOMMU SUPPORT"[1].
[1] https://lists.linuxfoundation.org/pipermail/iommu/2019-January/032387.html
Yong Wu (13):
dt-binding: mediatek: Get ri
DL_FLAG_AUTOREMOVE_CONSUMER/SUPPLIER means "Remove the link
automatically on consumer/supplier driver unbind", that means we should
remove whole the device_link when there is no this driver no matter what
the ref_count of the link is.
CC: Greg Kroah-Hartman
Signed-off-by: Yong W
.
Suggested-by: Tomasz Figa
Signed-off-by: Yong Wu
---
drivers/iommu/mtk_iommu.c| 15 +--
drivers/iommu/mtk_iommu_v1.c | 14 --
2 files changed, 25 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 202e41b..735ae
consumer drivers run before
smi-larb, the supplier link_status is DL_DEV_NO_DRIVER(0) in the
device_link_add, then device_links_driver_bound will use WARN_ON
to complain that the link_status of supplier is not right.
This is a preparing patch for adding device_link.
Signed-off-by: Yong Wu
MediaTek IOMMU has already added device_link between the consumer
and smi-larb device. If the jpg device call the pm_runtime_get_sync,
the smi-larb's pm_runtime_get_sync also be called automatically.
CC: Rick Chang
Signed-off-by: Yong Wu
---
drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c
MediaTek IOMMU has already added the device_link between the consumer
and smi-larb device. If the drm device call the pm_runtime_get_sync,
the smi-larb's pm_runtime_get_sync also be called automatically.
CC: CK Hu
CC: Philipp Zabel
Signed-off-by: Yong Wu
---
drivers/gpu/drm/med
MediaTek IOMMU has already added the device_link between the consumer
and smi-larb device. If the mdp device call the pm_runtime_get_sync,
the smi-larb's pm_runtime_get_sync also be called automatically.
CC: Minghsiu Tsai
Signed-off-by: Yong Wu
---
drivers/media/platform/mtk-mdp/mtk_mdp_c
MediaTek IOMMU has already added the device_link between the consumer
and smi-larb device. If the vcodec device call the pm_runtime_get_sync,
the smi-larb's pm_runtime_get_sync also be called automatically.
CC: Tiffany Lin
Signed-off-by: Yong Wu
---
.../media/platform/mtk-v
smi is built-in driver like IOMMU and never unbound,
DL_FLAG_AUTOREMOVE_* is not needed.
CC: Matthias Brugger
Suggested-by: Tomasz Figa
Signed-off-by: Yong Wu
---
drivers/memory/mtk-smi.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/memory/mtk
After adding device_link between the iommu consumer and smi-larb,
the pm_runtime_get(_sync) of smi-larb and smi-common will be called
automatically. we can get rid of mtk_smi_larb_get/put.
CC: Matthias Brugger
Signed-off-by: Yong Wu
---
drivers/memory/mtk-smi.c | 14 --
include
content to
".shutdown".
Signed-off-by: Yong Wu
---
drivers/iommu/mtk_iommu.c| 23 ++-
drivers/iommu/mtk_iommu_v1.c | 16 ++--
2 files changed, 4 insertions(+), 35 deletions(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 735
After adding device_link between the IOMMU consumer and smi,
the mediatek,larb is unnecessary now.
CC: Matthias Brugger
Signed-off-by: Yong Wu
---
arch/arm/boot/dts/mt2701.dtsi | 1 -
arch/arm/boot/dts/mt7623.dtsi | 1 -
2 files changed, 2 deletions(-)
diff --git a/arch/arm/boot/dts/mt2701
After adding device_link between the IOMMU consumer and smi,
the mediatek,larb is unnecessary now.
CC: Matthias Brugger
Signed-off-by: Yong Wu
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 15 ---
1 file changed, 15 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173
On Wed, 2019-01-02 at 14:54 +0800, Nicolas Boichat wrote:
> On Tue, Jan 1, 2019 at 11:59 AM Yong Wu wrote:
> >
> > The register VLD_PA_RNG(0x118) was forgot to backup while adding 4GB
> > mode support for mt2712. this patch add it.
> >
> > Fixes: 30e2fccf9
On Wed, 2019-01-02 at 14:45 +0800, Nicolas Boichat wrote:
> On Tue, Jan 1, 2019 at 11:58 AM Yong Wu wrote:
> >
> > Both mt8173 and mt8183 don't have this vld_pa_rng(valid physical address
> > range) register while mt2712 have. Move it into the plat_data.
>
On Wed, 2019-01-02 at 14:23 +0800, Nicolas Boichat wrote:
> On Tue, Jan 1, 2019 at 11:58 AM Yong Wu wrote:
> >
> > The protect memory setting is a little different in the different SoCs.
> > In the register REG_MMU_CTRL_REG(0x110), the TF_PROT(translation fault
> > pro
Hi Robin,
Thanks very much for your confirm.
About the v3 of the DMA-mapping, I have some question below.
On Fri, 2015-03-20 at 19:14 +, Robin Murphy wrote:
> On 18/03/15 11:22, Yong Wu wrote:
> > Hi Tomasz,
> > Thanks very much for your review. please h
Hi Mark,
Thanks very much for review.
About the clock name should be the PoV of _this_ device. Could you
help check below?
On Fri, 2015-03-06 at 11:13 +, Mark Rutland wrote:
> On Fri, Mar 06, 2015 at 10:48:18AM +, yong...@mediatek.com wrote:
> > From: Yong Wu
> >
On Tue, 2015-04-14 at 21:49 +0800, Yong Wu wrote:
> Hi Mark,
>
> On Tue, 2015-04-14 at 11:06 +0100, Mark Rutland wrote:
> > On Tue, Apr 14, 2015 at 10:07:54AM +0100, Yong Wu wrote:
> > > Hi Mark,
> > > Thanks very much for review.
> > > About
Hi Mark,
On Tue, 2015-04-14 at 11:06 +0100, Mark Rutland wrote:
> On Tue, Apr 14, 2015 at 10:07:54AM +0100, Yong Wu wrote:
> > Hi Mark,
> > Thanks very much for review.
> > About the clock name should be the PoV of _this_ device. Could you
> > help check belo
On Wed, 2015-04-15 at 11:20 +0900, Tomasz Figa wrote:
> On Tue, Apr 14, 2015 at 3:31 PM, Yong Wu wrote:
> >> >>
> >> >> > +
> >> >> > + piommu->protect_va = devm_kmalloc(piommu->dev,
> >> >> > MTK_PROTECT_PA_AL
This patch is for ARM Short Descriptor Format.It has 2-levels
pagetable and the allocator supports 4K/64K/1M/16M.
Signed-off-by: Yong Wu
---
drivers/iommu/Kconfig| 7 +
drivers/iommu/Makefile | 1 +
drivers/iommu/io-pgtable-arm-short.c | 489
Dear Tomasz,
About a hardcode your comment, please help check below.
Dear Mark,
I would like to add a item in the dtsi of mtk-iommu. Please also
help have a look.
> > > +static const struct mtk_iommu_port mtk_iommu_mt8173_port[] = {
> > > + /* port namem4uid slav
Hi Tomasz,
Thanks very much for you suggestion and explain so detail.
please help check below.
On Fri, 2015-03-27 at 18:41 +0900, Tomasz Figa wrote:
> Hi Yong Wu,
>
> Sorry for long delay, I had to figure out some time to look at this again.
>
> On Wed, Mar 18, 2015 a
On Tue, 2015-05-26 at 13:08 +0200, Sascha Hauer wrote:
> On Tue, May 26, 2015 at 04:55:36PM +0800, James Liao wrote:
> > Hi Sascha,
> >
> > On Tue, 2015-05-26 at 09:56 +0200, Sascha Hauer wrote:
> > > On Thu, May 21, 2015 at 03:12:54PM +0800, James Liao wrote:
> > > > This adds the binding documen
Hi Tomasz,
Thanks very much for your suggestion!.
please help check my comment.
On Mon, 2015-05-25 at 15:31 +0900, Tomasz Figa wrote:
> Hi,
>
> Please see my comments inline.
>
> On Fri, May 15, 2015 at 6:43 PM, Yong Wu wrote:
> > This patch add media
Hi Tomasz,
Thanks. please help check my comments.
The others I will change in next version.
On Mon, 2015-05-25 at 17:29 +0900, Tomasz Figa wrote:
> Hi,
>
> Please see my comments inline.
>
> On Fri, May 15, 2015 at 6:43 PM, Yong Wu wrote:
> [snip]
> > +
&g
Hi Tomasz,
On Mon, 2015-05-25 at 15:48 +0900, Tomasz Figa wrote:
> Hi,
>
> Please see my comments inline.
>
> On Fri, May 15, 2015 at 6:43 PM, Yong Wu wrote:
> > This patch add smi binding document.
> >
> > Signed-off-by: Yong Wu
> > ---
>
On Wed, 2015-05-27 at 09:27 +0200, Sascha Hauer wrote:
> On Wed, May 27, 2015 at 02:12:49PM +0800, Yong Wu wrote:
> > On Tue, 2015-05-26 at 13:08 +0200, Sascha Hauer wrote:
> > > On Tue, May 26, 2015 at 04:55:36PM +0800, James Liao wrote:
> > > > Hi Sascha,
> >
larb5larb7 larb8 larb9
disp0 vdec cam venc jpg mdp1/disp1 mdp2/disp2 mdp3 vdo/nr tvd
All the connections are HW fixed, SW can NOT adjust it.
Signed-off-by: Yong Wu
Acked-by: Rob Herring
---
The mt2712 iommu code has already merged in v4.14, but the dt-binding
patch looks lost. Resend it
On Mon, 2019-02-25 at 15:56 -0800, Evan Green wrote:
> On Mon, Dec 31, 2018 at 8:53 PM Yong Wu wrote:
> >
> > MediaTek IOMMU should wait for smi larb which need wait for the
> > power domain(mtk-scpsys.c) and the multimedia ccf who both are
> > module init. Thus, s
On Mon, 2019-02-25 at 15:54 -0800, Evan Green wrote:
> On Mon, Dec 31, 2018 at 8:52 PM Yong Wu wrote:
> >
> > Normally, If the smi-larb HW need work, we should enable the smi-common
> > HW power and clock firstly.
> > This patch adds device-link between the smi-larb dev
On Mon, 2019-02-25 at 15:53 -0800, Evan Green wrote:
> On Mon, Dec 31, 2018 at 8:52 PM Yong Wu wrote:
> >
> > DL_FLAG_AUTOREMOVE_CONSUMER/SUPPLIER means "Remove the link
> > automatically on consumer/supplier driver unbind", that means we should
> > remove w
On Mon, 2019-02-25 at 15:54 -0800, Evan Green wrote:
> On Mon, Dec 31, 2018 at 8:52 PM Yong Wu wrote:
> >
> > The iommu consumer should use device_link to connect with the
> > smi-larb(supplier). then the smi-larb should run before the iommu
> > consumer. Here we delay
1 - 100 of 872 matches
Mail list logo
