Ftrace: Static function graph not work

2017-03-22 Thread Zong Li
Hi all, I test the static function graph for ARM, x86 and x86_64 architecture on linux-3.10 and linux-4.9, and I find it works correctly only for x86_64 on linux-4.9. After the following commit, the function tracer also be registered when registering the function graph tracer. commit

Re: Ftrace: Static function graph not work

2017-04-04 Thread Zong Li
2017-03-31 21:42 GMT+08:00 Steven Rostedt <rost...@goodmis.org>: > On Thu, Mar 23, 2017 at 11:28:03AM +0800, Zong Li wrote: >> Hi all, >> >> I test the static function graph for ARM, x86 and x86_64 architecture >> on linux-3.10 and linux-4.9, and I find it w

Re: Ftrace: Static function graph not work

2017-03-31 Thread Zong Li
ping 2017-03-23 11:28 GMT+08:00 Zong Li <zong...@gmail.com>: > Hi all, > > I test the static function graph for ARM, x86 and x86_64 architecture > on linux-3.10 and linux-4.9, and I find it works correctly only for > x86_64 on linux-4.9. > > After the following commi

Re: Ftrace: Static function graph not work

2017-03-31 Thread Zong Li
ping

[PATCH] RISC-V: Support built-in dtb

2017-12-19 Thread Zong Li
Build the dtb into the kernel image. If the DTB is given via bootloader, the external DTB is adopted first. Signed-off-by: Zong Li <zong...@gmail.com> --- arch/riscv/Kconfig | 4 arch/riscv/Makefile | 9 + arch/riscv/boot/Makefile

[PATCH] RISC-V: Support built-in dtb

2017-12-20 Thread Zong Li
Build the dtb into the kernel image. If the DTB is given via bootloader, the external DTB is adopted first. Signed-off-by: Zong Li <zong...@gmail.com> --- arch/riscv/Kconfig | 4 arch/riscv/Makefile | 9 + arch/riscv/boot/Makefile

[PATCH] irqchip/riscv-plic: fix address alignment of the plic enable bits

2017-12-19 Thread Zong Li
When the interrupt sourece id > 31, the register address is not 4 byte alignment. Arithmetic on void pointer has no size extension, it just add the result of 'hwirq/32' directly. Signed-off-by: Zong Li <zong...@gmail.com> --- drivers/irqchip/irq-riscv-plic.c | 15 +-- 1 fil

Re: [PATCH v2 3/4] RISC-V: Add definiion of extract symbol's index and type for 32-bit

2018-06-29 Thread Zong Li
Christoph Hellwig 於 2018年6月29日 週五 下午3:12寫道: > > On Mon, Jun 25, 2018 at 04:49:39PM +0800, Zong Li wrote: > > Use generic marco to get the index and type of symbol. > > Why do we even need this in a uapi header? Shouldn't ELF_RISCV_R_SYM > and ELF_RISCV_R_TYPE move to modul

Re: [PATCH v2 0/4] Building for 32-bit RISC-V kernel

2018-06-29 Thread Zong Li
Christoph Hellwig 於 2018年6月29日 週五 下午3:23寫道: > > Btw, what kind of userspace do you use for riscv32? Do you have an > easy to use root file system available somewhere (or a way to build > one)? I'm porting 32 bit riscv glibc now, and it is almost completion but still has few fail cases of glibc

[PATCH v2 0/4] Building for 32-bit RISC-V kernel

2018-06-25 Thread Zong Li
, there are some warning about unexpected argument of type on RV32I. Change in v1: - Fix some error in v1 - Remove implementation of fixed width integer types format for Elf_Addr. Zong Li (4): RISC-V: Add conditional macro for zone of DMA32 RISC-V: Select GENERIC_UCMPDI2 on RV32I RISC-V: Add

[PATCH v2 3/4] RISC-V: Add definiion of extract symbol's index and type for 32-bit

2018-06-25 Thread Zong Li
Use generic marco to get the index and type of symbol. Signed-off-by: Zong Li --- arch/riscv/include/uapi/asm/elf.h | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/uapi/asm/elf.h b/arch/riscv/include/uapi/asm/elf.h index 5cae4c30cd8e

[PATCH v2 2/4] RISC-V: Select GENERIC_UCMPDI2 on RV32I

2018-06-25 Thread Zong Li
On 32-bit, it need to use __ucmpdi2, otherwise, it can't find the __ucmpdi2 symbol. Signed-off-by: Zong Li --- arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 6debcc4afc72..3e683be9b7a8 100644 --- a/arch/riscv/Kconfig +++ b

[PATCH v2 4/4] RISC-V: Change variable type for 32-bit compatible

2018-06-25 Thread Zong Li
Signed-off-by: Zong Li --- arch/riscv/kernel/module.c | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index 29d265d0cf45..a346e0921995 100644 --- a/arch/riscv/kernel/module.c +++ b/arch/riscv

[PATCH v2 1/4] RISC-V: Add conditional macro for zone of DMA32

2018-06-25 Thread Zong Li
The DMA32 is for 64-bit usage. Signed-off-by: Zong Li --- arch/riscv/mm/init.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index c77df8142be2..58a522f9bcc3 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -28,7 +28,9 @@ static

[PATCH 3/5] RISC-V: Add definiion of extract symbol's index and type for 32-bit

2018-06-20 Thread Zong Li
Use generic marco to get the index and type of symbol. Signed-off-by: Zong Li --- arch/riscv/include/uapi/asm/elf.h | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/uapi/asm/elf.h b/arch/riscv/include/uapi/asm/elf.h index 5cae4c30cd8e

[PATCH 5/5] RISC-V: Use fixed width integer types for 32-bit compatible

2018-06-20 Thread Zong Li
Use fixed width integer types for print format on 32/64 bit to fix warning about format compatible. Like inttypes.h, but more simpler for RISC-V usage. Signed-off-by: Zong Li --- arch/riscv/include/asm/format.h | 20 arch/riscv/kernel/module.c | 13 +++-- 2

[PATCH 2/5] RISC-V: Select GENERIC_UCMPDI2 on RV32I

2018-06-20 Thread Zong Li
On 32-bit, it need to use __ucmpdi2, otherwise, it can't find the __ucmpdi2 symbol. Signed-off-by: Zong Li --- arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 6debcc4afc72..3e683be9b7a8 100644 --- a/arch/riscv/Kconfig +++ b

[PATCH] RISC-V: Add conditional marco for boot_sec_cpu

2018-06-20 Thread Zong Li
Fix link error when disable support SMP. It causes the undefined reference to `smp_callin'. Signed-off-by: Zong Li --- arch/riscv/kernel/head.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 3b6293f10e3e..396ec7b349ce 100644

[PATCH 0/5] Building for 32-bit RISC-V kernel

2018-06-20 Thread Zong Li
These patches are for building 32-bit RISC-V kernel. - Fix the compile errors and warnings on RV32I. - Fix some incompatible problem on RV32I. - Add format.h for compatible of print format. Zong Li (5): RISC-V: Add conditional macro for zone of DMA32 RISC-V: Select GENERIC_UCMPDI2

[PATCH 1/5] RISC-V: Add conditional macro for zone of DMA32

2018-06-20 Thread Zong Li
The DMA32 is for 64-bit usage. Signed-off-by: Zong Li --- arch/riscv/mm/init.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index c77df8142be2..91a5852e28fd 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -28,8 +28,11

[PATCH] RISC-V: Add the directive for alignment of stvec's value

2018-06-20 Thread Zong Li
The stvec's value must be 4 byte alignment by specification definition. This directive avoids to stvec be set the non-alignment value by the following code in head.S /* Point stvec to virtual address of intruction after satp write */ la a0, 1f add a0, a0, a1 csrw stvec, a0 Signed-off-by: Zong

[PATCH] RISC-V: Add conditional macro for boot_sec_cpu

2018-06-20 Thread Zong Li
Fix link error when disable support SMP. It causes the undefined reference to `smp_callin'. Signed-off-by: Zong Li --- arch/riscv/kernel/head.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 3b6293f10e3e..396ec7b349ce 100644

[PATCH 4/5] RISC-V: Change variable type for 32-bit compatible

2018-06-20 Thread Zong Li
Signed-off-by: Zong Li --- arch/riscv/kernel/module.c | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index 29d265d0cf45..c88d2ee918a5 100644 --- a/arch/riscv/kernel/module.c +++ b/arch/riscv

Re: [PATCH 1/5] RISC-V: Add conditional macro for zone of DMA32

2018-06-21 Thread Zong Li
Christoph Hellwig 於 2018年6月21日 週四 下午2:40寫道: > > On Thu, Jun 21, 2018 at 09:41:41AM +0800, Zong Li wrote: > > The DMA32 is for 64-bit usage. > > > > Signed-off-by: Zong Li > > --- > > arch/riscv/mm/init.c | 3 +++ > > 1 file changed, 3 insertions(+) &

Re: [PATCH 4/5] RISC-V: Change variable type for 32-bit compatible

2018-06-21 Thread Zong Li
> > - s64 offset = (void *)v - (void *)location; > > + uintptr_t offset = (void *)v - (void *)location; > > s64 is signed, uintptr is not, so this might change behavior and needs > an explanation. > Yes, it should be intptr_t. Thanks!

[PATCH] selftest: support run subset of selftests when running installed selftests

2018-01-17 Thread Zong Li
-in command of shell. (e.g. The exec is built-in command of shell) Replace the hyphen with underline for cpu-hotplug and memory-hotplug. Not all shell can use hyphen in function name, like sh, ash and so on. Signed-off-by: Zong Li <z...@andestech.com> --- tools/testing/selftests/Ma

[PATCH v2] selftest: support run subset of selftests when running installed selftests

2018-01-17 Thread Zong Li
has underline as prefix to avoid confilct with built-in command of shell. (e.g. The exec is built-in command of shell) Replace the hyphen with underline for cpu-hotplug and memory-hotplug. Not all shell can use hyphen in function name, like sh, ash and so on. Signed-off-by: Zong Li &l

[PATCH] RISC-V: Enable IRQ during exception handling

2018-01-29 Thread Zong Li
012441f6>] _do_fork+0x1b4/0x1e0 [<f46c3e3b>] ret_from_syscall+0xa/0xe Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/entry.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.

[PATCH] selftest: fix kselftest-merge depend on 'RUNTIME_TESTING_MENU'

2018-02-22 Thread Zong Li
ING_MENU=y' at the same time. Signed-off-by: Zong Li <z...@andestech.com> Cc: Greentime Hu <greent...@andestech.com> --- tools/testing/selftests/bpf/config | 1 + tools/testing/selftests/firmware/config| 1 + tools/testing/selftests/kmod/config| 1 + tools/testin

[PATCH] selftest: support running subset of selftests for run_kselftest.sh

2018-02-22 Thread Zong Li
underline as prefix to avoid confilct with built-in command of shell. (e.g. The exec is built-in command of shell) The hyhpen of function name be replace to the underline because not all shells can use hyphen in function name, like sh, ash and so on. Signed-off-by: Zong Li <z...@andestech.com&

Re: [PATCH] selftest: fix kselftest-merge depend on 'RUNTIME_TESTING_MENU'

2018-02-22 Thread Zong Li
2018-02-23 3:57 GMT+08:00 Anders Roxell <anders.rox...@linaro.org>: > On 22 February 2018 at 12:53, Zong Li <zong...@gmail.com> wrote: >> Since the 'commit d3deafaa8b5c ("lib/: make RUNTIME_TESTS a menuconfig >> to ease disabling it all")', the make kself

Re: [PATCH 5/5] RISC-V: Use fixed width integer types for 32-bit compatible

2018-06-21 Thread Zong Li
Christoph Hellwig 於 2018年6月21日 週四 下午2:43寫道: > > On Thu, Jun 21, 2018 at 09:41:46AM +0800, Zong Li wrote: > > Use fixed width integer types for print format on 32/64 bit > > to fix warning about format compatible. > > > > Like inttypes.h, but more simpler for RI

Re: [PATCH 4/5] RISC-V: Change variable type for 32-bit compatible

2018-06-21 Thread Zong Li
> > > - s64 offset = (void *)v - (void *)location; > > > + uintptr_t offset = (void *)v - (void *)location; > > > > s64 is signed, uintptr is not, so this might change behavior and needs > > an explanation. > > > > Yes, it should be intptr_t. Thanks! Correct, it should be ptrdiff_t. In

[PATCH] RISC-V: Add preprocessor directives for boot_sec_cpu

2018-08-02 Thread Zong Li
The boot_sec_cpu is for hutplug CPU on SMP system. It should be conditional compiling. Otherwise, it causes undefined reference to `smp_callin' when compiling uniprocessor kernel. Signed-off-by: Zong Li --- arch/riscv/kernel/head.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch

[PATCH v2] RISC-V: Add the directive for alignment of stvec's value

2018-08-02 Thread Zong Li
The stvec's value must be 4 byte alignment by specification definition. These directives avoid to stvec be set the non-alignment value. Signed-off-by: Zong Li --- arch/riscv/kernel/head.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S

Re: [PATCH] RISC-V: Add preprocessor directives for boot_sec_cpu

2018-08-02 Thread Zong Li
Atish Patra 於 2018年8月3日 週五 上午2:14寫道: > > On 8/2/18 8:23 AM, Zong Li wrote: > > The boot_sec_cpu is for hutplug CPU on SMP system. It should > > be conditional compiling. Otherwise, it causes undefined reference > > to `smp_callin' when compiling uniprocessor kernel. > &

Re: [PATCH] RISC-V: Add the directive for alignment of stvec's value

2018-08-01 Thread Zong Li
following code in head.S > > > > /* Point stvec to virtual address of intruction after satp write */ > > la a0, 1f > > add a0, a0, a1 > > csrw stvec, a0 > > > > Signed-off-by: Zong Li > > --- > > arch/riscv/kernel/head.S | 1 + > > 1 file chang

[PATCH 1/6] nds32/ftrace: Support static function tracer

2018-08-15 Thread Zong Li
This patch support the static function tracer. On nds32 ABI, we need to always push return address to stack for __builtin_return_address can work correctly, otherwise, it will get the wrong value of $lp at leaf function. Signed-off-by: Zong Li --- arch/nds32/Kconfig | 1 + arch

[PATCH 0/6] Support ftrace on NDS32 architecture

2018-08-15 Thread Zong Li
we have no these functions such as _raw_spin_lock, _raw_spin_trylock and so on in our kernel. Zong Li (6): nds32/ftrace: Support static function tracer nds32/ftrace: Support static function graph tracer nds32/ftrace: Add RECORD_MCOUNT support nds32/ftrace: Support dynamic function tracer

[PATCH 4/6] nds32/ftrace: Support dynamic function tracer

2018-08-15 Thread Zong Li
This patch contains the implementation of dynamic function tracer. The mcount call is composed of three instructions, so there are three nop for enough placeholder. Signed-off-by: Zong Li --- arch/nds32/Kconfig | 1 + arch/nds32/include/asm/ftrace.h | 26 +++ arch/nds32

[PATCH 5/6] nds32/ftrace: Support dynamic function graph tracer

2018-08-15 Thread Zong Li
This patch contains the implementation of dynamic function graph tracer. Signed-off-by: Zong Li --- arch/nds32/kernel/ftrace.c | 36 1 file changed, 36 insertions(+) diff --git a/arch/nds32/kernel/ftrace.c b/arch/nds32/kernel/ftrace.c index 3ca676b..a646a83

[PATCH 2/6] nds32/ftrace: Support static function graph tracer

2018-08-15 Thread Zong Li
This patch contains implementation of static function graph tracer. Signed-off-by: Zong Li --- arch/nds32/Kconfig | 1 + arch/nds32/kernel/ftrace.c | 69 ++ 2 files changed, 70 insertions(+) diff --git a/arch/nds32/Kconfig b/arch/nds32

[PATCH 3/6] nds32/ftrace: Add RECORD_MCOUNT support

2018-08-15 Thread Zong Li
Recognize NDS32 object files in recordmcount.pl. Signed-off-by: Zong Li --- arch/nds32/Kconfig | 1 + scripts/recordmcount.pl | 3 +++ 2 files changed, 4 insertions(+) diff --git a/arch/nds32/Kconfig b/arch/nds32/Kconfig index ae1a94ca..66d507d 100644 --- a/arch/nds32/Kconfig +++ b/arch

[PATCH 6/6] nds32/stack: Get real return address by using ftrace_graph_ret_addr

2018-08-15 Thread Zong Li
Function graph tracer has modified the return address to 'return_to_handler' on stack, and provide the 'ftrace_graph_ret_addr' to get the real return address. Signed-off-by: Zong Li --- arch/nds32/kernel/stacktrace.c | 4 arch/nds32/kernel/traps.c | 30

[PATCH] nds32: Fix empty call trace

2018-08-12 Thread Zong Li
The compiler predefined macro 'NDS32_ABI_2' had been removed, it should use the '__NDS32_ABI_2' here. Signed-off-by: Zong Li --- arch/nds32/kernel/traps.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/nds32/kernel/traps.c b/arch/nds32/kernel/traps.c index a6205fd

[PATCH 1/3] nds32: Fix get_user/put_user macro expand pointer problem

2018-08-13 Thread Zong Li
The pointer argument of macro need to be taken out once first, and then use the new pointer in the macro body. In kernel/trace/trace.c, get_user(ch, ubuf++) causes the unexpected increment after expand the macro. Signed-off-by: Zong Li --- arch/nds32/include/asm/uaccess.h | 26

[PATCH 2/3] nds32: Clean up the coding style

2018-08-13 Thread Zong Li
1. Adjust indentation. 2. Unify argument name of each macro. 3. Add space after comma in parameters list. 4. Add space after 'if' keyword. 5. Replace space by tab. 6. Change asm volatile to __asm__ __volatile__ Signed-off-by: Zong Li --- arch/nds32/include/asm/uaccess.h | 201

[PATCH 3/3] nds32: Extract the checking and getting pointer to a macro

2018-08-13 Thread Zong Li
Signed-off-by: Zong Li --- arch/nds32/include/asm/uaccess.h | 80 1 file changed, 41 insertions(+), 39 deletions(-) diff --git a/arch/nds32/include/asm/uaccess.h b/arch/nds32/include/asm/uaccess.h index e1a2b5b..362a32d 100644 --- a/arch/nds32/include

[PATCH 0/3] Fix get_user and put_user pointer issue

2018-08-13 Thread Zong Li
These patches fix the issue of expand macro with pointer argument, clean up the coding style and refactor the macro by extracting the checking and getting pointer to another macro definition. Zong Li (3): nds32: Fix get_user/put_user macro expand pointer problem nds32: Clean up the coding

Re: FW: [PATCH v2] RISC-V: Add the directive for alignment of stvec's value

2018-08-09 Thread Zong Li
> Subject: [PATCH v2] RISC-V: Add the directive for alignment of stvec's value > > The stvec's value must be 4 byte alignment by specification definition. > These directives avoid to stvec be set the non-alignment value. > > Signed-off-by: Zong Li > --- > arch/riscv/k

Re: [PATCH] module: Add the print format of Elf_Addr for 32/64-bit compatibly

2018-08-09 Thread Zong Li
Zong Li 於 2018年7月17日 週二 上午11:06寫道: > > Use a similar way like fixed width integer types in inttypes.h. > > For the ELF, the Elf32_Addr is int type and Elf64_Addr is long long > type. It is opposite to definition of inttypes.h, so the Elf_Addr cannot > re-use the header. > &g

[PATCH 1/2] nds32: Remove the deprecated ABI implementation

2018-08-19 Thread Zong Li
We are not using NDS32 ABI 2 for now, just remove the preprocessor directives __NDS32_ABI_2. Signed-off-by: Zong Li --- arch/nds32/kernel/traps.c | 5 - 1 file changed, 5 deletions(-) diff --git a/arch/nds32/kernel/traps.c b/arch/nds32/kernel/traps.c index 7684c8f..f432310 100644

[PATCH 2/2] nds32: Add macro definition for offset of lp register on stack

2018-08-19 Thread Zong Li
Use macro to replace the magic number. Signed-off-by: Zong Li --- arch/nds32/include/asm/nds32.h | 1 + arch/nds32/kernel/stacktrace.c | 2 +- arch/nds32/kernel/traps.c | 2 +- 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/nds32/include/asm/nds32.h b/arch/nds32

[PATCH 0/2] Remove the deprecated ABI implementation

2018-08-19 Thread Zong Li
This patches remove the implementation of NDS32_ABI_2 and replace the magic number of offset of lp on stack. In stacktrace.c, we dump the stack without considering the old ABI, it should be consistent in traps.c. Zong Li (2): nds32: Remove the deprecated ABI implementation nds32: Add macro

[PATCH] module: Add the print format of Elf_Addr for 32/64-bit compatibly

2018-07-16 Thread Zong Li
of module name and relocation type except the address information. We can print the address correctly without compile warning by using PRIdEA, PRIxEA and so on. Signed-off-by: Zong Li --- arch/riscv/kernel/module.c | 13 +++-- include/asm-generic/module.h | 9 + 2 files changed, 16

Re: [PATCH v2 3/4] RISC-V: Add definiion of extract symbol's index and type for 32-bit

2018-07-05 Thread Zong Li
Palmer Dabbelt 於 2018年7月5日 週四 上午4:58寫道: > > On Fri, 29 Jun 2018 09:53:49 PDT (-0700), zong...@gmail.com wrote: > > Christoph Hellwig 於 2018年6月29日 週五 下午3:12寫道: > >> > >> On Mon, Jun 25, 2018 at 04:49:39PM +0800, Zong Li wrote: > >> > Use generic

[PATCH 03/11] RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module

2018-03-13 Thread Zong Li
*ABS* Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/module.c | 61 ++ 1 file changed, 51 insertions(+), 10 deletions(-) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index e0f05034fc21..242d3a

[PATCH 06/11] RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq

2018-03-13 Thread Zong Li
Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/module.c | 35 +++ 1 file changed, 35 insertions(+) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index 654fe7dcd38d..e23c051dfc62 100644 --- a/arch/riscv/kernel/mo

[PATCH 07/11] RISC-V: Support ALIGN relocation type in kernel module

2018-03-13 Thread Zong Li
Just ignore align type. The nop instructions cannot be removed in kernel module. Kernel modules is not doing relax. Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/module.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/

[PATCH 05/11] RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module

2018-03-13 Thread Zong Li
HI20 and LO12_I/LO12_S relocate the absolute address, the range of offset must in 32-bit. Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/module.c | 42 ++ 1 file changed, 42 insertions(+) diff --git a/arch/riscv/kernel/module.c

[PATCH 04/11] RISC-V: Support CALL relocation type in kernel module

2018-03-13 Thread Zong Li
Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/module.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index 242d3a14c210..7e85e5840b4d 100644 --- a/arch/riscv/kernel/module.c +++ b/arch

[PATCH 00/11] RISC-V: Resolve the issue of loadable module on 64-bit

2018-03-13 Thread Zong Li
relocation types - R_RISCV_CALL - R_RISCV_HI20 - R_RISCV_LO12_I - R_RISCV_LO12_S - R_RISCV_RVC_BRANCH - R_RISCV_RVC_JUMP - R_RISCV_ALIGN - R_RISCV_ADD32 - R_RISCV_SUB32 Zong Li (11): RISC-V: Add sections of PLT and GOT for kernel module RISC-V: Add section of GOT.PLT for kernel module RISC-V

[PATCH 02/11] RISC-V: Add section of GOT.PLT for kernel module

2018-03-13 Thread Zong Li
Separate the function symbol address from .plt to .got.plt section. The original plt entry has trampoline code with symbol address, there is a 32-bit padding bwtween jar instruction and symbol address. Extract the symbol address to .got.plt to reduce the module size. Signed-off-by: Zong Li &l

[PATCH 01/11] RISC-V: Add sections of PLT and GOT for kernel module

2018-03-13 Thread Zong Li
. The GOT entry is just the data symbol address. Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/Kconfig | 5 ++ arch/riscv/Makefile | 3 + arch/riscv/include/asm/module.h | 102 ++ arch/riscv/kernel/Makefile

[PATCH 09/11] RISC-V: Support SUB32 relocation type in kernel module

2018-03-13 Thread Zong Li
Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/module.c | 8 1 file changed, 8 insertions(+) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index 2d14dff22861..4228270efe93 100644 --- a/arch/riscv/kernel/module.c +++ b/arch/riscv/kernel/mo

[PATCH 10/11] RISC-V: Enable module support in defconfig

2018-03-13 Thread Zong Li
Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 92ff23586c11..07326466871b 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/c

[PATCH 11/11] RISC-V: Add definition of relocation types

2018-03-13 Thread Zong Li
Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/include/uapi/asm/elf.h | 24 1 file changed, 24 insertions(+) diff --git a/arch/riscv/include/uapi/asm/elf.h b/arch/riscv/include/uapi/asm/elf.h index a510edfa8226..5111c7c35e8b 100644 --- a/arch/riscv/i

[PATCH 08/11] RISC-V: Support ADD32 relocation type in kernel module

2018-03-13 Thread Zong Li
Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/module.c | 8 1 file changed, 8 insertions(+) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index 351bf2a518ee..2d14dff22861 100644 --- a/arch/riscv/kernel/module.c +++ b/arch/riscv/kernel/mo

Re: [PATCH 00/11] RISC-V: Resolve the issue of loadable module on 64-bit

2018-03-13 Thread Zong Li
2018-03-13 16:35 GMT+08:00 Zong Li <z...@andestech.com>: > > These patches resolve the some issues of loadable module. > - symbol out of ranges > - unknown relocation types > > The reference of external variable and function symbols > cannot exceed 32-bit off

Re: [PATCH 00/11] RISC-V: Resolve the issue of loadable module on 64-bit

2018-03-14 Thread Zong Li
2018-03-14 19:56 GMT+08:00 Shea Levy <s...@shealevy.com>: > Zong Li <zong...@gmail.com> writes: > >> 2018-03-14 11:07 GMT+08:00 Palmer Dabbelt <pal...@sifive.com>: >>> On Tue, 13 Mar 2018 18:34:19 PDT (-0700), zong...@gmail.com wrote: >>&

Re: [PATCH 00/11] RISC-V: Resolve the issue of loadable module on 64-bit

2018-03-14 Thread Zong Li
sections depend on the relocation types: >>>>> - R_RISCV_GOT_HI20 >>>>> - R_RISCV_CALL_PLT >>>>> >>>>> These patches also support more relocation types >>>>> - R_RISCV_CALL >>>>> - R_RISCV_HI20

Re: [PATCH v2 00/11] RISC-V: Resolve the issue of loadable module on 64-bit

2018-03-15 Thread Zong Li
2018-03-15 16:50 GMT+08:00 Zong Li <z...@andestech.com>: > These patches resolve the some issues of loadable module. > - symbol out of ranges > - unknown relocation types > > The reference of external variable and function symbols > cannot exceed 32-bit offset

[PATCH v2 10/11] RISC-V: Enable module support in defconfig

2018-03-15 Thread Zong Li
Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 92ff23586c11..07326466871b 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/c

[PATCH v2 11/11] RISC-V: Add definition of relocation types

2018-03-15 Thread Zong Li
Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/include/uapi/asm/elf.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/riscv/include/uapi/asm/elf.h b/arch/riscv/include/uapi/asm/elf.h index a510edfa8226..5cae4c30cd8e 100644 --- a/arch/riscv/include/uapi/asm/elf.h

[PATCH v2 04/11] RISC-V: Support CALL relocation type in kernel module

2018-03-15 Thread Zong Li
Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/module.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index be717bd7cea7..3f2730840c25 100644 --- a/arch/riscv/kernel/module.c +++ b/arch

[PATCH v2 06/11] RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq

2018-03-15 Thread Zong Li
Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/module.c | 35 +++ 1 file changed, 35 insertions(+) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index f1bd6b1a4520..7ab6a9b72384 100644 --- a/arch/riscv/kernel/mo

[PATCH v2 01/11] RISC-V: Add sections of PLT and GOT for kernel module

2018-03-15 Thread Zong Li
. The GOT entry is just the data symbol address. Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/Kconfig | 5 ++ arch/riscv/Makefile | 5 ++ arch/riscv/include/asm/module.h | 103 ++ arch/riscv/kernel/Makefile

[PATCH v2 03/11] RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module

2018-03-15 Thread Zong Li
*ABS* Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/module.c | 62 ++ 1 file changed, 52 insertions(+), 10 deletions(-) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index e0f05034fc21..be717b

[PATCH v2 05/11] RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module

2018-03-15 Thread Zong Li
HI20 and LO12_I/LO12_S relocate the absolute address, the range of offset must in 32-bit. Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/module.c | 42 ++ 1 file changed, 42 insertions(+) diff --git a/arch/riscv/kernel/module.c

[PATCH v2 00/11] RISC-V: Resolve the issue of loadable module on 64-bit

2018-03-15 Thread Zong Li
65401 0 - Live 0xffd00291 Signed-off-by: Zong Li <z...@andestech.com> --- Change in v2: - Add compile option 'mno-relax' for build kernel module - Just fail on ALIGN type, this is unexpected type with mno-relax. Zong Li (11): RISC-V: Add sections of PLT and GOT for kernel module

Re: [PATCH 02/11] RISC-V: Add section of GOT.PLT for kernel module

2018-03-15 Thread Zong Li
tree, please drop us a note to > help improve the system] > > url: > https://github.com/0day-ci/linux/commits/Zong-Li/RISC-V-Resolve-the-issue-of-loadable-module-on-64-bit/20180314-203750 > config: riscv-defconfig (attached as .config) > compiler: riscv64-linux-gcc (GC

[PATCH v2 02/11] RISC-V: Add section of GOT.PLT for kernel module

2018-03-15 Thread Zong Li
Separate the function symbol address from .plt to .got.plt section. The original plt entry has trampoline code with symbol address, there is a 32-bit padding bwtween jar instruction and symbol address. Extract the symbol address to .got.plt to reduce the module size. Signed-off-by: Zong Li &l

[PATCH v2 08/11] RISC-V: Support ADD32 relocation type in kernel module

2018-03-15 Thread Zong Li
Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/module.c | 8 1 file changed, 8 insertions(+) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index 957933e669b1..73ea36c73d3b 100644 --- a/arch/riscv/kernel/module.c +++ b/arch/riscv/kernel/mo

[PATCH v2 07/11] RISC-V: Support ALIGN relocation type in kernel module

2018-03-15 Thread Zong Li
Just fail on align type. Kernel modules loader didn't do relax like linker, it is difficult to remove or migrate the code, but the remnant nop instructions harm the performaace of module. We expect the building module with the no-relax option. Signed-off-by: Zong Li <z...@andestech.com> ---

[PATCH v2 09/11] RISC-V: Support SUB32 relocation type in kernel module

2018-03-15 Thread Zong Li
Signed-off-by: Zong Li <z...@andestech.com> --- arch/riscv/kernel/module.c | 8 1 file changed, 8 insertions(+) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index 73ea36c73d3b..5dddba301d0a 100644 --- a/arch/riscv/kernel/module.c +++ b/arch/riscv/kernel/mo

Re: [PATCH 00/11] RISC-V: Resolve the issue of loadable module on 64-bit

2018-03-13 Thread Zong Li
the relocation types: >>> - R_RISCV_GOT_HI20 >>> - R_RISCV_CALL_PLT >>> >>> These patches also support more relocation types >>> - R_RISCV_CALL >>> - R_RISCV_HI20 >>> - R_RISCV_LO12_I >>> - R_RISCV_LO12_S >>> - R_RISCV_RVC_BR

Re: [PATCH v2 00/11] RISC-V: Resolve the issue of loadable module on 64-bit

2018-03-24 Thread Zong Li
eys 19606 0 - Live 0xffd003717000 >>> test_static_key_base 7374 1 test_static_keys, Live 0xffd0036dc000 >>> test_printf 7804 0 [permanent], Live 0xffd00369c000 >>> test_module 1557 0 - Live 0xffd003646000 >>> test_kmod 49100 0 - Live 0xffd00

Re: [PATCH v2 00/11] RISC-V: Resolve the issue of loadable module on 64-bit

2018-03-20 Thread Zong Li
>> test_kmod 49100 0 - Live 0xffd0035f2000 >> test_bpf 1599301 0 - Live 0xffd00300 >> test_bitmap 4403 0 - Live 0xffd002dd8000 >> reed_solomon 38866 1 ramoops, Live 0xffd002d86000 >> raid6_pq 161872 1 btrfs, Live 0xffd002b9e000 >> netdevsim 654

Re: [PATCH] selftest: fix kselftest-merge depend on 'RUNTIME_TESTING_MENU'

2018-02-28 Thread Zong Li
2018-02-28 6:32 GMT+08:00 Anders Roxell <anders.rox...@linaro.org>: > > On 23 February 2018 at 08:05, Zong Li <zong...@gmail.com> wrote: > > 2018-02-23 3:57 GMT+08:00 Anders Roxell <anders.rox...@linaro.org>: > >> On 22 February 2018 at 12:53, Zong Li

Re: [PATCH v4 0/5] Fix some bugs on RV32 build fail and issue

2018-10-15 Thread Zong Li
Zong Li 於 2018年10月3日 週三 上午11:12寫道: > > This patches contain the modificaion as follows: > 1. Fix up the building fail on RV32. > 2. Add umoddi3 and udivmoddi4 functions for RV32. > 3. Fix ioremap problem on RV32. > > Thanks all for review these code and modify the

[PATCH 2/2] nds32: Fill all TLB entries with kernel image mapping

2018-10-17 Thread Zong Li
We use earlycon replace with early_printk and doesn't use early_io_map() to create UART mapping. It is not necessary to reserve the one way in TLB for now. It didn't make sense if use direct-mapped and reserve one way at the same time. It allow the direct-mapped now. Signed-off-by: Zong Li

[PATCH 0/2] Remove the no longer used mechanism

2018-10-17 Thread Zong Li
This patchset remove the no longer used mechanism as follows: 1. Reserve the TLB space for UART mapping during booting. 2. Assign a value for UART display when an error ocurred during booting. Zong Li (2): nds32: Remove the redundant assignment nds32: Fill all TLB entries with kernel image

[PATCH 1/2] nds32: Remove the redundant assignment

2018-10-17 Thread Zong Li
For early version, the value of r2 register was used to display a character on UART when error occurred. Remove these r2 assignments because we no longer show the character. Signed-off-by: Zong Li --- arch/nds32/kernel/head.S | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/nds32

[PATCH 0/2] Fix some issue on RV32

2018-11-11 Thread Zong Li
This patches fix the build fail and kernel module install failed on RV32. Zong Li (2): RISC-V: Request stat64 on RV32 RISC-V: Support MODULE_SECTIONS mechanism on RV32 arch/riscv/Kconfig | 2 +- arch/riscv/include/asm/module.h | 28 +++- arch

[PATCH 2/2] RISC-V: Support MODULE_SECTIONS mechanism on RV32

2018-11-11 Thread Zong Li
test_static_keys, Live 0xa2931000 test_user_copy 4382 0 - Live 0xa28c9000 xxhash 70501 2 zstd_compress,zstd_decompress, Live 0xa2055000 Signed-off-by: Zong Li --- arch/riscv/Kconfig | 2 +- arch/riscv/include/asm/module.h | 28 +++- arch/riscv/kernel/module

[PATCH 1/2] RISC-V: Request stat64 on RV32

2018-11-11 Thread Zong Li
The stat64 family that is used on 32-bit architectures to replace newstat. Since commit 67314ec7b0250290cc85eaa7a2f88a8ddb9e8547 ("RISC-V: Request newstat syscalls"), the RV32 build fail with undeclared 'sys_fstatat64' Signed-off-by: Zong Li --- arch/riscv/include/asm/unistd.h | 1

Re: [PATCH 1/2] RISC-V: Request stat64 on RV32

2018-11-12 Thread Zong Li
David Abdurachmanov 於 2018年11月12日 週一 下午2:19寫道: > > On Mon, Nov 12, 2018 at 5:10 AM Zong Li wrote: > > > > The stat64 family that is used on 32-bit architectures to replace > > newstat. > > > > Since commit 67314ec7b0250290cc85eaa7a2f88a8ddb9e8547 (&

[PATCH v4 3/5] lib: Add umoddi3 and udivmoddi4 of GCC library routines

2018-10-02 Thread Zong Li
it is in house driver, but I think that umoddi3 is a common function for RV32. The udivmoddi4 and umoddi3 are copies from libgcc in gcc 4.2.1. There are other functions use the udivmoddi4 in libgcc, so I separate the umoddi3 and udivmoddi4 for flexible extension in the future. Signed-off-by: Zong Li

[PATCH v4 4/5] RISC-V: Select GENERIC_LIB_UMODDI3 on RV32

2018-10-02 Thread Zong Li
On RV32, it will use the __umoddi3. Select GENERIC_LIB_UMODDI3 to avoid undefined reference. Signed-off-by: Zong Li --- arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index a344980..dc262fa 100644 --- a/arch/riscv/Kconfig +++ b

[PATCH v4 1/5] RISC-V: Build tishift only on 64-bit

2018-10-02 Thread Zong Li
Only RV64 supports 128 integer size. Signed-off-by: Zong Li --- arch/riscv/lib/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 445ec84..5739bd0 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib

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