From: qii wang
Add i2c compatible for MT8183. Compare to 2712 i2c controller, MT8183 has
different registers, offsets, clock, and multi-user function.
Signed-off-by: qii wang
---
drivers/i2c/busses/i2c-mt65xx.c | 136 +--
1 file changed, 130 insertions(+),
From: qii wang
Add MT7629 i2c binding to i2c-mt2712.txt and there is no need to
modify i2c driver.
Signed-off-by: qii wang
---
Documentation/devicetree/bindings/i2c/i2c-mtk.txt |1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mtk.txt
b/Documenta
This series are based on 4.20-rc1 and provide five patches to support
mt7629 and mt8183 IC.
qii wang (5):
dt-bindings: i2c: Add Mediatek MT7629 i2c binding
i2c: mediatek: remove useless code and replace definitions
i2c: mediatek: Add offsets array for new i2c registers
dt-bindings: i2c: Ad
From: qii wang
New i2c registers would have different offsets, so we use different
offsets array to distinguish different i2c registers version.
Signed-off-by: qii wang
---
drivers/i2c/busses/i2c-mt65xx.c | 163 +--
1 file changed, 104 insertions(+), 59 del
From: qii wang
Completion_done is useless when we don't use its return value,
so we remove it. Different speeds have been defined by macros,
so we use macros definitions.
Signed-off-by: qii wang
---
drivers/i2c/busses/i2c-mt65xx.c |6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
From: qii wang
Add MT8183 i2c binding to binding file. Compare to 2712 i2c
controller, MT8183 has different registers, offsets, clock,
and multi-user function.
Signed-off-by: qii wang
---
Documentation/devicetree/bindings/i2c/i2c-mtk.txt |7 +--
1 file changed, 5 insertions(+), 2 delet
From: Qii Wang
tSU,STA/tHD,STA/tSU,STOP maybe out of spec due to device
clock-stretching or circuit loss, we could get device
clock-stretch time from dts to adjust these parameters
to meet the spec via EXT_CONF register.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 6 +-
1
From: Qii Wang
Use div_u64 for 64-bit division, and change sample_ns type to
unsigned int. Otherwise, the module will reference __udivdi3
under 32-bit kernels, which is not allowed in kernel space.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 3 ++-
1 file changed, 2 insertion
From: Qii Wang
imp wrapper clock is the i2c source clock of MT8192
Signed-off-by: Qii Wang
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 43
1 file changed, 33 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/
From: Qii Wang
Some i2c device driver indirectly uses I2C driver when it is now
being suspended. The i2c devices driver is suspended during the
NOIRQ phase and this cannot be changed due to other dependencies.
Therefore, we also need to move the suspend handling for the I2C
controller driver to t
From: Qii Wang
With the apdma remove hand-shake signal, it requirs special
operation timing to reset i2c manually, otherwise the interrupt
will not be triggered, i2c transmission will be timeout.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 27 ++-
1 fi
From: Qii Wang
Some i2c device driver indirectly uses I2C driver when it is now
being suspended. The i2c devices driver is suspended during the
NOIRQ phase and this cannot be changed due to other dependencies.
Therefore, we also need to move the suspend handling for the I2C
controller driver to t
From: Qii Wang
tSU,STA/tHD,STA/tSU,STOP maybe out of spec due to device
clock-stretching or circuit loss, we could get device
clock-stretch time from dts to adjust these parameters
to meet the spec via EXT_CONF register.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 6 +-
1
From: Qii Wang
tSU,STA/tHD,STA/tSU,STOP maybe out of spec due to device
clock-stretching or circuit loss, we could get device
clock-stretch time from dts to adjust these parameters
to meet the spec via EXT_CONF register.
Signed-off-by: Qii Wang
---
Documentation/devicetree/bindings/i2c/i2c-mt6
From: Qii Wang
Add i2c nodes to mt8183 and mt8183-evb.
Signed-off-by: Qii Wang
---
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 96 ++
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 189
2 files changed, 285 insertions(+)
diff --git a/arch/arm64/boot/
From: Qii Wang
I2C device reg should be "reg = <0x52 0x0 0x10>;"
Signed-off-by: Qii Wang
---
.../devicetree/bindings/i3c/cdns,i3c-master.txt|2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/i3c/cdns,i3c-master.txt
b/Documentation/devi
From: Qii Wang
The i2c driver default do dma reset after i2c reset, but sometimes
i2c reset will trigger dma tx2rx, then apdma write data to dram
which has been i2c_put_dma_safe_msg_buf(kfree). Move dma reset
before i2c reset in mtk_i2c_init_hw to fix it.
Signed-off-by: Qii Wang
---
drivers/i2
From: Qii Wang
Some i2c device driver indirectly uses I2C driver when it is now
being suspended. The i2c devices driver is suspended during the
NOIRQ phase and this cannot be changed due to other dependencies.
Therefore, we also need to move the suspend handling for the I2C
controller driver to t
From: Qii Wang
The master code needs to being sent when the speed is more than
I2C_MAX_FAST_MODE_PLUS_FREQ instead of
I2C_MAX_HIGH_SPEED_MODE_FREQ. Fix it.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/driv
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