Re: [GIT pull] x86 updates for 3.11

2013-07-15 Thread Kees Cook
On Mon, Jul 15, 2013 at 1:45 PM, Thomas Gleixner  wrote:
> On Sat, 13 Jul 2013, H. Peter Anvin wrote:
>
>> Fail on me.  I got rushed and sloppy.  I really need to automate looking
>> for warnings pre-commit and not rely on Fengguang's robot.
>
> /me too. I took it for granted that this was tested by Ingos machinery
> w/o noticing that it went in just when Ingo left for a long
> weekend. So in my own rush to get out for the weekend I left out my
> usual smoke tests on that branch. Sorry about that.

I apologize; I was rushed as well. I've changed my build and test
procedures to more loudly present warnings.

-Kees

--
Kees Cook
Chrome OS Security
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Re: [GIT pull] x86 updates for 3.11

2013-07-15 Thread Thomas Gleixner
On Sat, 13 Jul 2013, H. Peter Anvin wrote:

> Fail on me.  I got rushed and sloppy.  I really need to automate looking
> for warnings pre-commit and not rely on Fengguang's robot.

/me too. I took it for granted that this was tested by Ingos machinery
w/o noticing that it went in just when Ingo left for a long
weekend. So in my own rush to get out for the weekend I left out my
usual smoke tests on that branch. Sorry about that.

Thanks,

tglx


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Re: [GIT pull] x86 updates for 3.11

2013-07-15 Thread Thomas Gleixner
On Sat, 13 Jul 2013, H. Peter Anvin wrote:

 Fail on me.  I got rushed and sloppy.  I really need to automate looking
 for warnings pre-commit and not rely on Fengguang's robot.

/me too. I took it for granted that this was tested by Ingos machinery
w/o noticing that it went in just when Ingo left for a long
weekend. So in my own rush to get out for the weekend I left out my
usual smoke tests on that branch. Sorry about that.

Thanks,

tglx


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Re: [GIT pull] x86 updates for 3.11

2013-07-15 Thread Kees Cook
On Mon, Jul 15, 2013 at 1:45 PM, Thomas Gleixner t...@linutronix.de wrote:
 On Sat, 13 Jul 2013, H. Peter Anvin wrote:

 Fail on me.  I got rushed and sloppy.  I really need to automate looking
 for warnings pre-commit and not rely on Fengguang's robot.

 /me too. I took it for granted that this was tested by Ingos machinery
 w/o noticing that it went in just when Ingo left for a long
 weekend. So in my own rush to get out for the weekend I left out my
 usual smoke tests on that branch. Sorry about that.

I apologize; I was rushed as well. I've changed my build and test
procedures to more loudly present warnings.

-Kees

--
Kees Cook
Chrome OS Security
--
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Re: [GIT pull] x86 updates for 3.11

2013-07-13 Thread H. Peter Anvin
Fail on me.  I got rushed and sloppy.  I really need to automate looking
for warnings pre-commit and not rely on Fengguang's robot.

-hpa

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Re: [GIT pull] x86 updates for 3.11

2013-07-13 Thread Linus Torvalds
On Sat, Jul 13, 2013 at 4:21 AM, Thomas Gleixner  wrote:
>
>* Guarantee IDT page alignment

What the F*CK, guys?

This piece-of-shit commit is marked for stable, but you clearly never
even test-compiled it, did you?

Because on x86-64 (the which is the only place where the patch
matters), I don't see how you could have avoided this honking huge
warning otherwise:

  arch/x86/kernel/traps.c:74:1: warning: braces around scalar
initializer [enabled by default]
   gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
   ^
  arch/x86/kernel/traps.c:74:1: warning: (near initialization for
‘idt_table[0].offset_low’) [enabled by default]
  arch/x86/kernel/traps.c:74:1: warning: braces around scalar
initializer [enabled by default]
  arch/x86/kernel/traps.c:74:1: warning: (near initialization for
‘idt_table[0].offset_low’) [enabled by default]
  arch/x86/kernel/traps.c:74:1: warning: excess elements in scalar
initializer [enabled by default]
  arch/x86/kernel/traps.c:74:1: warning: (near initialization for
‘idt_table[0].offset_low’) [enabled by default]

and I don't think this is compiler-specific, because that code is
crap. The declaration for gate_desc is very very different for 32-bit
and 64-bit x86 for whatever braindamaged reasons.

Seriously, WTF? I made the mistake of doing multiple merges
back-to-back with the intention of not doing a full allmodconfig build
in between them, and now I have to undo them all because this pull
request was full of unbelievable shit.

And why the hell was this marked for stable even *IF* it hadn't been
complete and utter tripe? It even has a comment in the commit message
about how this probably doesn't matter. So it's doubly crap: it's
*wrong*, and it didn't actually fix anything to begin with.

There aren't enough swear-words in the English language, so now I'll
have to call you perkeleen vittupää just to express my disgust and
frustration with this crap.

Linus
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[GIT pull] x86 updates for 3.11

2013-07-13 Thread Thomas Gleixner
Linus,

please pull the latest x86-urgent-for-linus git tree from:

   git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 
x86-urgent-for-linus

   * Guarantee IDT page alignment
   * Revert an UEFI patch which caused a regression
   * Add a missing check for EFI runtime services
   * Fix for an x86 erratum where read access to nonexisting MSRs does
 not result in a fault.

Thanks,

tglx

-->
H. Peter Anvin (1):
  x86, suspend: Handle CPUs which fail to #GP on RDMSR

Kees Cook (1):
  x86: Make sure IDT is page aligned

Matt Fleming (2):
  efivars: check for EFI_RUNTIME_SERVICES
  Revert "UEFI: Don't pass boot services regions to SetVirtualAddressMap()"

Xiong Zhou (1):
  x86/platform/ce4100: Add header file for reboot type


 arch/x86/kernel/acpi/sleep.c  |   18 --
 arch/x86/kernel/head_64.S |4 
 arch/x86/kernel/traps.c   |7 ++-
 arch/x86/platform/ce4100/ce4100.c |1 +
 arch/x86/platform/efi/efi.c   |7 ---
 drivers/firmware/efi/efivars.c|3 +++
 6 files changed, 22 insertions(+), 18 deletions(-)

diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 2a34aaf..3312010 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -48,9 +48,20 @@ int x86_acpi_suspend_lowlevel(void)
 #ifndef CONFIG_64BIT
native_store_gdt((struct desc_ptr *)>pmode_gdt);
 
+   /*
+* We have to check that we can write back the value, and not
+* just read it.  At least on 90 nm Pentium M (Family 6, Model
+* 13), reading an invalid MSR is not guaranteed to trap, see
+* Erratum X4 in "Intel Pentium M Processor on 90 nm Process
+* with 2-MB L2 Cache and Intel® Processor A100 and A110 on 90
+* nm process with 512-KB L2 Cache Specification Update".
+*/
if (!rdmsr_safe(MSR_EFER,
>pmode_efer_low,
-   >pmode_efer_high))
+   >pmode_efer_high) &&
+   !wrmsr_safe(MSR_EFER,
+   header->pmode_efer_low,
+   header->pmode_efer_high))
header->pmode_behavior |= (1 << WAKEUP_BEHAVIOR_RESTORE_EFER);
 #endif /* !CONFIG_64BIT */
 
@@ -61,7 +72,10 @@ int x86_acpi_suspend_lowlevel(void)
}
if (!rdmsr_safe(MSR_IA32_MISC_ENABLE,
>pmode_misc_en_low,
-   >pmode_misc_en_high))
+   >pmode_misc_en_high) &&
+   !wrmsr_safe(MSR_IA32_MISC_ENABLE,
+   header->pmode_misc_en_low,
+   header->pmode_misc_en_high))
header->pmode_behavior |=
(1 << WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE);
header->realmode_flags = acpi_realmode_flags;
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 5e4d8a8..317b8cc 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -514,10 +514,6 @@ ENTRY(phys_base)

.section .bss, "aw", @nobits
.align L1_CACHE_BYTES
-ENTRY(idt_table)
-   .skip IDT_ENTRIES * 16
-
-   .align L1_CACHE_BYTES
 ENTRY(debug_idt_table)
.skip IDT_ENTRIES * 16
 
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index b0865e8..0952614 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -68,13 +68,10 @@
 #include 
 
 asmlinkage int system_call(void);
+#endif
 
-/*
- * The IDT has to be page-aligned to simplify the Pentium
- * F0 0F bug workaround.
- */
+/* The IDT has to be page-aligned to keep it aligned with its fixmap. */
 gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
-#endif
 
 DECLARE_BITMAP(used_vectors, NR_VECTORS);
 EXPORT_SYMBOL_GPL(used_vectors);
diff --git a/arch/x86/platform/ce4100/ce4100.c 
b/arch/x86/platform/ce4100/ce4100.c
index f8ab494..9962015 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index c8d5577..90f6ed1 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -931,13 +931,6 @@ void __init efi_enter_virtual_mode(void)
va = efi_ioremap(md->phys_addr, size,
 md->type, md->attribute);
 
-   if (!(md->attribute & EFI_MEMORY_RUNTIME)) {
-   if (!va)
-   pr_err("ioremap of 0x%llX failed!\n",
-  (unsigned long long)md->phys_addr);
-   continue;
-   }
-
md->virt_addr = (u64) (unsigned long) va;
 
if (!va) {
diff --git a/drivers/firmware/efi/efivars.c b/drivers/firmware/efi/efivars.c
index 8bd1bb6..8a7432a 100644
--- 

[GIT pull] x86 updates for 3.11

2013-07-13 Thread Thomas Gleixner
Linus,

please pull the latest x86-urgent-for-linus git tree from:

   git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 
x86-urgent-for-linus

   * Guarantee IDT page alignment
   * Revert an UEFI patch which caused a regression
   * Add a missing check for EFI runtime services
   * Fix for an x86 erratum where read access to nonexisting MSRs does
 not result in a fault.

Thanks,

tglx

--
H. Peter Anvin (1):
  x86, suspend: Handle CPUs which fail to #GP on RDMSR

Kees Cook (1):
  x86: Make sure IDT is page aligned

Matt Fleming (2):
  efivars: check for EFI_RUNTIME_SERVICES
  Revert UEFI: Don't pass boot services regions to SetVirtualAddressMap()

Xiong Zhou (1):
  x86/platform/ce4100: Add header file for reboot type


 arch/x86/kernel/acpi/sleep.c  |   18 --
 arch/x86/kernel/head_64.S |4 
 arch/x86/kernel/traps.c   |7 ++-
 arch/x86/platform/ce4100/ce4100.c |1 +
 arch/x86/platform/efi/efi.c   |7 ---
 drivers/firmware/efi/efivars.c|3 +++
 6 files changed, 22 insertions(+), 18 deletions(-)

diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 2a34aaf..3312010 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -48,9 +48,20 @@ int x86_acpi_suspend_lowlevel(void)
 #ifndef CONFIG_64BIT
native_store_gdt((struct desc_ptr *)header-pmode_gdt);
 
+   /*
+* We have to check that we can write back the value, and not
+* just read it.  At least on 90 nm Pentium M (Family 6, Model
+* 13), reading an invalid MSR is not guaranteed to trap, see
+* Erratum X4 in Intel Pentium M Processor on 90 nm Process
+* with 2-MB L2 Cache and Intel® Processor A100 and A110 on 90
+* nm process with 512-KB L2 Cache Specification Update.
+*/
if (!rdmsr_safe(MSR_EFER,
header-pmode_efer_low,
-   header-pmode_efer_high))
+   header-pmode_efer_high) 
+   !wrmsr_safe(MSR_EFER,
+   header-pmode_efer_low,
+   header-pmode_efer_high))
header-pmode_behavior |= (1  WAKEUP_BEHAVIOR_RESTORE_EFER);
 #endif /* !CONFIG_64BIT */
 
@@ -61,7 +72,10 @@ int x86_acpi_suspend_lowlevel(void)
}
if (!rdmsr_safe(MSR_IA32_MISC_ENABLE,
header-pmode_misc_en_low,
-   header-pmode_misc_en_high))
+   header-pmode_misc_en_high) 
+   !wrmsr_safe(MSR_IA32_MISC_ENABLE,
+   header-pmode_misc_en_low,
+   header-pmode_misc_en_high))
header-pmode_behavior |=
(1  WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE);
header-realmode_flags = acpi_realmode_flags;
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 5e4d8a8..317b8cc 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -514,10 +514,6 @@ ENTRY(phys_base)

.section .bss, aw, @nobits
.align L1_CACHE_BYTES
-ENTRY(idt_table)
-   .skip IDT_ENTRIES * 16
-
-   .align L1_CACHE_BYTES
 ENTRY(debug_idt_table)
.skip IDT_ENTRIES * 16
 
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index b0865e8..0952614 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -68,13 +68,10 @@
 #include asm/setup.h
 
 asmlinkage int system_call(void);
+#endif
 
-/*
- * The IDT has to be page-aligned to simplify the Pentium
- * F0 0F bug workaround.
- */
+/* The IDT has to be page-aligned to keep it aligned with its fixmap. */
 gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
-#endif
 
 DECLARE_BITMAP(used_vectors, NR_VECTORS);
 EXPORT_SYMBOL_GPL(used_vectors);
diff --git a/arch/x86/platform/ce4100/ce4100.c 
b/arch/x86/platform/ce4100/ce4100.c
index f8ab494..9962015 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -14,6 +14,7 @@
 #include linux/module.h
 #include linux/serial_reg.h
 #include linux/serial_8250.h
+#include linux/reboot.h
 
 #include asm/ce4100.h
 #include asm/prom.h
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index c8d5577..90f6ed1 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -931,13 +931,6 @@ void __init efi_enter_virtual_mode(void)
va = efi_ioremap(md-phys_addr, size,
 md-type, md-attribute);
 
-   if (!(md-attribute  EFI_MEMORY_RUNTIME)) {
-   if (!va)
-   pr_err(ioremap of 0x%llX failed!\n,
-  (unsigned long long)md-phys_addr);
-   continue;
-   }
-
md-virt_addr = (u64) (unsigned long) va;
 
if (!va) {
diff --git 

Re: [GIT pull] x86 updates for 3.11

2013-07-13 Thread Linus Torvalds
On Sat, Jul 13, 2013 at 4:21 AM, Thomas Gleixner t...@linutronix.de wrote:

* Guarantee IDT page alignment

What the F*CK, guys?

This piece-of-shit commit is marked for stable, but you clearly never
even test-compiled it, did you?

Because on x86-64 (the which is the only place where the patch
matters), I don't see how you could have avoided this honking huge
warning otherwise:

  arch/x86/kernel/traps.c:74:1: warning: braces around scalar
initializer [enabled by default]
   gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
   ^
  arch/x86/kernel/traps.c:74:1: warning: (near initialization for
‘idt_table[0].offset_low’) [enabled by default]
  arch/x86/kernel/traps.c:74:1: warning: braces around scalar
initializer [enabled by default]
  arch/x86/kernel/traps.c:74:1: warning: (near initialization for
‘idt_table[0].offset_low’) [enabled by default]
  arch/x86/kernel/traps.c:74:1: warning: excess elements in scalar
initializer [enabled by default]
  arch/x86/kernel/traps.c:74:1: warning: (near initialization for
‘idt_table[0].offset_low’) [enabled by default]

and I don't think this is compiler-specific, because that code is
crap. The declaration for gate_desc is very very different for 32-bit
and 64-bit x86 for whatever braindamaged reasons.

Seriously, WTF? I made the mistake of doing multiple merges
back-to-back with the intention of not doing a full allmodconfig build
in between them, and now I have to undo them all because this pull
request was full of unbelievable shit.

And why the hell was this marked for stable even *IF* it hadn't been
complete and utter tripe? It even has a comment in the commit message
about how this probably doesn't matter. So it's doubly crap: it's
*wrong*, and it didn't actually fix anything to begin with.

There aren't enough swear-words in the English language, so now I'll
have to call you perkeleen vittupää just to express my disgust and
frustration with this crap.

Linus
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/


Re: [GIT pull] x86 updates for 3.11

2013-07-13 Thread H. Peter Anvin
Fail on me.  I got rushed and sloppy.  I really need to automate looking
for warnings pre-commit and not rely on Fengguang's robot.

-hpa

--
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