Re: [PATCH] Add hardware PTP support.

[David Miller]

From: Rafal Ozieblo 
Date: Wed, 29 Mar 2017 15:00:51 +0100

> This patch is based on original Harini's patch and Andrei's patch,
> implemented in aseparate file to ease the review/maintanance
> and integration with other platforms.
> 
> In case that macb is compiled as a module, it has been renamed to
> cadence-macb.ko to avoid naming confusion in Makefile.
> 
> This driver does support GEM-GXL:
> - Enable HW time stamp
> - Register ptp clock framework
> - Initialize PTP related registers
> - Updated dma buffer descriptor read/write mechanism
> - HW time stamp on the PTP Ethernet packets are received using the
>   SO_TIMESTAMPING API. Where timers are obtained from the dma buffer
>   descriptors
> - Added tsu_clk to device tree
> 
> Note: Patch on net-next, on March 15th.
> 
> Signed-off-by: Rafal Ozieblo 

Your subject should provide a proper subsystem prefix such as
"cadence: " after "[PATCH] ".

Also, March 15th is nearly half a month ago, you should generate
patches against the current tree.

Re: [PATCH] Add hardware PTP support.

[David Miller]

From: Rafal Ozieblo 
Date: Wed, 29 Mar 2017 15:00:51 +0100

> This patch is based on original Harini's patch and Andrei's patch,
> implemented in aseparate file to ease the review/maintanance
> and integration with other platforms.
> 
> In case that macb is compiled as a module, it has been renamed to
> cadence-macb.ko to avoid naming confusion in Makefile.
> 
> This driver does support GEM-GXL:
> - Enable HW time stamp
> - Register ptp clock framework
> - Initialize PTP related registers
> - Updated dma buffer descriptor read/write mechanism
> - HW time stamp on the PTP Ethernet packets are received using the
>   SO_TIMESTAMPING API. Where timers are obtained from the dma buffer
>   descriptors
> - Added tsu_clk to device tree
> 
> Note: Patch on net-next, on March 15th.
> 
> Signed-off-by: Rafal Ozieblo 

Your subject should provide a proper subsystem prefix such as
"cadence: " after "[PATCH] ".

Also, March 15th is nearly half a month ago, you should generate
patches against the current tree.

[PATCH] Add hardware PTP support.

[Rafal Ozieblo]

This patch is based on original Harini's patch and Andrei's patch,
implemented in aseparate file to ease the review/maintanance
and integration with other platforms.

In case that macb is compiled as a module, it has been renamed to
cadence-macb.ko to avoid naming confusion in Makefile.

This driver does support GEM-GXL:
- Enable HW time stamp
- Register ptp clock framework
- Initialize PTP related registers
- Updated dma buffer descriptor read/write mechanism
- HW time stamp on the PTP Ethernet packets are received using the
  SO_TIMESTAMPING API. Where timers are obtained from the dma buffer
  descriptors
- Added tsu_clk to device tree

Note: Patch on net-next, on March 15th.

Signed-off-by: Rafal Ozieblo 
---
 Documentation/devicetree/bindings/net/macb.txt |   1 +
 drivers/net/ethernet/cadence/Kconfig   |  10 +-
 drivers/net/ethernet/cadence/Makefile  |   7 +-
 drivers/net/ethernet/cadence/macb.c| 237 ++--
 drivers/net/ethernet/cadence/macb.h| 176 +-
 drivers/net/ethernet/cadence/macb_ptp.c| 724 +
 6 files changed, 1109 insertions(+), 46 deletions(-)
 create mode 100755 drivers/net/ethernet/cadence/macb_ptp.c

diff --git a/Documentation/devicetree/bindings/net/macb.txt 
b/Documentation/devicetree/bindings/net/macb.txt
index 1506e94..27966ae 100644
--- a/Documentation/devicetree/bindings/net/macb.txt
+++ b/Documentation/devicetree/bindings/net/macb.txt
@@ -22,6 +22,7 @@ Required properties:
Required elements: 'pclk', 'hclk'
Optional elements: 'tx_clk'
Optional elements: 'rx_clk' applies to cdns,zynqmp-gem
+   Optional elements: 'tsu_clk'
 - clocks: Phandles to input clocks.
 
 Optional properties for PHY child node:
diff --git a/drivers/net/ethernet/cadence/Kconfig 
b/drivers/net/ethernet/cadence/Kconfig
index 608bea1..427d65a 100644
--- a/drivers/net/ethernet/cadence/Kconfig
+++ b/drivers/net/ethernet/cadence/Kconfig
@@ -29,7 +29,15 @@ config MACB
  support for the MACB/GEM chip.
 
  To compile this driver as a module, choose M here: the module
- will be called macb.
+ will be macb.
+
+config MACB_USE_HWSTAMP
+   bool "Use IEEE 1588 hwstamp"
+   depends on MACB
+   default y
+   imply PTP_1588_CLOCK
+   ---help---
+ Enable IEEE 1588 Precision Time Protocol (PTP) support for MACB.
 
 config MACB_PCI
tristate "Cadence PCI MACB/GEM support"
diff --git a/drivers/net/ethernet/cadence/Makefile 
b/drivers/net/ethernet/cadence/Makefile
index 4ba7559..a7f6e04 100644
--- a/drivers/net/ethernet/cadence/Makefile
+++ b/drivers/net/ethernet/cadence/Makefile
@@ -1,6 +1,11 @@
 #
 # Makefile for the Atmel network device drivers.
 #
+cadence-macb-y := macb.o
 
-obj-$(CONFIG_MACB) += macb.o
+ifeq ($(CONFIG_MACB_USE_HWSTAMP),y)
+cadence-macb-y += macb_ptp.o
+endif
+
+obj-$(CONFIG_MACB) += cadence-macb.o
 obj-$(CONFIG_MACB_PCI) += macb_pci.o
diff --git a/drivers/net/ethernet/cadence/macb.c 
b/drivers/net/ethernet/cadence/macb.c
index 30606b1..32af94e 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -79,33 +79,84 @@
 #define MACB_HALT_TIMEOUT  1230
 
 /* DMA buffer descriptor might be different size
- * depends on hardware configuration.
+ * depends on hardware configuration:
+ *
+ * 1. dma address width 32 bits:
+ *word 1: 32 bit address of Data Buffer
+ *word 2: control
+ *
+ * 2. dma address width 64 bits:
+ *word 1: 32 bit address of Data Buffer
+ *word 2: control
+ *word 3: upper 32 bit address of Data Buffer
+ *word 4: unused
+ *
+ * 3. dma address width 32 bits with hardware timestamping:
+ *word 1: 32 bit address of Data Buffer
+ *word 2: control
+ *word 3: timestamp word 1
+ *word 4: timestamp word 2
+ *
+ * 4. dma address width 64 bits with hardware timestamping:
+ *word 1: 32 bit address of Data Buffer
+ *word 2: control
+ *word 3: upper 32 bit address of Data Buffer
+ *word 4: unused
+ *word 5: timestamp word 1
+ *word 6: timestamp word 2
  */
 static unsigned int macb_dma_desc_get_size(struct macb *bp)
 {
-#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
-   if (bp->hw_dma_cap == HW_DMA_CAP_64B)
-   return sizeof(struct macb_dma_desc) + sizeof(struct 
macb_dma_desc_64);
+#ifdef MACB_EXT_DESC
+   unsigned int desc_size;
+
+   switch (bp->hw_dma_cap) {
+   case HW_DMA_CAP_64B:
+   desc_size = sizeof(struct macb_dma_desc)
+   + sizeof(struct macb_dma_desc_64);
+   break;
+   case HW_DMA_CAP_PTP:
+   desc_size = sizeof(struct macb_dma_desc)
+   + sizeof(struct macb_dma_desc_ptp);
+   break;
+   case HW_DMA_CAP_64B_PTP:
+   desc_size = sizeof(struct macb_dma_desc)
+   + sizeof(struct macb_dma_desc_64)
+   + sizeof(struct macb_dma_desc_ptp);
+

[PATCH] Add hardware PTP support.

[Rafal Ozieblo]

This patch is based on original Harini's patch and Andrei's patch,
implemented in aseparate file to ease the review/maintanance
and integration with other platforms.

In case that macb is compiled as a module, it has been renamed to
cadence-macb.ko to avoid naming confusion in Makefile.

This driver does support GEM-GXL:
- Enable HW time stamp
- Register ptp clock framework
- Initialize PTP related registers
- Updated dma buffer descriptor read/write mechanism
- HW time stamp on the PTP Ethernet packets are received using the
  SO_TIMESTAMPING API. Where timers are obtained from the dma buffer
  descriptors
- Added tsu_clk to device tree

Note: Patch on net-next, on March 15th.

Signed-off-by: Rafal Ozieblo 
---
 Documentation/devicetree/bindings/net/macb.txt |   1 +
 drivers/net/ethernet/cadence/Kconfig   |  10 +-
 drivers/net/ethernet/cadence/Makefile  |   7 +-
 drivers/net/ethernet/cadence/macb.c| 237 ++--
 drivers/net/ethernet/cadence/macb.h| 176 +-
 drivers/net/ethernet/cadence/macb_ptp.c| 724 +
 6 files changed, 1109 insertions(+), 46 deletions(-)
 create mode 100755 drivers/net/ethernet/cadence/macb_ptp.c

diff --git a/Documentation/devicetree/bindings/net/macb.txt 
b/Documentation/devicetree/bindings/net/macb.txt
index 1506e94..27966ae 100644
--- a/Documentation/devicetree/bindings/net/macb.txt
+++ b/Documentation/devicetree/bindings/net/macb.txt
@@ -22,6 +22,7 @@ Required properties:
Required elements: 'pclk', 'hclk'
Optional elements: 'tx_clk'
Optional elements: 'rx_clk' applies to cdns,zynqmp-gem
+   Optional elements: 'tsu_clk'
 - clocks: Phandles to input clocks.
 
 Optional properties for PHY child node:
diff --git a/drivers/net/ethernet/cadence/Kconfig 
b/drivers/net/ethernet/cadence/Kconfig
index 608bea1..427d65a 100644
--- a/drivers/net/ethernet/cadence/Kconfig
+++ b/drivers/net/ethernet/cadence/Kconfig
@@ -29,7 +29,15 @@ config MACB
  support for the MACB/GEM chip.
 
  To compile this driver as a module, choose M here: the module
- will be called macb.
+ will be macb.
+
+config MACB_USE_HWSTAMP
+   bool "Use IEEE 1588 hwstamp"
+   depends on MACB
+   default y
+   imply PTP_1588_CLOCK
+   ---help---
+ Enable IEEE 1588 Precision Time Protocol (PTP) support for MACB.
 
 config MACB_PCI
tristate "Cadence PCI MACB/GEM support"
diff --git a/drivers/net/ethernet/cadence/Makefile 
b/drivers/net/ethernet/cadence/Makefile
index 4ba7559..a7f6e04 100644
--- a/drivers/net/ethernet/cadence/Makefile
+++ b/drivers/net/ethernet/cadence/Makefile
@@ -1,6 +1,11 @@
 #
 # Makefile for the Atmel network device drivers.
 #
+cadence-macb-y := macb.o
 
-obj-$(CONFIG_MACB) += macb.o
+ifeq ($(CONFIG_MACB_USE_HWSTAMP),y)
+cadence-macb-y += macb_ptp.o
+endif
+
+obj-$(CONFIG_MACB) += cadence-macb.o
 obj-$(CONFIG_MACB_PCI) += macb_pci.o
diff --git a/drivers/net/ethernet/cadence/macb.c 
b/drivers/net/ethernet/cadence/macb.c
index 30606b1..32af94e 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -79,33 +79,84 @@
 #define MACB_HALT_TIMEOUT  1230
 
 /* DMA buffer descriptor might be different size
- * depends on hardware configuration.
+ * depends on hardware configuration:
+ *
+ * 1. dma address width 32 bits:
+ *word 1: 32 bit address of Data Buffer
+ *word 2: control
+ *
+ * 2. dma address width 64 bits:
+ *word 1: 32 bit address of Data Buffer
+ *word 2: control
+ *word 3: upper 32 bit address of Data Buffer
+ *word 4: unused
+ *
+ * 3. dma address width 32 bits with hardware timestamping:
+ *word 1: 32 bit address of Data Buffer
+ *word 2: control
+ *word 3: timestamp word 1
+ *word 4: timestamp word 2
+ *
+ * 4. dma address width 64 bits with hardware timestamping:
+ *word 1: 32 bit address of Data Buffer
+ *word 2: control
+ *word 3: upper 32 bit address of Data Buffer
+ *word 4: unused
+ *word 5: timestamp word 1
+ *word 6: timestamp word 2
  */
 static unsigned int macb_dma_desc_get_size(struct macb *bp)
 {
-#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
-   if (bp->hw_dma_cap == HW_DMA_CAP_64B)
-   return sizeof(struct macb_dma_desc) + sizeof(struct 
macb_dma_desc_64);
+#ifdef MACB_EXT_DESC
+   unsigned int desc_size;
+
+   switch (bp->hw_dma_cap) {
+   case HW_DMA_CAP_64B:
+   desc_size = sizeof(struct macb_dma_desc)
+   + sizeof(struct macb_dma_desc_64);
+   break;
+   case HW_DMA_CAP_PTP:
+   desc_size = sizeof(struct macb_dma_desc)
+   + sizeof(struct macb_dma_desc_ptp);
+   break;
+   case HW_DMA_CAP_64B_PTP:
+   desc_size = sizeof(struct macb_dma_desc)
+   + sizeof(struct macb_dma_desc_64)
+   + sizeof(struct macb_dma_desc_ptp);
+   break;
+