On Tue, 22 Aug 2017 16:05:01 -0500
Bjorn Helgaas wrote:
> On Thu, Aug 10, 2017 at 10:54:31AM -0600, Alex Williamson wrote:
> > PCI_CAP_EXP_ENDPOINT_SIZEOF_V1 defines the size of the PCIe express
> > capability structure for v1 devices with link, but we also have a need
> > in the vfio code for si
On Thu, Aug 10, 2017 at 10:54:31AM -0600, Alex Williamson wrote:
> PCI_CAP_EXP_ENDPOINT_SIZEOF_V1 defines the size of the PCIe express
> capability structure for v1 devices with link, but we also have a need
> in the vfio code for sizing the capability for devices without link,
> such as root compl
Hi Alex,
On 10/08/2017 18:54, Alex Williamson wrote:
> PCI_CAP_EXP_ENDPOINT_SIZEOF_V1 defines the size of the PCIe express
> capability structure for v1 devices with link, but we also have a need
> in the vfio code for sizing the capability for devices without link,
> such as root complex endpoint
PCI_CAP_EXP_ENDPOINT_SIZEOF_V1 defines the size of the PCIe express
capability structure for v1 devices with link, but we also have a need
in the vfio code for sizing the capability for devices without link,
such as root complex endpoints. Create a separate define for this
ending the structure bef
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