Re: [PATCH] irqchip/gic-v3: Ensure GICR_CTLR.EnableLPI=0 is observed before enabling

On 14/03/18 13:33, Shanker Donthineni wrote: > Hi Marc, > > On 03/14/2018 02:41 AM, Marc Zyngier wrote: >> Hi Shanker, >> >> On Wed, 14 Mar 2018 00:50:01 +, >> Shanker Donthineni wrote: >>> >>> The definition of the GICR_CTLR.RWP control bit was expanded to indicate >>> status of changing GICR

Re: [PATCH] irqchip/gic-v3: Ensure GICR_CTLR.EnableLPI=0 is observed before enabling

Hi Marc, On 03/14/2018 02:41 AM, Marc Zyngier wrote: > Hi Shanker, > > On Wed, 14 Mar 2018 00:50:01 +, > Shanker Donthineni wrote: >> >> The definition of the GICR_CTLR.RWP control bit was expanded to indicate >> status of changing GICR_CTLR.EnableLPI from 1 to 0 is being in progress >> or co

Re: [PATCH] irqchip/gic-v3: Ensure GICR_CTLR.EnableLPI=0 is observed before enabling

On Tue, Mar 13, 2018 at 07:50:01PM -0500, Shanker Donthineni wrote: > The definition of the GICR_CTLR.RWP control bit was expanded to indicate > status of changing GICR_CTLR.EnableLPI from 1 to 0 is being in progress > or completed. Software must observe GICR_CTLR.RWP==0 after clearing > GICR_CTLR.

Re: [PATCH] irqchip/gic-v3: Ensure GICR_CTLR.EnableLPI=0 is observed before enabling

Hi Shanker, On Wed, 14 Mar 2018 00:50:01 +, Shanker Donthineni wrote: > > The definition of the GICR_CTLR.RWP control bit was expanded to indicate > status of changing GICR_CTLR.EnableLPI from 1 to 0 is being in progress > or completed. Software must observe GICR_CTLR.RWP==0 after clearing >

[PATCH] irqchip/gic-v3: Ensure GICR_CTLR.EnableLPI=0 is observed before enabling

The definition of the GICR_CTLR.RWP control bit was expanded to indicate status of changing GICR_CTLR.EnableLPI from 1 to 0 is being in progress or completed. Software must observe GICR_CTLR.RWP==0 after clearing GICR_CTLR.EnableLPI from 1 to 0 and before writing GICR_PENDBASER and/or GICR_PROPBASE