Re: [PATCH] net: davinci_emac: Fix incorrect masking of tx and rx error channel

[patchwork-bot+netdevbpf]

Hello:

This patch was applied to netdev/net.git (refs/heads/master):

On Tue, 20 Apr 2021 18:16:14 +0100 you wrote:
> From: Colin Ian King 
> 
> The bit-masks used for the TXERRCH and RXERRCH (tx and rx error channels)
> are incorrect and always lead to a zero result. The mask values are
> currently the incorrect post-right shifted values, fix this by setting
> them to the currect values.
> 
> [...]

Here is the summary with links:
  - net: davinci_emac: Fix incorrect masking of tx and rx error channel
https://git.kernel.org/netdev/net/c/d83b8aa5207d

You are awesome, thank you!
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[PATCH] net: davinci_emac: Fix incorrect masking of tx and rx error channel

[Colin King]

From: Colin Ian King 

The bit-masks used for the TXERRCH and RXERRCH (tx and rx error channels)
are incorrect and always lead to a zero result. The mask values are
currently the incorrect post-right shifted values, fix this by setting
them to the currect values.

(I double checked these against the TMS320TCI6482 data sheet, section
5.30, page 127 to ensure I had the correct mask values for the TXERRCH
and RXERRCH fields in the MACSTATUS register).

Addresses-Coverity: ("Operands don't affect result")
Fixes: a6286ee630f6 ("net: Add TI DaVinci EMAC driver")
Signed-off-by: Colin Ian King 
---
 drivers/net/ethernet/ti/davinci_emac.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/ti/davinci_emac.c 
b/drivers/net/ethernet/ti/davinci_emac.c
index 57450b174fc4..fb5eca688af9 100644
--- a/drivers/net/ethernet/ti/davinci_emac.c
+++ b/drivers/net/ethernet/ti/davinci_emac.c
@@ -183,11 +183,11 @@ static const char emac_version_string[] = "TI DaVinci 
EMAC Linux v6.1";
 /* EMAC mac_status register */
 #define EMAC_MACSTATUS_TXERRCODE_MASK  (0xF0)
 #define EMAC_MACSTATUS_TXERRCODE_SHIFT (20)
-#define EMAC_MACSTATUS_TXERRCH_MASK(0x7)
+#define EMAC_MACSTATUS_TXERRCH_MASK(0x7)
 #define EMAC_MACSTATUS_TXERRCH_SHIFT   (16)
 #define EMAC_MACSTATUS_RXERRCODE_MASK  (0xF000)
 #define EMAC_MACSTATUS_RXERRCODE_SHIFT (12)
-#define EMAC_MACSTATUS_RXERRCH_MASK(0x7)
+#define EMAC_MACSTATUS_RXERRCH_MASK(0x700)
 #define EMAC_MACSTATUS_RXERRCH_SHIFT   (8)
 
 /* EMAC RX register masks */
-- 
2.30.2