On Tue, Dec 5, 2017 at 7:25 AM, André Przywara wrote:
> On 04/12/17 05:19, Chen-Yu Tsai wrote:
>> Hi,
>>
>> This is a small fix to get MMC performance up to proper speeds on the
>
> Maybe a small fix for a skilled developer, but a giant leap for all
> users ;-)
> MMC
On Tue, Dec 5, 2017 at 7:25 AM, André Przywara wrote:
> On 04/12/17 05:19, Chen-Yu Tsai wrote:
>> Hi,
>>
>> This is a small fix to get MMC performance up to proper speeds on the
>
> Maybe a small fix for a skilled developer, but a giant leap for all
> users ;-)
> MMC performance goes from:
On 04/12/17 05:19, Chen-Yu Tsai wrote:
> Hi,
>
> This is a small fix to get MMC performance up to proper speeds on the
Maybe a small fix for a skilled developer, but a giant leap for all
users ;-)
MMC performance goes from: (4.15-rc1)
SD: Timing buffered disk reads: 36 MB in 3.17 seconds =
On 04/12/17 05:19, Chen-Yu Tsai wrote:
> Hi,
>
> This is a small fix to get MMC performance up to proper speeds on the
Maybe a small fix for a skilled developer, but a giant leap for all
users ;-)
MMC performance goes from: (4.15-rc1)
SD: Timing buffered disk reads: 36 MB in 3.17 seconds =
Hi,
This is a small fix to get MMC performance up to proper speeds on the
A64. According to the BSP kernel, the MMC module clocks have a /2 fixed
post-divider between the clock output and the MMC module, like what
we've seen with the "new MMC timing mode" on the A83T, but the A64 does
not have
Hi,
This is a small fix to get MMC performance up to proper speeds on the
A64. According to the BSP kernel, the MMC module clocks have a /2 fixed
post-divider between the clock output and the MMC module, like what
we've seen with the "new MMC timing mode" on the A83T, but the A64 does
not have
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