[PATCH 05/10] ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos3250
Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and generates an error: genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68) The GIC requires shared interrupts to be edge rising or level high. Platform declares support for both. Choose level high everywhere. Reported-by: Marek SzyprowskiReported-by: Geert Uytterhoeven Reported-by: Alban Browaeys Cc: Marc Zyngier Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 20 +-- arch/arm/boot/dts/exynos3250.dtsi | 93 ++- 2 files changed, 71 insertions(+), 42 deletions(-) diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index 40ea7de44933..9ee16ab30608 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -374,8 +374,14 @@ interrupt-controller; interrupt-parent = <>; - interrupts = <0 32 0>, <0 33 0>, <0 34 0>, <0 35 0>, - <0 36 0>, <0 37 0>, <0 38 0>, <0 39 0>; + interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, +<0 33 IRQ_TYPE_LEVEL_HIGH>, +<0 34 IRQ_TYPE_LEVEL_HIGH>, +<0 35 IRQ_TYPE_LEVEL_HIGH>, +<0 36 IRQ_TYPE_LEVEL_HIGH>, +<0 37 IRQ_TYPE_LEVEL_HIGH>, +<0 38 IRQ_TYPE_LEVEL_HIGH>, +<0 39 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; }; @@ -385,8 +391,14 @@ interrupt-controller; interrupt-parent = <>; - interrupts = <0 40 0>, <0 41 0>, <0 42 0>, <0 43 0>, - <0 44 0>, <0 45 0>, <0 46 0>, <0 47 0>; + interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>, +<0 41 IRQ_TYPE_LEVEL_HIGH>, +<0 42 IRQ_TYPE_LEVEL_HIGH>, +<0 43 IRQ_TYPE_LEVEL_HIGH>, +<0 44 IRQ_TYPE_LEVEL_HIGH>, +<0 45 IRQ_TYPE_LEVEL_HIGH>, +<0 46 IRQ_TYPE_LEVEL_HIGH>, +<0 47 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; }; diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index e9d2556c0dfd..9703d81d1eb3 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -20,6 +20,7 @@ #include "exynos4-cpu-thermal.dtsi" #include "exynos-syscon-restart.dtsi" #include +#include / { compatible = "samsung,exynos3250"; @@ -211,7 +212,8 @@ rtc: rtc@1007 { compatible = "samsung,s3c6410-rtc"; reg = <0x1007 0x100>; - interrupts = <0 73 0>, <0 74 0>; + interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>, +<0 74 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <_system_controller>; status = "disabled"; }; @@ -219,7 +221,7 @@ tmu: tmu@100C { compatible = "samsung,exynos3250-tmu"; reg = <0x100C 0x100>; - interrupts = <0 216 0>; + interrupts = <0 216 IRQ_TYPE_LEVEL_HIGH>; clocks = < CLK_TMU_APBIF>; clock-names = "tmu_apbif"; #include "exynos4412-tmu-sensor-conf.dtsi" @@ -240,8 +242,14 @@ mct@1005 { compatible = "samsung,exynos4210-mct"; reg = <0x1005 0x800>; - interrupts = <0 218 0>, <0 219 0>, <0 220 0>, <0 221 0>, -<0 223 0>, <0 226 0>, <0 227 0>, <0 228 0>; + interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>, +<0 219 IRQ_TYPE_LEVEL_HIGH>, +<0 220 IRQ_TYPE_LEVEL_HIGH>, +<0 221 IRQ_TYPE_LEVEL_HIGH>, +<0 223 IRQ_TYPE_LEVEL_HIGH>, +<0 226 IRQ_TYPE_LEVEL_HIGH>, +<0 227 IRQ_TYPE_LEVEL_HIGH>, +<0 228 IRQ_TYPE_LEVEL_HIGH>; clocks = < CLK_FIN_PLL>, < CLK_MCT>; clock-names = "fin_pll", "mct"; }; @@ -249,24 +257,24 @@ pinctrl_1: pinctrl@1100 { compatible = "samsung,exynos3250-pinctrl"; reg = <0x1100 0x1000>; -
[PATCH 05/10] ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos3250
Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and generates an error: genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68) The GIC requires shared interrupts to be edge rising or level high. Platform declares support for both. Choose level high everywhere. Reported-by: Marek Szyprowski Reported-by: Geert Uytterhoeven Reported-by: Alban Browaeys Cc: Marc Zyngier Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 20 +-- arch/arm/boot/dts/exynos3250.dtsi | 93 ++- 2 files changed, 71 insertions(+), 42 deletions(-) diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index 40ea7de44933..9ee16ab30608 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -374,8 +374,14 @@ interrupt-controller; interrupt-parent = <>; - interrupts = <0 32 0>, <0 33 0>, <0 34 0>, <0 35 0>, - <0 36 0>, <0 37 0>, <0 38 0>, <0 39 0>; + interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, +<0 33 IRQ_TYPE_LEVEL_HIGH>, +<0 34 IRQ_TYPE_LEVEL_HIGH>, +<0 35 IRQ_TYPE_LEVEL_HIGH>, +<0 36 IRQ_TYPE_LEVEL_HIGH>, +<0 37 IRQ_TYPE_LEVEL_HIGH>, +<0 38 IRQ_TYPE_LEVEL_HIGH>, +<0 39 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; }; @@ -385,8 +391,14 @@ interrupt-controller; interrupt-parent = <>; - interrupts = <0 40 0>, <0 41 0>, <0 42 0>, <0 43 0>, - <0 44 0>, <0 45 0>, <0 46 0>, <0 47 0>; + interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>, +<0 41 IRQ_TYPE_LEVEL_HIGH>, +<0 42 IRQ_TYPE_LEVEL_HIGH>, +<0 43 IRQ_TYPE_LEVEL_HIGH>, +<0 44 IRQ_TYPE_LEVEL_HIGH>, +<0 45 IRQ_TYPE_LEVEL_HIGH>, +<0 46 IRQ_TYPE_LEVEL_HIGH>, +<0 47 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; }; diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index e9d2556c0dfd..9703d81d1eb3 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -20,6 +20,7 @@ #include "exynos4-cpu-thermal.dtsi" #include "exynos-syscon-restart.dtsi" #include +#include / { compatible = "samsung,exynos3250"; @@ -211,7 +212,8 @@ rtc: rtc@1007 { compatible = "samsung,s3c6410-rtc"; reg = <0x1007 0x100>; - interrupts = <0 73 0>, <0 74 0>; + interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>, +<0 74 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <_system_controller>; status = "disabled"; }; @@ -219,7 +221,7 @@ tmu: tmu@100C { compatible = "samsung,exynos3250-tmu"; reg = <0x100C 0x100>; - interrupts = <0 216 0>; + interrupts = <0 216 IRQ_TYPE_LEVEL_HIGH>; clocks = < CLK_TMU_APBIF>; clock-names = "tmu_apbif"; #include "exynos4412-tmu-sensor-conf.dtsi" @@ -240,8 +242,14 @@ mct@1005 { compatible = "samsung,exynos4210-mct"; reg = <0x1005 0x800>; - interrupts = <0 218 0>, <0 219 0>, <0 220 0>, <0 221 0>, -<0 223 0>, <0 226 0>, <0 227 0>, <0 228 0>; + interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>, +<0 219 IRQ_TYPE_LEVEL_HIGH>, +<0 220 IRQ_TYPE_LEVEL_HIGH>, +<0 221 IRQ_TYPE_LEVEL_HIGH>, +<0 223 IRQ_TYPE_LEVEL_HIGH>, +<0 226 IRQ_TYPE_LEVEL_HIGH>, +<0 227 IRQ_TYPE_LEVEL_HIGH>, +<0 228 IRQ_TYPE_LEVEL_HIGH>; clocks = < CLK_FIN_PLL>, < CLK_MCT>; clock-names = "fin_pll", "mct"; }; @@ -249,24 +257,24 @@ pinctrl_1: pinctrl@1100 { compatible = "samsung,exynos3250-pinctrl"; reg = <0x1100 0x1000>; - interrupts = <0 225 0>; + interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;