Re: [PATCH 06/10] ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5

[Javier Martinez Canillas]

Hello Krzysztof,

On 09/16/2016 03:42 PM, Krzysztof Kozlowski wrote:
> Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and
> generates an error:
>   genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68)
> 
> The GIC requires shared interrupts to be edge rising or level high.
> Platform declares support for both.  Choose level high everywhere.
> 
> Reported-by: Marek Szyprowski 
> Reported-by: Geert Uytterhoeven 
> Reported-by: Alban Browaeys 
> Cc: Marc Zyngier 
> Signed-off-by: Krzysztof Kozlowski 
> ---

I tested this patch on an Exynos5800 Peach Pi Chromebook and
an Exynos5422 Odroid XU4 board and no regressions were found.

Tested-by: Javier Martinez Canillas 

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America

Re: [PATCH 06/10] ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5

[Javier Martinez Canillas]

Hello Krzysztof,

On 09/16/2016 03:42 PM, Krzysztof Kozlowski wrote:
> Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and
> generates an error:
>   genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68)
> 
> The GIC requires shared interrupts to be edge rising or level high.
> Platform declares support for both.  Choose level high everywhere.
> 
> Reported-by: Marek Szyprowski 
> Reported-by: Geert Uytterhoeven 
> Reported-by: Alban Browaeys 
> Cc: Marc Zyngier 
> Signed-off-by: Krzysztof Kozlowski 
> ---

I tested this patch on an Exynos5800 Peach Pi Chromebook and
an Exynos5422 Odroid XU4 board and no regressions were found.

Tested-by: Javier Martinez Canillas 

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America

Re: [PATCH 06/10] ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5

[Alim Akhtar]

On Sat, Sep 17, 2016 at 1:12 AM, Krzysztof Kozlowski  wrote:
> Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and
> generates an error:
> genirq: Setting trigger mode 0 for irq 16 failed 
> (gic_set_type+0x0/0x68)
>
> The GIC requires shared interrupts to be edge rising or level high.
> Platform declares support for both.  Choose level high everywhere.
>
> Reported-by: Marek Szyprowski 
> Reported-by: Geert Uytterhoeven 
> Reported-by: Alban Browaeys 
> Cc: Marc Zyngier 
> Signed-off-by: Krzysztof Kozlowski 
> ---

Reviewed-by: Alim Akhtar 

Tested in exynos5800, so

Tested-by: Alim Akhtar 

>  arch/arm/boot/dts/exynos5.dtsi | 60 
> ++
>  1 file changed, 43 insertions(+), 17 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
> index 8f06609879f5..d9b1607db5ad 100644
> --- a/arch/arm/boot/dts/exynos5.dtsi
> +++ b/arch/arm/boot/dts/exynos5.dtsi
> @@ -13,6 +13,7 @@
>   * published by the Free Software Foundation.
>   */
>
> +#include 
>  #include "exynos-syscon-restart.dtsi"
>
>  / {
> @@ -53,14 +54,38 @@
> interrupt-controller;
> samsung,combiner-nr = <32>;
> reg = <0x1044 0x1000>;
> -   interrupts =<0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
> -   <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
> -   <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
> -   <0 12 0>, <0 13 0>, <0 14 0>, <0 15 
> 0>,
> -   <0 16 0>, <0 17 0>, <0 18 0>, <0 19 
> 0>,
> -   <0 20 0>, <0 21 0>, <0 22 0>, <0 23 
> 0>,
> -   <0 24 0>, <0 25 0>, <0 26 0>, <0 27 
> 0>,
> -   <0 28 0>, <0 29 0>, <0 30 0>, <0 31 
> 0>;
> +   interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
> +<0 1 IRQ_TYPE_LEVEL_HIGH>,
> +<0 2 IRQ_TYPE_LEVEL_HIGH>,
> +<0 3 IRQ_TYPE_LEVEL_HIGH>,
> +<0 4 IRQ_TYPE_LEVEL_HIGH>,
> +<0 5 IRQ_TYPE_LEVEL_HIGH>,
> +<0 6 IRQ_TYPE_LEVEL_HIGH>,
> +<0 7 IRQ_TYPE_LEVEL_HIGH>,
> +<0 8 IRQ_TYPE_LEVEL_HIGH>,
> +<0 9 IRQ_TYPE_LEVEL_HIGH>,
> +<0 10 IRQ_TYPE_LEVEL_HIGH>,
> +<0 11 IRQ_TYPE_LEVEL_HIGH>,
> +<0 12 IRQ_TYPE_LEVEL_HIGH>,
> +<0 13 IRQ_TYPE_LEVEL_HIGH>,
> +<0 14 IRQ_TYPE_LEVEL_HIGH>,
> +<0 15 IRQ_TYPE_LEVEL_HIGH>,
> +<0 16 IRQ_TYPE_LEVEL_HIGH>,
> +<0 17 IRQ_TYPE_LEVEL_HIGH>,
> +<0 18 IRQ_TYPE_LEVEL_HIGH>,
> +<0 19 IRQ_TYPE_LEVEL_HIGH>,
> +<0 20 IRQ_TYPE_LEVEL_HIGH>,
> +<0 21 IRQ_TYPE_LEVEL_HIGH>,
> +<0 22 IRQ_TYPE_LEVEL_HIGH>,
> +<0 23 IRQ_TYPE_LEVEL_HIGH>,
> +<0 24 IRQ_TYPE_LEVEL_HIGH>,
> +<0 25 IRQ_TYPE_LEVEL_HIGH>,
> +<0 26 IRQ_TYPE_LEVEL_HIGH>,
> +<0 27 IRQ_TYPE_LEVEL_HIGH>,
> +<0 28 IRQ_TYPE_LEVEL_HIGH>,
> +<0 29 IRQ_TYPE_LEVEL_HIGH>,
> +<0 30 IRQ_TYPE_LEVEL_HIGH>,
> +<0 31 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> gic: interrupt-controller@10481000 {
> @@ -82,31 +107,31 @@
> serial_0: serial@12C0 {
> compatible = "samsung,exynos4210-uart";
> reg = <0x12C0 0x100>;
> -   interrupts = <0 51 0>;
> +   interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> serial_1: serial@12C1 {
> compatible = "samsung,exynos4210-uart";
> reg = <0x12C1 0x100>;
> -   interrupts = <0 52 0>;
> +   interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> serial_2: 

Re: [PATCH 06/10] ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5

[Alim Akhtar]

On Sat, Sep 17, 2016 at 1:12 AM, Krzysztof Kozlowski  wrote:
> Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and
> generates an error:
> genirq: Setting trigger mode 0 for irq 16 failed 
> (gic_set_type+0x0/0x68)
>
> The GIC requires shared interrupts to be edge rising or level high.
> Platform declares support for both.  Choose level high everywhere.
>
> Reported-by: Marek Szyprowski 
> Reported-by: Geert Uytterhoeven 
> Reported-by: Alban Browaeys 
> Cc: Marc Zyngier 
> Signed-off-by: Krzysztof Kozlowski 
> ---

Reviewed-by: Alim Akhtar 

Tested in exynos5800, so

Tested-by: Alim Akhtar 

>  arch/arm/boot/dts/exynos5.dtsi | 60 
> ++
>  1 file changed, 43 insertions(+), 17 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
> index 8f06609879f5..d9b1607db5ad 100644
> --- a/arch/arm/boot/dts/exynos5.dtsi
> +++ b/arch/arm/boot/dts/exynos5.dtsi
> @@ -13,6 +13,7 @@
>   * published by the Free Software Foundation.
>   */
>
> +#include 
>  #include "exynos-syscon-restart.dtsi"
>
>  / {
> @@ -53,14 +54,38 @@
> interrupt-controller;
> samsung,combiner-nr = <32>;
> reg = <0x1044 0x1000>;
> -   interrupts =<0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
> -   <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
> -   <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
> -   <0 12 0>, <0 13 0>, <0 14 0>, <0 15 
> 0>,
> -   <0 16 0>, <0 17 0>, <0 18 0>, <0 19 
> 0>,
> -   <0 20 0>, <0 21 0>, <0 22 0>, <0 23 
> 0>,
> -   <0 24 0>, <0 25 0>, <0 26 0>, <0 27 
> 0>,
> -   <0 28 0>, <0 29 0>, <0 30 0>, <0 31 
> 0>;
> +   interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
> +<0 1 IRQ_TYPE_LEVEL_HIGH>,
> +<0 2 IRQ_TYPE_LEVEL_HIGH>,
> +<0 3 IRQ_TYPE_LEVEL_HIGH>,
> +<0 4 IRQ_TYPE_LEVEL_HIGH>,
> +<0 5 IRQ_TYPE_LEVEL_HIGH>,
> +<0 6 IRQ_TYPE_LEVEL_HIGH>,
> +<0 7 IRQ_TYPE_LEVEL_HIGH>,
> +<0 8 IRQ_TYPE_LEVEL_HIGH>,
> +<0 9 IRQ_TYPE_LEVEL_HIGH>,
> +<0 10 IRQ_TYPE_LEVEL_HIGH>,
> +<0 11 IRQ_TYPE_LEVEL_HIGH>,
> +<0 12 IRQ_TYPE_LEVEL_HIGH>,
> +<0 13 IRQ_TYPE_LEVEL_HIGH>,
> +<0 14 IRQ_TYPE_LEVEL_HIGH>,
> +<0 15 IRQ_TYPE_LEVEL_HIGH>,
> +<0 16 IRQ_TYPE_LEVEL_HIGH>,
> +<0 17 IRQ_TYPE_LEVEL_HIGH>,
> +<0 18 IRQ_TYPE_LEVEL_HIGH>,
> +<0 19 IRQ_TYPE_LEVEL_HIGH>,
> +<0 20 IRQ_TYPE_LEVEL_HIGH>,
> +<0 21 IRQ_TYPE_LEVEL_HIGH>,
> +<0 22 IRQ_TYPE_LEVEL_HIGH>,
> +<0 23 IRQ_TYPE_LEVEL_HIGH>,
> +<0 24 IRQ_TYPE_LEVEL_HIGH>,
> +<0 25 IRQ_TYPE_LEVEL_HIGH>,
> +<0 26 IRQ_TYPE_LEVEL_HIGH>,
> +<0 27 IRQ_TYPE_LEVEL_HIGH>,
> +<0 28 IRQ_TYPE_LEVEL_HIGH>,
> +<0 29 IRQ_TYPE_LEVEL_HIGH>,
> +<0 30 IRQ_TYPE_LEVEL_HIGH>,
> +<0 31 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> gic: interrupt-controller@10481000 {
> @@ -82,31 +107,31 @@
> serial_0: serial@12C0 {
> compatible = "samsung,exynos4210-uart";
> reg = <0x12C0 0x100>;
> -   interrupts = <0 51 0>;
> +   interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> serial_1: serial@12C1 {
> compatible = "samsung,exynos4210-uart";
> reg = <0x12C1 0x100>;
> -   interrupts = <0 52 0>;
> +   interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> serial_2: serial@12C2 {
> compatible = "samsung,exynos4210-uart";
> reg = <0x12C2 0x100>;
> -   interrupts = <0 53 0>;

[PATCH 06/10] ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5

[Krzysztof Kozlowski]

Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and
generates an error:
genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68)

The GIC requires shared interrupts to be edge rising or level high.
Platform declares support for both.  Choose level high everywhere.

Reported-by: Marek Szyprowski 
Reported-by: Geert Uytterhoeven 
Reported-by: Alban Browaeys 
Cc: Marc Zyngier 
Signed-off-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/exynos5.dtsi | 60 ++
 1 file changed, 43 insertions(+), 17 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 8f06609879f5..d9b1607db5ad 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -13,6 +13,7 @@
  * published by the Free Software Foundation.
  */
 
+#include 
 #include "exynos-syscon-restart.dtsi"
 
 / {
@@ -53,14 +54,38 @@
interrupt-controller;
samsung,combiner-nr = <32>;
reg = <0x1044 0x1000>;
-   interrupts =<0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
-   <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
-   <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
-   <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
-   <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
-   <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
-   <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
-   <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
+   interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
+<0 1 IRQ_TYPE_LEVEL_HIGH>,
+<0 2 IRQ_TYPE_LEVEL_HIGH>,
+<0 3 IRQ_TYPE_LEVEL_HIGH>,
+<0 4 IRQ_TYPE_LEVEL_HIGH>,
+<0 5 IRQ_TYPE_LEVEL_HIGH>,
+<0 6 IRQ_TYPE_LEVEL_HIGH>,
+<0 7 IRQ_TYPE_LEVEL_HIGH>,
+<0 8 IRQ_TYPE_LEVEL_HIGH>,
+<0 9 IRQ_TYPE_LEVEL_HIGH>,
+<0 10 IRQ_TYPE_LEVEL_HIGH>,
+<0 11 IRQ_TYPE_LEVEL_HIGH>,
+<0 12 IRQ_TYPE_LEVEL_HIGH>,
+<0 13 IRQ_TYPE_LEVEL_HIGH>,
+<0 14 IRQ_TYPE_LEVEL_HIGH>,
+<0 15 IRQ_TYPE_LEVEL_HIGH>,
+<0 16 IRQ_TYPE_LEVEL_HIGH>,
+<0 17 IRQ_TYPE_LEVEL_HIGH>,
+<0 18 IRQ_TYPE_LEVEL_HIGH>,
+<0 19 IRQ_TYPE_LEVEL_HIGH>,
+<0 20 IRQ_TYPE_LEVEL_HIGH>,
+<0 21 IRQ_TYPE_LEVEL_HIGH>,
+<0 22 IRQ_TYPE_LEVEL_HIGH>,
+<0 23 IRQ_TYPE_LEVEL_HIGH>,
+<0 24 IRQ_TYPE_LEVEL_HIGH>,
+<0 25 IRQ_TYPE_LEVEL_HIGH>,
+<0 26 IRQ_TYPE_LEVEL_HIGH>,
+<0 27 IRQ_TYPE_LEVEL_HIGH>,
+<0 28 IRQ_TYPE_LEVEL_HIGH>,
+<0 29 IRQ_TYPE_LEVEL_HIGH>,
+<0 30 IRQ_TYPE_LEVEL_HIGH>,
+<0 31 IRQ_TYPE_LEVEL_HIGH>;
};
 
gic: interrupt-controller@10481000 {
@@ -82,31 +107,31 @@
serial_0: serial@12C0 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C0 0x100>;
-   interrupts = <0 51 0>;
+   interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
};
 
serial_1: serial@12C1 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C1 0x100>;
-   interrupts = <0 52 0>;
+   interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
};
 
serial_2: serial@12C2 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C2 0x100>;
-   interrupts = <0 53 0>;
+   interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>;
};
 
serial_3: serial@12C3 {
compatible = "samsung,exynos4210-uart";
reg = 

[PATCH 06/10] ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5

[Krzysztof Kozlowski]

Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and
generates an error:
genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68)

The GIC requires shared interrupts to be edge rising or level high.
Platform declares support for both.  Choose level high everywhere.

Reported-by: Marek Szyprowski 
Reported-by: Geert Uytterhoeven 
Reported-by: Alban Browaeys 
Cc: Marc Zyngier 
Signed-off-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/exynos5.dtsi | 60 ++
 1 file changed, 43 insertions(+), 17 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 8f06609879f5..d9b1607db5ad 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -13,6 +13,7 @@
  * published by the Free Software Foundation.
  */
 
+#include 
 #include "exynos-syscon-restart.dtsi"
 
 / {
@@ -53,14 +54,38 @@
interrupt-controller;
samsung,combiner-nr = <32>;
reg = <0x1044 0x1000>;
-   interrupts =<0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
-   <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
-   <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
-   <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
-   <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
-   <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
-   <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
-   <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
+   interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
+<0 1 IRQ_TYPE_LEVEL_HIGH>,
+<0 2 IRQ_TYPE_LEVEL_HIGH>,
+<0 3 IRQ_TYPE_LEVEL_HIGH>,
+<0 4 IRQ_TYPE_LEVEL_HIGH>,
+<0 5 IRQ_TYPE_LEVEL_HIGH>,
+<0 6 IRQ_TYPE_LEVEL_HIGH>,
+<0 7 IRQ_TYPE_LEVEL_HIGH>,
+<0 8 IRQ_TYPE_LEVEL_HIGH>,
+<0 9 IRQ_TYPE_LEVEL_HIGH>,
+<0 10 IRQ_TYPE_LEVEL_HIGH>,
+<0 11 IRQ_TYPE_LEVEL_HIGH>,
+<0 12 IRQ_TYPE_LEVEL_HIGH>,
+<0 13 IRQ_TYPE_LEVEL_HIGH>,
+<0 14 IRQ_TYPE_LEVEL_HIGH>,
+<0 15 IRQ_TYPE_LEVEL_HIGH>,
+<0 16 IRQ_TYPE_LEVEL_HIGH>,
+<0 17 IRQ_TYPE_LEVEL_HIGH>,
+<0 18 IRQ_TYPE_LEVEL_HIGH>,
+<0 19 IRQ_TYPE_LEVEL_HIGH>,
+<0 20 IRQ_TYPE_LEVEL_HIGH>,
+<0 21 IRQ_TYPE_LEVEL_HIGH>,
+<0 22 IRQ_TYPE_LEVEL_HIGH>,
+<0 23 IRQ_TYPE_LEVEL_HIGH>,
+<0 24 IRQ_TYPE_LEVEL_HIGH>,
+<0 25 IRQ_TYPE_LEVEL_HIGH>,
+<0 26 IRQ_TYPE_LEVEL_HIGH>,
+<0 27 IRQ_TYPE_LEVEL_HIGH>,
+<0 28 IRQ_TYPE_LEVEL_HIGH>,
+<0 29 IRQ_TYPE_LEVEL_HIGH>,
+<0 30 IRQ_TYPE_LEVEL_HIGH>,
+<0 31 IRQ_TYPE_LEVEL_HIGH>;
};
 
gic: interrupt-controller@10481000 {
@@ -82,31 +107,31 @@
serial_0: serial@12C0 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C0 0x100>;
-   interrupts = <0 51 0>;
+   interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
};
 
serial_1: serial@12C1 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C1 0x100>;
-   interrupts = <0 52 0>;
+   interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
};
 
serial_2: serial@12C2 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C2 0x100>;
-   interrupts = <0 53 0>;
+   interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>;
};
 
serial_3: serial@12C3 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C3 0x100>;
-   interrupts = <0 54 0>;
+   interrupts = <0 54