Re: [PATCH 1/7] ASoC: convert Microchip I2SMCC binding to yaml

2021-03-01 Thread Codrin.Ciubotariu
On 01.03.2021 15:59, Mark Brown wrote:
> On Tue, Feb 23, 2021 at 08:19:23PM +0200, Codrin Ciubotariu wrote:
>> This patch converts the Microchip I2SMCC bindings to DT schema format
>> using json-schema.
> 
> Please place any DT binding conversion patches at the end of patch
> serieses, there is a frequent backlog in reviews of those which can
> result in everything else getting held up.
> 

I didn't know that, will do so in v2. Thanks!


Re: [PATCH 1/7] ASoC: convert Microchip I2SMCC binding to yaml

2021-03-01 Thread Mark Brown
On Tue, Feb 23, 2021 at 08:19:23PM +0200, Codrin Ciubotariu wrote:
> This patch converts the Microchip I2SMCC bindings to DT schema format
> using json-schema.

Please place any DT binding conversion patches at the end of patch
serieses, there is a frequent backlog in reviews of those which can
result in everything else getting held up.


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[PATCH 1/7] ASoC: convert Microchip I2SMCC binding to yaml

2021-02-23 Thread Codrin Ciubotariu
This patch converts the Microchip I2SMCC bindings to DT schema format
using json-schema.

Signed-off-by: Codrin Ciubotariu 
---
 .../bindings/sound/mchp,i2s-mcc.yaml  | 86 +++
 .../bindings/sound/mchp-i2s-mcc.txt   | 43 --
 2 files changed, 86 insertions(+), 43 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
 delete mode 100644 Documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt

diff --git a/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml 
b/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
new file mode 100644
index ..79445f5f2804
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml
@@ -0,0 +1,86 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/mchp,i2s-mcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip I2S Multi-Channel Controller
+
+maintainers:
+  - Codrin Ciubotariu 
+
+description:
+  The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
+  supports a Time Division Multiplexed (TDM) interface with external
+  multi-channel audio codecs. It consists of a receiver, a transmitter and a
+  common clock generator that can be enabled separately to provide Adapter,
+  Client or Controller modes with receiver and/or transmitter active.
+
+properties:
+  "#sound-dai-cells":
+const: 0
+
+  compatible:
+const: microchip,sam9x60-i2smcc
+
+  reg:
+maxItems: 1
+
+  interrupts:
+maxItems: 1
+
+  clocks:
+items:
+  - description: Peripheral Bus Clock
+  - description: Generic Clock (Optional). Should be set mostly when Master
+  Mode is required.
+minItems: 1
+
+  clock-names:
+items:
+  - const: pclk
+  - const: gclk
+minItems: 1
+
+  dmas:
+items:
+  - description: TX DMA Channel
+  - description: RX DMA Channel
+
+  dma-names:
+items:
+  - const: tx
+  - const: rx
+
+required:
+  - "#sound-dai-cells"
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - dmas
+  - dma-names
+
+additionalProperties: false
+
+examples:
+  - |
+#include 
+#include 
+
+i2s@f001c000 {
+#sound-dai-cells = <0>;
+compatible = "microchip,sam9x60-i2smcc";
+reg = <0xf001c000 0x100>;
+interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
+dmas = < (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+   AT91_XDMAC_DT_PERID(36))>,
+   < (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+   AT91_XDMAC_DT_PERID(37))>;
+dma-names = "tx", "rx";
+clocks = <_clk>, <_gclk>;
+clock-names = "pclk", "gclk";
+pinctrl-names = "default";
+pinctrl-0 = <_i2s_default>;
+};
diff --git a/Documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt 
b/Documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt
deleted file mode 100644
index 91ec83a6faed..
--- a/Documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt
+++ /dev/null
@@ -1,43 +0,0 @@
-* Microchip I2S Multi-Channel Controller
-
-Required properties:
-- compatible: Should be "microchip,sam9x60-i2smcc".
-- reg:Should be the physical base address of the controller and the
-  length of memory mapped region.
-- interrupts: Should contain the interrupt for the controller.
-- dmas:   Should be one per channel name listed in the dma-names 
property,
-  as described in atmel-dma.txt and dma.txt files.
-- dma-names:  Identifier string for each DMA request line in the dmas 
property.
- Two dmas have to be defined, "tx" and "rx".
-- clocks: Must contain an entry for each entry in clock-names.
-  Please refer to clock-bindings.txt.
-- clock-names:Should be one of each entry matching the clocks phandles 
list:
-  - "pclk" (peripheral clock) Required.
-  - "gclk" (generated clock) Optional (1).
-
-Optional properties:
-- pinctrl-0:  Should specify pin control groups used for this controller.
-- princtrl-names: Should contain only one value - "default".
-
-
-(1) : Only the peripheral clock is required. The generated clock is optional
-  and should be set mostly when Master Mode is required.
-
-Example:
-
-   i2s@f001c000 {
-   compatible = "microchip,sam9x60-i2smcc";
-   reg = <0xf001c000 0x100>;
-   interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
-   dmas = <
-   (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
-AT91_XDMAC_DT_PERID(36))>,
-  <
-   (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
-AT91_XDMAC_DT_PERID(37))>;
-   dma-names = "tx", "rx";
-   clocks = <_clk>, <_gclk>;
-