[PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-11-20 Thread Joerg Roedel 
This call-back points to the right function for initializing
the msi_msg structure. The old code for msi_msg generation
was split up into the irq-remapped and the default case.

The irq-remapped case just calls into the specific Intel or
AMD implementation when the device is behind an IOMMU.
Otherwise the default function is called.

Signed-off-by: Joerg Roedel 
Acked-by: Sebastian Andrzej Siewior 
---
 arch/x86/include/asm/io_apic.h  |4 +++
 arch/x86/include/asm/x86_init.h |4 +++
 arch/x86/kernel/apic/io_apic.c  |   59 ---
 arch/x86/kernel/x86_init.c  |1 +
 drivers/iommu/irq_remapping.c   |9 --
 5 files changed, 46 insertions(+), 31 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 36fb5ab..1838e88 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -158,6 +158,9 @@ extern int native_setup_ioapic_entry(int, struct 
IO_APIC_route_entry *,
 struct io_apic_irq_attr *);
 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
 
+extern void native_compose_msi_msg(struct pci_dev *pdev,
+  unsigned int irq, unsigned int dest,
+  struct msi_msg *msg, u8 hpet_id);
 int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct 
io_apic_irq_attr *attr);
 
 extern int save_ioapic_entries(void);
@@ -242,6 +245,7 @@ static inline void disable_ioapic_support(void) { }
 #define native_io_apic_print_entries   NULL
 #define native_ioapic_set_affinity NULL
 #define native_setup_ioapic_entry  NULL
+#define native_compose_msi_msg NULL
 #endif
 
 #endif /* _ASM_X86_IO_APIC_H */
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 17da29c..c9f87be 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -181,9 +181,13 @@ struct x86_platform_ops {
 };
 
 struct pci_dev;
+struct msi_msg;
 
 struct x86_msi_ops {
int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
+   void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq,
+   unsigned int dest, struct msi_msg *msg,
+  u8 hpet_id);
void (*teardown_msi_irq)(unsigned int irq);
void (*teardown_msi_irqs)(struct pci_dev *dev);
void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 391c0b9..d146a04 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -3002,37 +3002,16 @@ void destroy_irq(unsigned int irq)
 /*
  * MSI message composition
  */
-#ifdef CONFIG_PCI_MSI
-static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
-  struct msi_msg *msg, u8 hpet_id)
+void native_compose_msi_msg(struct pci_dev *pdev,
+   unsigned int irq, unsigned int dest,
+   struct msi_msg *msg, u8 hpet_id)
 {
-   struct irq_cfg *cfg;
-   int err;
-   unsigned dest;
-
-   if (disable_apic)
-   return -ENXIO;
-
-   cfg = irq_cfg(irq);
-   err = assign_irq_vector(irq, cfg, apic->target_cpus());
-   if (err)
-   return err;
-
-   err = apic->cpu_mask_to_apicid_and(cfg->domain,
-  apic->target_cpus(), );
-   if (err)
-   return err;
+   struct irq_cfg *cfg = irq_cfg(irq);
 
-   if (irq_remapped(cfg)) {
-   compose_remapped_msi_msg(pdev, irq, dest, msg, hpet_id);
-   return err;
-   }
+   msg->address_hi = MSI_ADDR_BASE_HI;
 
if (x2apic_enabled())
-   msg->address_hi = MSI_ADDR_BASE_HI |
- MSI_ADDR_EXT_DEST_ID(dest);
-   else
-   msg->address_hi = MSI_ADDR_BASE_HI;
+   msg->address_hi |= MSI_ADDR_EXT_DEST_ID(dest);
 
msg->address_lo =
MSI_ADDR_BASE_LO |
@@ -3051,8 +3030,32 @@ static int msi_compose_msg(struct pci_dev *pdev, 
unsigned int irq,
MSI_DATA_DELIVERY_FIXED:
MSI_DATA_DELIVERY_LOWPRI) |
MSI_DATA_VECTOR(cfg->vector);
+}
 
-   return err;
+#ifdef CONFIG_PCI_MSI
+static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
+  struct msi_msg *msg, u8 hpet_id)
+{
+   struct irq_cfg *cfg;
+   int err;
+   unsigned dest;
+
+   if (disable_apic)
+   return -ENXIO;
+
+   cfg = irq_cfg(irq);
+   err = assign_irq_vector(irq, cfg, apic->target_cpus());
+   if (err)
+   return err;
+
+   err = apic->cpu_mask_to_apicid_and(cfg->domain,
+  apic->target_cpus(), );
+   if (err)
+   return err;
+
+   x86_msi.compose_msi_msg(pdev, irq,

[PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-11-20 Thread Joerg Roedel 
This call-back points to the right function for initializing
the msi_msg structure. The old code for msi_msg generation
was split up into the irq-remapped and the default case.

The irq-remapped case just calls into the specific Intel or
AMD implementation when the device is behind an IOMMU.
Otherwise the default function is called.

Signed-off-by: Joerg Roedel j...@8bytes.org
Acked-by: Sebastian Andrzej Siewior sebast...@breakpoint.cc
---
 arch/x86/include/asm/io_apic.h  |4 +++
 arch/x86/include/asm/x86_init.h |4 +++
 arch/x86/kernel/apic/io_apic.c  |   59 ---
 arch/x86/kernel/x86_init.c  |1 +
 drivers/iommu/irq_remapping.c   |9 --
 5 files changed, 46 insertions(+), 31 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 36fb5ab..1838e88 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -158,6 +158,9 @@ extern int native_setup_ioapic_entry(int, struct 
IO_APIC_route_entry *,
 struct io_apic_irq_attr *);
 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
 
+extern void native_compose_msi_msg(struct pci_dev *pdev,
+  unsigned int irq, unsigned int dest,
+  struct msi_msg *msg, u8 hpet_id);
 int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct 
io_apic_irq_attr *attr);
 
 extern int save_ioapic_entries(void);
@@ -242,6 +245,7 @@ static inline void disable_ioapic_support(void) { }
 #define native_io_apic_print_entries   NULL
 #define native_ioapic_set_affinity NULL
 #define native_setup_ioapic_entry  NULL
+#define native_compose_msi_msg NULL
 #endif
 
 #endif /* _ASM_X86_IO_APIC_H */
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 17da29c..c9f87be 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -181,9 +181,13 @@ struct x86_platform_ops {
 };
 
 struct pci_dev;
+struct msi_msg;
 
 struct x86_msi_ops {
int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
+   void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq,
+   unsigned int dest, struct msi_msg *msg,
+  u8 hpet_id);
void (*teardown_msi_irq)(unsigned int irq);
void (*teardown_msi_irqs)(struct pci_dev *dev);
void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 391c0b9..d146a04 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -3002,37 +3002,16 @@ void destroy_irq(unsigned int irq)
 /*
  * MSI message composition
  */
-#ifdef CONFIG_PCI_MSI
-static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
-  struct msi_msg *msg, u8 hpet_id)
+void native_compose_msi_msg(struct pci_dev *pdev,
+   unsigned int irq, unsigned int dest,
+   struct msi_msg *msg, u8 hpet_id)
 {
-   struct irq_cfg *cfg;
-   int err;
-   unsigned dest;
-
-   if (disable_apic)
-   return -ENXIO;
-
-   cfg = irq_cfg(irq);
-   err = assign_irq_vector(irq, cfg, apic-target_cpus());
-   if (err)
-   return err;
-
-   err = apic-cpu_mask_to_apicid_and(cfg-domain,
-  apic-target_cpus(), dest);
-   if (err)
-   return err;
+   struct irq_cfg *cfg = irq_cfg(irq);
 
-   if (irq_remapped(cfg)) {
-   compose_remapped_msi_msg(pdev, irq, dest, msg, hpet_id);
-   return err;
-   }
+   msg-address_hi = MSI_ADDR_BASE_HI;
 
if (x2apic_enabled())
-   msg-address_hi = MSI_ADDR_BASE_HI |
- MSI_ADDR_EXT_DEST_ID(dest);
-   else
-   msg-address_hi = MSI_ADDR_BASE_HI;
+   msg-address_hi |= MSI_ADDR_EXT_DEST_ID(dest);
 
msg-address_lo =
MSI_ADDR_BASE_LO |
@@ -3051,8 +3030,32 @@ static int msi_compose_msg(struct pci_dev *pdev, 
unsigned int irq,
MSI_DATA_DELIVERY_FIXED:
MSI_DATA_DELIVERY_LOWPRI) |
MSI_DATA_VECTOR(cfg-vector);
+}
 
-   return err;
+#ifdef CONFIG_PCI_MSI
+static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
+  struct msi_msg *msg, u8 hpet_id)
+{
+   struct irq_cfg *cfg;
+   int err;
+   unsigned dest;
+
+   if (disable_apic)
+   return -ENXIO;
+
+   cfg = irq_cfg(irq);
+   err = assign_irq_vector(irq, cfg, apic-target_cpus());
+   if (err)
+   return err;
+
+   err = apic-cpu_mask_to_apicid_and(cfg-domain,
+  apic-target_cpus(), dest);
+   if (err)
+   return err;
+
+

[PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-09-26 Thread Joerg Roedel 
This call-back points to the right function for initializing
the msi_msg structure. The old code for msi_msg generation
was split up into the irq-remapped and the default case.

The irq-remapped case just calls into the specific Intel or
AMD implementation when the device is behind an IOMMU.
Otherwise the default function is called.

Signed-off-by: Joerg Roedel 
---
 arch/x86/include/asm/io_apic.h  |4 +++
 arch/x86/include/asm/x86_init.h |4 +++
 arch/x86/kernel/apic/io_apic.c  |   59 ---
 arch/x86/kernel/x86_init.c  |1 +
 drivers/iommu/irq_remapping.c   |9 --
 5 files changed, 46 insertions(+), 31 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 36fb5ab..1838e88 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -158,6 +158,9 @@ extern int native_setup_ioapic_entry(int, struct 
IO_APIC_route_entry *,
 struct io_apic_irq_attr *);
 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
 
+extern void native_compose_msi_msg(struct pci_dev *pdev,
+  unsigned int irq, unsigned int dest,
+  struct msi_msg *msg, u8 hpet_id);
 int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct 
io_apic_irq_attr *attr);
 
 extern int save_ioapic_entries(void);
@@ -242,6 +245,7 @@ static inline void disable_ioapic_support(void) { }
 #define native_io_apic_print_entries   NULL
 #define native_ioapic_set_affinity NULL
 #define native_setup_ioapic_entry  NULL
+#define native_compose_msi_msg NULL
 #endif
 
 #endif /* _ASM_X86_IO_APIC_H */
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index bc13022..3ef598e 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -180,9 +180,13 @@ struct x86_platform_ops {
 };
 
 struct pci_dev;
+struct msi_msg;
 
 struct x86_msi_ops {
int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
+   void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq,
+   unsigned int dest, struct msi_msg *msg,
+  u8 hpet_id);
void (*teardown_msi_irq)(unsigned int irq);
void (*teardown_msi_irqs)(struct pci_dev *dev);
void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 88c4fff..c545a1d 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -2999,37 +2999,16 @@ void destroy_irq(unsigned int irq)
 /*
  * MSI message composition
  */
-#ifdef CONFIG_PCI_MSI
-static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
-  struct msi_msg *msg, u8 hpet_id)
+void native_compose_msi_msg(struct pci_dev *pdev,
+   unsigned int irq, unsigned int dest,
+   struct msi_msg *msg, u8 hpet_id)
 {
-   struct irq_cfg *cfg;
-   int err;
-   unsigned dest;
-
-   if (disable_apic)
-   return -ENXIO;
-
-   cfg = irq_cfg(irq);
-   err = assign_irq_vector(irq, cfg, apic->target_cpus());
-   if (err)
-   return err;
-
-   err = apic->cpu_mask_to_apicid_and(cfg->domain,
-  apic->target_cpus(), );
-   if (err)
-   return err;
+   struct irq_cfg *cfg = irq_cfg(irq);
 
-   if (irq_remapped(cfg)) {
-   compose_remapped_msi_msg(pdev, irq, dest, msg, hpet_id);
-   return err;
-   }
+   msg->address_hi = MSI_ADDR_BASE_HI;
 
if (x2apic_enabled())
-   msg->address_hi = MSI_ADDR_BASE_HI |
- MSI_ADDR_EXT_DEST_ID(dest);
-   else
-   msg->address_hi = MSI_ADDR_BASE_HI;
+   msg->address_hi |= MSI_ADDR_EXT_DEST_ID(dest);
 
msg->address_lo =
MSI_ADDR_BASE_LO |
@@ -3048,8 +3027,32 @@ static int msi_compose_msg(struct pci_dev *pdev, 
unsigned int irq,
MSI_DATA_DELIVERY_FIXED:
MSI_DATA_DELIVERY_LOWPRI) |
MSI_DATA_VECTOR(cfg->vector);
+}
 
-   return err;
+#ifdef CONFIG_PCI_MSI
+static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
+  struct msi_msg *msg, u8 hpet_id)
+{
+   struct irq_cfg *cfg;
+   int err;
+   unsigned dest;
+
+   if (disable_apic)
+   return -ENXIO;
+
+   cfg = irq_cfg(irq);
+   err = assign_irq_vector(irq, cfg, apic->target_cpus());
+   if (err)
+   return err;
+
+   err = apic->cpu_mask_to_apicid_and(cfg->domain,
+  apic->target_cpus(), );
+   if (err)
+   return err;
+
+   x86_msi.compose_msi_msg(pdev, irq, dest, msg, hpet_id);
+
+   return

[PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-09-26 Thread Joerg Roedel 
This call-back points to the right function for initializing
the msi_msg structure. The old code for msi_msg generation
was split up into the irq-remapped and the default case.

The irq-remapped case just calls into the specific Intel or
AMD implementation when the device is behind an IOMMU.
Otherwise the default function is called.

Signed-off-by: Joerg Roedel joerg.roe...@amd.com
---
 arch/x86/include/asm/io_apic.h  |4 +++
 arch/x86/include/asm/x86_init.h |4 +++
 arch/x86/kernel/apic/io_apic.c  |   59 ---
 arch/x86/kernel/x86_init.c  |1 +
 drivers/iommu/irq_remapping.c   |9 --
 5 files changed, 46 insertions(+), 31 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 36fb5ab..1838e88 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -158,6 +158,9 @@ extern int native_setup_ioapic_entry(int, struct 
IO_APIC_route_entry *,
 struct io_apic_irq_attr *);
 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
 
+extern void native_compose_msi_msg(struct pci_dev *pdev,
+  unsigned int irq, unsigned int dest,
+  struct msi_msg *msg, u8 hpet_id);
 int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct 
io_apic_irq_attr *attr);
 
 extern int save_ioapic_entries(void);
@@ -242,6 +245,7 @@ static inline void disable_ioapic_support(void) { }
 #define native_io_apic_print_entries   NULL
 #define native_ioapic_set_affinity NULL
 #define native_setup_ioapic_entry  NULL
+#define native_compose_msi_msg NULL
 #endif
 
 #endif /* _ASM_X86_IO_APIC_H */
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index bc13022..3ef598e 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -180,9 +180,13 @@ struct x86_platform_ops {
 };
 
 struct pci_dev;
+struct msi_msg;
 
 struct x86_msi_ops {
int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
+   void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq,
+   unsigned int dest, struct msi_msg *msg,
+  u8 hpet_id);
void (*teardown_msi_irq)(unsigned int irq);
void (*teardown_msi_irqs)(struct pci_dev *dev);
void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 88c4fff..c545a1d 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -2999,37 +2999,16 @@ void destroy_irq(unsigned int irq)
 /*
  * MSI message composition
  */
-#ifdef CONFIG_PCI_MSI
-static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
-  struct msi_msg *msg, u8 hpet_id)
+void native_compose_msi_msg(struct pci_dev *pdev,
+   unsigned int irq, unsigned int dest,
+   struct msi_msg *msg, u8 hpet_id)
 {
-   struct irq_cfg *cfg;
-   int err;
-   unsigned dest;
-
-   if (disable_apic)
-   return -ENXIO;
-
-   cfg = irq_cfg(irq);
-   err = assign_irq_vector(irq, cfg, apic-target_cpus());
-   if (err)
-   return err;
-
-   err = apic-cpu_mask_to_apicid_and(cfg-domain,
-  apic-target_cpus(), dest);
-   if (err)
-   return err;
+   struct irq_cfg *cfg = irq_cfg(irq);
 
-   if (irq_remapped(cfg)) {
-   compose_remapped_msi_msg(pdev, irq, dest, msg, hpet_id);
-   return err;
-   }
+   msg-address_hi = MSI_ADDR_BASE_HI;
 
if (x2apic_enabled())
-   msg-address_hi = MSI_ADDR_BASE_HI |
- MSI_ADDR_EXT_DEST_ID(dest);
-   else
-   msg-address_hi = MSI_ADDR_BASE_HI;
+   msg-address_hi |= MSI_ADDR_EXT_DEST_ID(dest);
 
msg-address_lo =
MSI_ADDR_BASE_LO |
@@ -3048,8 +3027,32 @@ static int msi_compose_msg(struct pci_dev *pdev, 
unsigned int irq,
MSI_DATA_DELIVERY_FIXED:
MSI_DATA_DELIVERY_LOWPRI) |
MSI_DATA_VECTOR(cfg-vector);
+}
 
-   return err;
+#ifdef CONFIG_PCI_MSI
+static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
+  struct msi_msg *msg, u8 hpet_id)
+{
+   struct irq_cfg *cfg;
+   int err;
+   unsigned dest;
+
+   if (disable_apic)
+   return -ENXIO;
+
+   cfg = irq_cfg(irq);
+   err = assign_irq_vector(irq, cfg, apic-target_cpus());
+   if (err)
+   return err;
+
+   err = apic-cpu_mask_to_apicid_and(cfg-domain,
+  apic-target_cpus(), dest);
+   if (err)
+   return err;
+
+   x86_msi.compose_msi_msg(pdev, irq, dest, msg, hpet_id);
+
+

Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-09-25 Thread Joerg Roedel 
On Sun, Aug 26, 2012 at 08:41:40PM +0200, Sebastian Andrzej Siewior wrote:
> On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
> > This call-back points to the right function for initializing
> > the msi_msg structure.
> 
> So you pull out the compose_remapped_msi_msg() out of msi_compose_msg() and
> put this in a callback. Such information is good since you don't see this in
> diff and even --patience does not help here.

Added that to the commit message.

> 
> > --- a/drivers/iommu/irq_remapping.c
> > +++ b/drivers/iommu/irq_remapping.c
> > @@ -242,10 +243,12 @@ void compose_remapped_msi_msg(struct pci_dev *pdev,
> >   unsigned int irq, unsigned int dest,
> >   struct msi_msg *msg, u8 hpet_id)
> >  {
> > -   if (!remap_ops || !remap_ops->compose_msi_msg)
> > -   return;
> > +   struct irq_cfg *cfg = irq_get_chip_data(irq);
> >  
> > -   remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
> > +   if (cfg && !irq_remapped(cfg))
> > +   native_compose_msi_msg(pdev, irq, dest, msg, hpet_id);
> > +   else if (remap_ops && remap_ops->compose_msi_msg)
> > +   remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
> 
> cfg _has_ to be valid here and if it is not than you shouldn't assume that
> this irq is remapped.
> Also remap_ops has to be set here. And ->compose_msi_msg() should be set
> here as well. Would it make sense if it is not set?

I removed the check for cfg, but I am still conservative on calling
function pointers without checking them first.


Joerg

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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-09-25 Thread Joerg Roedel 
On Sun, Aug 26, 2012 at 08:41:40PM +0200, Sebastian Andrzej Siewior wrote:
 On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
  This call-back points to the right function for initializing
  the msi_msg structure.
 
 So you pull out the compose_remapped_msi_msg() out of msi_compose_msg() and
 put this in a callback. Such information is good since you don't see this in
 diff and even --patience does not help here.

Added that to the commit message.

 
  --- a/drivers/iommu/irq_remapping.c
  +++ b/drivers/iommu/irq_remapping.c
  @@ -242,10 +243,12 @@ void compose_remapped_msi_msg(struct pci_dev *pdev,
unsigned int irq, unsigned int dest,
struct msi_msg *msg, u8 hpet_id)
   {
  -   if (!remap_ops || !remap_ops-compose_msi_msg)
  -   return;
  +   struct irq_cfg *cfg = irq_get_chip_data(irq);
   
  -   remap_ops-compose_msi_msg(pdev, irq, dest, msg, hpet_id);
  +   if (cfg  !irq_remapped(cfg))
  +   native_compose_msi_msg(pdev, irq, dest, msg, hpet_id);
  +   else if (remap_ops  remap_ops-compose_msi_msg)
  +   remap_ops-compose_msi_msg(pdev, irq, dest, msg, hpet_id);
 
 cfg _has_ to be valid here and if it is not than you shouldn't assume that
 this irq is remapped.
 Also remap_ops has to be set here. And -compose_msi_msg() should be set
 here as well. Would it make sense if it is not set?

I removed the check for cfg, but I am still conservative on calling
function pointers without checking them first.


Joerg

-- 
AMD Operating System Research Center

Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach
General Managers: Alberto Bozzo
Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632

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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-26 Thread Sebastian Andrzej Siewior 
On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
> This call-back points to the right function for initializing
> the msi_msg structure.

So you pull out the compose_remapped_msi_msg() out of msi_compose_msg() and
put this in a callback. Such information is good since you don't see this in
diff and even --patience does not help here.

> --- a/drivers/iommu/irq_remapping.c
> +++ b/drivers/iommu/irq_remapping.c
> @@ -242,10 +243,12 @@ void compose_remapped_msi_msg(struct pci_dev *pdev,
> unsigned int irq, unsigned int dest,
> struct msi_msg *msg, u8 hpet_id)
>  {
> - if (!remap_ops || !remap_ops->compose_msi_msg)
> - return;
> + struct irq_cfg *cfg = irq_get_chip_data(irq);
>  
> - remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
> + if (cfg && !irq_remapped(cfg))
> + native_compose_msi_msg(pdev, irq, dest, msg, hpet_id);
> + else if (remap_ops && remap_ops->compose_msi_msg)
> + remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);

cfg _has_ to be valid here and if it is not than you shouldn't assume that
this irq is remapped.
Also remap_ops has to be set here. And ->compose_msi_msg() should be set
here as well. Would it make sense if it is not set?

>  }
>  
>  static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)

Sebastian
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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-26 Thread Sebastian Andrzej Siewior 
On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
 This call-back points to the right function for initializing
 the msi_msg structure.

So you pull out the compose_remapped_msi_msg() out of msi_compose_msg() and
put this in a callback. Such information is good since you don't see this in
diff and even --patience does not help here.

 --- a/drivers/iommu/irq_remapping.c
 +++ b/drivers/iommu/irq_remapping.c
 @@ -242,10 +243,12 @@ void compose_remapped_msi_msg(struct pci_dev *pdev,
 unsigned int irq, unsigned int dest,
 struct msi_msg *msg, u8 hpet_id)
  {
 - if (!remap_ops || !remap_ops-compose_msi_msg)
 - return;
 + struct irq_cfg *cfg = irq_get_chip_data(irq);
  
 - remap_ops-compose_msi_msg(pdev, irq, dest, msg, hpet_id);
 + if (cfg  !irq_remapped(cfg))
 + native_compose_msi_msg(pdev, irq, dest, msg, hpet_id);
 + else if (remap_ops  remap_ops-compose_msi_msg)
 + remap_ops-compose_msi_msg(pdev, irq, dest, msg, hpet_id);

cfg _has_ to be valid here and if it is not than you shouldn't assume that
this irq is remapped.
Also remap_ops has to be set here. And -compose_msi_msg() should be set
here as well. Would it make sense if it is not set?

  }
  
  static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)

Sebastian
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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-22 Thread Joerg Roedel 
On Tue, Aug 21, 2012 at 10:42:57AM -0400, Konrad Rzeszutek Wilk wrote:
> On Tue, Aug 21, 2012 at 10:40:07AM +0200, Joerg Roedel wrote:
> > On Mon, Aug 20, 2012 at 10:08:44AM -0400, Konrad Rzeszutek Wilk wrote:
> > > On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
> > > > This call-back points to the right function for initializing
> > > > the msi_msg structure.
> > > 
> > > What is the 'hpet_id' purpose in this?
> > 
> > The VT-d implementation uses it. This function is used to create the MSI
> > message for PCI devices and the HPET. When it is called for the HPET the
> > pdev parameter is NULL and hpet_id is valid.
> 
> Perhaps then a more generic term? 'void *platform_priv' ?

Okay, I looked into the code a bit more and the best solution is to
remove the pdev and hpet_id parameters completly from the
msi_compose_msg path. The only user of these parameters is the Intel
interrupt remapping code which can also set the source-ids in the
irq-alloc path. But this is a larger effort which is best done in a
seperate patch-set.


Joerg


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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-22 Thread Joerg Roedel 
On Tue, Aug 21, 2012 at 10:42:57AM -0400, Konrad Rzeszutek Wilk wrote:
 On Tue, Aug 21, 2012 at 10:40:07AM +0200, Joerg Roedel wrote:
  On Mon, Aug 20, 2012 at 10:08:44AM -0400, Konrad Rzeszutek Wilk wrote:
   On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
This call-back points to the right function for initializing
the msi_msg structure.
   
   What is the 'hpet_id' purpose in this?
  
  The VT-d implementation uses it. This function is used to create the MSI
  message for PCI devices and the HPET. When it is called for the HPET the
  pdev parameter is NULL and hpet_id is valid.
 
 Perhaps then a more generic term? 'void *platform_priv' ?

Okay, I looked into the code a bit more and the best solution is to
remove the pdev and hpet_id parameters completly from the
msi_compose_msg path. The only user of these parameters is the Intel
interrupt remapping code which can also set the source-ids in the
irq-alloc path. But this is a larger effort which is best done in a
seperate patch-set.


Joerg


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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-21 Thread Joerg Roedel 
On Tue, Aug 21, 2012 at 10:42:57AM -0400, Konrad Rzeszutek Wilk wrote:
> On Tue, Aug 21, 2012 at 10:40:07AM +0200, Joerg Roedel wrote:
> > On Mon, Aug 20, 2012 at 10:08:44AM -0400, Konrad Rzeszutek Wilk wrote:
> > > On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
> > > > This call-back points to the right function for initializing
> > > > the msi_msg structure.
> > > 
> > > What is the 'hpet_id' purpose in this?
> > 
> > The VT-d implementation uses it. This function is used to create the MSI
> > message for PCI devices and the HPET. When it is called for the HPET the
> > pdev parameter is NULL and hpet_id is valid.
> 
> Perhaps then a more generic term? 'void *platform_priv' ?

Well, the best approach is probably to remove both, the pdev and the
hpet parameter and replace it with an req_id parameter that is passed
down instead. IOMMU code needs to expose the hpet request-ids then with
another call-back. But that is cleaner than the current compose_msi_msg
call-back.


Joerg

-- 
AMD Operating System Research Center

Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach
General Managers: Alberto Bozzo
Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632

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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-21 Thread Joerg Roedel 
On Tue, Aug 21, 2012 at 10:42:57AM -0400, Konrad Rzeszutek Wilk wrote:
> On Tue, Aug 21, 2012 at 10:40:07AM +0200, Joerg Roedel wrote:
> > The VT-d implementation uses it. This function is used to create the MSI
> > message for PCI devices and the HPET. When it is called for the HPET the
> > pdev parameter is NULL and hpet_id is valid.
> 
> Perhaps then a more generic term? 'void *platform_priv' ?

Doesn't work this way here. The Intel code detects on pdev==NULL that it
needs to use hpet_id. What could work is to split the code-paths between
pci_dev msi composition and the one for hpet.
But that approach has the downside of code duplication to some degree.


Regards,

Joerg

-- 
AMD Operating System Research Center

Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach
General Managers: Alberto Bozzo
Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632

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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-21 Thread Konrad Rzeszutek Wilk 
On Tue, Aug 21, 2012 at 10:40:07AM +0200, Joerg Roedel wrote:
> On Mon, Aug 20, 2012 at 10:08:44AM -0400, Konrad Rzeszutek Wilk wrote:
> > On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
> > > This call-back points to the right function for initializing
> > > the msi_msg structure.
> > 
> > What is the 'hpet_id' purpose in this?
> 
> The VT-d implementation uses it. This function is used to create the MSI
> message for PCI devices and the HPET. When it is called for the HPET the
> pdev parameter is NULL and hpet_id is valid.

Perhaps then a more generic term? 'void *platform_priv' ?
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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-21 Thread Joerg Roedel 
On Mon, Aug 20, 2012 at 10:08:44AM -0400, Konrad Rzeszutek Wilk wrote:
> On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
> > This call-back points to the right function for initializing
> > the msi_msg structure.
> 
> What is the 'hpet_id' purpose in this?

The VT-d implementation uses it. This function is used to create the MSI
message for PCI devices and the HPET. When it is called for the HPET the
pdev parameter is NULL and hpet_id is valid.


Joerg

-- 
AMD Operating System Research Center

Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach
General Managers: Alberto Bozzo
Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632

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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-21 Thread Joerg Roedel 
On Mon, Aug 20, 2012 at 10:08:44AM -0400, Konrad Rzeszutek Wilk wrote:
 On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
  This call-back points to the right function for initializing
  the msi_msg structure.
 
 What is the 'hpet_id' purpose in this?

The VT-d implementation uses it. This function is used to create the MSI
message for PCI devices and the HPET. When it is called for the HPET the
pdev parameter is NULL and hpet_id is valid.


Joerg

-- 
AMD Operating System Research Center

Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach
General Managers: Alberto Bozzo
Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632

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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-21 Thread Konrad Rzeszutek Wilk 
On Tue, Aug 21, 2012 at 10:40:07AM +0200, Joerg Roedel wrote:
 On Mon, Aug 20, 2012 at 10:08:44AM -0400, Konrad Rzeszutek Wilk wrote:
  On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
   This call-back points to the right function for initializing
   the msi_msg structure.
  
  What is the 'hpet_id' purpose in this?
 
 The VT-d implementation uses it. This function is used to create the MSI
 message for PCI devices and the HPET. When it is called for the HPET the
 pdev parameter is NULL and hpet_id is valid.

Perhaps then a more generic term? 'void *platform_priv' ?
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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-21 Thread Joerg Roedel 
On Tue, Aug 21, 2012 at 10:42:57AM -0400, Konrad Rzeszutek Wilk wrote:
 On Tue, Aug 21, 2012 at 10:40:07AM +0200, Joerg Roedel wrote:
  The VT-d implementation uses it. This function is used to create the MSI
  message for PCI devices and the HPET. When it is called for the HPET the
  pdev parameter is NULL and hpet_id is valid.
 
 Perhaps then a more generic term? 'void *platform_priv' ?

Doesn't work this way here. The Intel code detects on pdev==NULL that it
needs to use hpet_id. What could work is to split the code-paths between
pci_dev msi composition and the one for hpet.
But that approach has the downside of code duplication to some degree.


Regards,

Joerg

-- 
AMD Operating System Research Center

Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach
General Managers: Alberto Bozzo
Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632

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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-21 Thread Joerg Roedel 
On Tue, Aug 21, 2012 at 10:42:57AM -0400, Konrad Rzeszutek Wilk wrote:
 On Tue, Aug 21, 2012 at 10:40:07AM +0200, Joerg Roedel wrote:
  On Mon, Aug 20, 2012 at 10:08:44AM -0400, Konrad Rzeszutek Wilk wrote:
   On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
This call-back points to the right function for initializing
the msi_msg structure.
   
   What is the 'hpet_id' purpose in this?
  
  The VT-d implementation uses it. This function is used to create the MSI
  message for PCI devices and the HPET. When it is called for the HPET the
  pdev parameter is NULL and hpet_id is valid.
 
 Perhaps then a more generic term? 'void *platform_priv' ?

Well, the best approach is probably to remove both, the pdev and the
hpet parameter and replace it with an req_id parameter that is passed
down instead. IOMMU code needs to expose the hpet request-ids then with
another call-back. But that is cleaner than the current compose_msi_msg
call-back.


Joerg

-- 
AMD Operating System Research Center

Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach
General Managers: Alberto Bozzo
Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632

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Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-20 Thread Konrad Rzeszutek Wilk 
On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
> This call-back points to the right function for initializing
> the msi_msg structure.

What is the 'hpet_id' purpose in this?

> 
> Signed-off-by: Joerg Roedel 
> ---
>  arch/x86/include/asm/io_apic.h  |4 +++
>  arch/x86/include/asm/x86_init.h |4 +++
>  arch/x86/kernel/apic/io_apic.c  |   59 
> ---
>  arch/x86/kernel/x86_init.c  |1 +
>  drivers/iommu/irq_remapping.c   |9 --
>  5 files changed, 46 insertions(+), 31 deletions(-)
> 
> diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
> index 0db4429..59a3f4e 100644
> --- a/arch/x86/include/asm/io_apic.h
> +++ b/arch/x86/include/asm/io_apic.h
> @@ -160,6 +160,9 @@ extern void __init native_setup_timer_pin(unsigned int 
> ioapic_idx,
> unsigned int pin, int vector);
>  extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
>  
> +extern void native_compose_msi_msg(struct pci_dev *pdev,
> +unsigned int irq, unsigned int dest,
> +struct msi_msg *msg, u8 hpet_id);
>  int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct 
> io_apic_irq_attr *attr);
>  
>  extern int save_ioapic_entries(void);
> @@ -245,6 +248,7 @@ static inline void disable_ioapic_support(void) { }
>  #define native_ioapic_set_affinity   NULL
>  #define native_setup_ioapic_entryNULL
>  #define native_setup_timer_pin   NULL
> +#define native_compose_msi_msg   NULL
>  #endif
>  
>  #endif /* _ASM_X86_IO_APIC_H */
> diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
> index ffe5860..1430af0 100644
> --- a/arch/x86/include/asm/x86_init.h
> +++ b/arch/x86/include/asm/x86_init.h
> @@ -180,9 +180,13 @@ struct x86_platform_ops {
>  };
>  
>  struct pci_dev;
> +struct msi_msg;
>  
>  struct x86_msi_ops {
>   int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
> + void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq,
> + unsigned int dest, struct msi_msg *msg,
> +u8 hpet_id);
>   void (*teardown_msi_irq)(unsigned int irq);
>   void (*teardown_msi_irqs)(struct pci_dev *dev);
>   void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
> diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
> index c2f2d2d..aac3f62 100644
> --- a/arch/x86/kernel/apic/io_apic.c
> +++ b/arch/x86/kernel/apic/io_apic.c
> @@ -2989,37 +2989,16 @@ void destroy_irq(unsigned int irq)
>  /*
>   * MSI message composition
>   */
> -#ifdef CONFIG_PCI_MSI
> -static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
> -struct msi_msg *msg, u8 hpet_id)
> +void native_compose_msi_msg(struct pci_dev *pdev,
> + unsigned int irq, unsigned int dest,
> + struct msi_msg *msg, u8 hpet_id)
>  {
> - struct irq_cfg *cfg;
> - int err;
> - unsigned dest;
> -
> - if (disable_apic)
> - return -ENXIO;
> -
> - cfg = irq_cfg(irq);
> - err = assign_irq_vector(irq, cfg, apic->target_cpus());
> - if (err)
> - return err;
> -
> - err = apic->cpu_mask_to_apicid_and(cfg->domain,
> -apic->target_cpus(), );
> - if (err)
> - return err;
> + struct irq_cfg *cfg = irq_cfg(irq);
>  
> - if (irq_remapped(cfg)) {
> - compose_remapped_msi_msg(pdev, irq, dest, msg, hpet_id);
> - return err;
> - }
> + msg->address_hi = MSI_ADDR_BASE_HI;
>  
>   if (x2apic_enabled())
> - msg->address_hi = MSI_ADDR_BASE_HI |
> -   MSI_ADDR_EXT_DEST_ID(dest);
> - else
> - msg->address_hi = MSI_ADDR_BASE_HI;
> + msg->address_hi |= MSI_ADDR_EXT_DEST_ID(dest);
>  
>   msg->address_lo =
>   MSI_ADDR_BASE_LO |
> @@ -3038,8 +3017,32 @@ static int msi_compose_msg(struct pci_dev *pdev, 
> unsigned int irq,
>   MSI_DATA_DELIVERY_FIXED:
>   MSI_DATA_DELIVERY_LOWPRI) |
>   MSI_DATA_VECTOR(cfg->vector);
> +}
>  
> - return err;
> +#ifdef CONFIG_PCI_MSI
> +static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
> +struct msi_msg *msg, u8 hpet_id)
> +{
> + struct irq_cfg *cfg;
> + int err;
> + unsigned dest;
> +
> + if (disable_apic)
> + return -ENXIO;
> +
> + cfg = irq_cfg(irq);
> + err = assign_irq_vector(irq, cfg, apic->target_cpus());
> + if (err)
> + return err;
> +
> + err = apic->cpu_mask_to_apicid_and(cfg->domain,
> +apic->target_cpus(), );
> + if (err)
> + return err;
> +
> + x86_msi.compose_msi_msg(pdev, irq, dest, msg, hpet_id);
> +
>

[PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-20 Thread Joerg Roedel 
This call-back points to the right function for initializing
the msi_msg structure.

Signed-off-by: Joerg Roedel 
---
 arch/x86/include/asm/io_apic.h  |4 +++
 arch/x86/include/asm/x86_init.h |4 +++
 arch/x86/kernel/apic/io_apic.c  |   59 ---
 arch/x86/kernel/x86_init.c  |1 +
 drivers/iommu/irq_remapping.c   |9 --
 5 files changed, 46 insertions(+), 31 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 0db4429..59a3f4e 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -160,6 +160,9 @@ extern void __init native_setup_timer_pin(unsigned int 
ioapic_idx,
  unsigned int pin, int vector);
 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
 
+extern void native_compose_msi_msg(struct pci_dev *pdev,
+  unsigned int irq, unsigned int dest,
+  struct msi_msg *msg, u8 hpet_id);
 int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct 
io_apic_irq_attr *attr);
 
 extern int save_ioapic_entries(void);
@@ -245,6 +248,7 @@ static inline void disable_ioapic_support(void) { }
 #define native_ioapic_set_affinity NULL
 #define native_setup_ioapic_entry  NULL
 #define native_setup_timer_pin NULL
+#define native_compose_msi_msg NULL
 #endif
 
 #endif /* _ASM_X86_IO_APIC_H */
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index ffe5860..1430af0 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -180,9 +180,13 @@ struct x86_platform_ops {
 };
 
 struct pci_dev;
+struct msi_msg;
 
 struct x86_msi_ops {
int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
+   void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq,
+   unsigned int dest, struct msi_msg *msg,
+  u8 hpet_id);
void (*teardown_msi_irq)(unsigned int irq);
void (*teardown_msi_irqs)(struct pci_dev *dev);
void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index c2f2d2d..aac3f62 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -2989,37 +2989,16 @@ void destroy_irq(unsigned int irq)
 /*
  * MSI message composition
  */
-#ifdef CONFIG_PCI_MSI
-static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
-  struct msi_msg *msg, u8 hpet_id)
+void native_compose_msi_msg(struct pci_dev *pdev,
+   unsigned int irq, unsigned int dest,
+   struct msi_msg *msg, u8 hpet_id)
 {
-   struct irq_cfg *cfg;
-   int err;
-   unsigned dest;
-
-   if (disable_apic)
-   return -ENXIO;
-
-   cfg = irq_cfg(irq);
-   err = assign_irq_vector(irq, cfg, apic->target_cpus());
-   if (err)
-   return err;
-
-   err = apic->cpu_mask_to_apicid_and(cfg->domain,
-  apic->target_cpus(), );
-   if (err)
-   return err;
+   struct irq_cfg *cfg = irq_cfg(irq);
 
-   if (irq_remapped(cfg)) {
-   compose_remapped_msi_msg(pdev, irq, dest, msg, hpet_id);
-   return err;
-   }
+   msg->address_hi = MSI_ADDR_BASE_HI;
 
if (x2apic_enabled())
-   msg->address_hi = MSI_ADDR_BASE_HI |
- MSI_ADDR_EXT_DEST_ID(dest);
-   else
-   msg->address_hi = MSI_ADDR_BASE_HI;
+   msg->address_hi |= MSI_ADDR_EXT_DEST_ID(dest);
 
msg->address_lo =
MSI_ADDR_BASE_LO |
@@ -3038,8 +3017,32 @@ static int msi_compose_msg(struct pci_dev *pdev, 
unsigned int irq,
MSI_DATA_DELIVERY_FIXED:
MSI_DATA_DELIVERY_LOWPRI) |
MSI_DATA_VECTOR(cfg->vector);
+}
 
-   return err;
+#ifdef CONFIG_PCI_MSI
+static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
+  struct msi_msg *msg, u8 hpet_id)
+{
+   struct irq_cfg *cfg;
+   int err;
+   unsigned dest;
+
+   if (disable_apic)
+   return -ENXIO;
+
+   cfg = irq_cfg(irq);
+   err = assign_irq_vector(irq, cfg, apic->target_cpus());
+   if (err)
+   return err;
+
+   err = apic->cpu_mask_to_apicid_and(cfg->domain,
+  apic->target_cpus(), );
+   if (err)
+   return err;
+
+   x86_msi.compose_msi_msg(pdev, irq, dest, msg, hpet_id);
+
+   return 0;
 }
 
 static int
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index eba02e5..af5874e 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -115,6 +115,7 @@ struct x86_platform_ops x86_platform = {

[PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-20 Thread Joerg Roedel 
This call-back points to the right function for initializing
the msi_msg structure.

Signed-off-by: Joerg Roedel joerg.roe...@amd.com
---
 arch/x86/include/asm/io_apic.h  |4 +++
 arch/x86/include/asm/x86_init.h |4 +++
 arch/x86/kernel/apic/io_apic.c  |   59 ---
 arch/x86/kernel/x86_init.c  |1 +
 drivers/iommu/irq_remapping.c   |9 --
 5 files changed, 46 insertions(+), 31 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 0db4429..59a3f4e 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -160,6 +160,9 @@ extern void __init native_setup_timer_pin(unsigned int 
ioapic_idx,
  unsigned int pin, int vector);
 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
 
+extern void native_compose_msi_msg(struct pci_dev *pdev,
+  unsigned int irq, unsigned int dest,
+  struct msi_msg *msg, u8 hpet_id);
 int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct 
io_apic_irq_attr *attr);
 
 extern int save_ioapic_entries(void);
@@ -245,6 +248,7 @@ static inline void disable_ioapic_support(void) { }
 #define native_ioapic_set_affinity NULL
 #define native_setup_ioapic_entry  NULL
 #define native_setup_timer_pin NULL
+#define native_compose_msi_msg NULL
 #endif
 
 #endif /* _ASM_X86_IO_APIC_H */
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index ffe5860..1430af0 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -180,9 +180,13 @@ struct x86_platform_ops {
 };
 
 struct pci_dev;
+struct msi_msg;
 
 struct x86_msi_ops {
int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
+   void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq,
+   unsigned int dest, struct msi_msg *msg,
+  u8 hpet_id);
void (*teardown_msi_irq)(unsigned int irq);
void (*teardown_msi_irqs)(struct pci_dev *dev);
void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index c2f2d2d..aac3f62 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -2989,37 +2989,16 @@ void destroy_irq(unsigned int irq)
 /*
  * MSI message composition
  */
-#ifdef CONFIG_PCI_MSI
-static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
-  struct msi_msg *msg, u8 hpet_id)
+void native_compose_msi_msg(struct pci_dev *pdev,
+   unsigned int irq, unsigned int dest,
+   struct msi_msg *msg, u8 hpet_id)
 {
-   struct irq_cfg *cfg;
-   int err;
-   unsigned dest;
-
-   if (disable_apic)
-   return -ENXIO;
-
-   cfg = irq_cfg(irq);
-   err = assign_irq_vector(irq, cfg, apic-target_cpus());
-   if (err)
-   return err;
-
-   err = apic-cpu_mask_to_apicid_and(cfg-domain,
-  apic-target_cpus(), dest);
-   if (err)
-   return err;
+   struct irq_cfg *cfg = irq_cfg(irq);
 
-   if (irq_remapped(cfg)) {
-   compose_remapped_msi_msg(pdev, irq, dest, msg, hpet_id);
-   return err;
-   }
+   msg-address_hi = MSI_ADDR_BASE_HI;
 
if (x2apic_enabled())
-   msg-address_hi = MSI_ADDR_BASE_HI |
- MSI_ADDR_EXT_DEST_ID(dest);
-   else
-   msg-address_hi = MSI_ADDR_BASE_HI;
+   msg-address_hi |= MSI_ADDR_EXT_DEST_ID(dest);
 
msg-address_lo =
MSI_ADDR_BASE_LO |
@@ -3038,8 +3017,32 @@ static int msi_compose_msg(struct pci_dev *pdev, 
unsigned int irq,
MSI_DATA_DELIVERY_FIXED:
MSI_DATA_DELIVERY_LOWPRI) |
MSI_DATA_VECTOR(cfg-vector);
+}
 
-   return err;
+#ifdef CONFIG_PCI_MSI
+static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
+  struct msi_msg *msg, u8 hpet_id)
+{
+   struct irq_cfg *cfg;
+   int err;
+   unsigned dest;
+
+   if (disable_apic)
+   return -ENXIO;
+
+   cfg = irq_cfg(irq);
+   err = assign_irq_vector(irq, cfg, apic-target_cpus());
+   if (err)
+   return err;
+
+   err = apic-cpu_mask_to_apicid_and(cfg-domain,
+  apic-target_cpus(), dest);
+   if (err)
+   return err;
+
+   x86_msi.compose_msi_msg(pdev, irq, dest, msg, hpet_id);
+
+   return 0;
 }
 
 static int
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index eba02e5..af5874e 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -115,6 +115,7 @@ struct x86_platform_ops

Re: [PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-20 Thread Konrad Rzeszutek Wilk 
On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
 This call-back points to the right function for initializing
 the msi_msg structure.

What is the 'hpet_id' purpose in this?

 
 Signed-off-by: Joerg Roedel joerg.roe...@amd.com
 ---
  arch/x86/include/asm/io_apic.h  |4 +++
  arch/x86/include/asm/x86_init.h |4 +++
  arch/x86/kernel/apic/io_apic.c  |   59 
 ---
  arch/x86/kernel/x86_init.c  |1 +
  drivers/iommu/irq_remapping.c   |9 --
  5 files changed, 46 insertions(+), 31 deletions(-)
 
 diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
 index 0db4429..59a3f4e 100644
 --- a/arch/x86/include/asm/io_apic.h
 +++ b/arch/x86/include/asm/io_apic.h
 @@ -160,6 +160,9 @@ extern void __init native_setup_timer_pin(unsigned int 
 ioapic_idx,
 unsigned int pin, int vector);
  extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
  
 +extern void native_compose_msi_msg(struct pci_dev *pdev,
 +unsigned int irq, unsigned int dest,
 +struct msi_msg *msg, u8 hpet_id);
  int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct 
 io_apic_irq_attr *attr);
  
  extern int save_ioapic_entries(void);
 @@ -245,6 +248,7 @@ static inline void disable_ioapic_support(void) { }
  #define native_ioapic_set_affinity   NULL
  #define native_setup_ioapic_entryNULL
  #define native_setup_timer_pin   NULL
 +#define native_compose_msi_msg   NULL
  #endif
  
  #endif /* _ASM_X86_IO_APIC_H */
 diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
 index ffe5860..1430af0 100644
 --- a/arch/x86/include/asm/x86_init.h
 +++ b/arch/x86/include/asm/x86_init.h
 @@ -180,9 +180,13 @@ struct x86_platform_ops {
  };
  
  struct pci_dev;
 +struct msi_msg;
  
  struct x86_msi_ops {
   int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
 + void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq,
 + unsigned int dest, struct msi_msg *msg,
 +u8 hpet_id);
   void (*teardown_msi_irq)(unsigned int irq);
   void (*teardown_msi_irqs)(struct pci_dev *dev);
   void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
 diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
 index c2f2d2d..aac3f62 100644
 --- a/arch/x86/kernel/apic/io_apic.c
 +++ b/arch/x86/kernel/apic/io_apic.c
 @@ -2989,37 +2989,16 @@ void destroy_irq(unsigned int irq)
  /*
   * MSI message composition
   */
 -#ifdef CONFIG_PCI_MSI
 -static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
 -struct msi_msg *msg, u8 hpet_id)
 +void native_compose_msi_msg(struct pci_dev *pdev,
 + unsigned int irq, unsigned int dest,
 + struct msi_msg *msg, u8 hpet_id)
  {
 - struct irq_cfg *cfg;
 - int err;
 - unsigned dest;
 -
 - if (disable_apic)
 - return -ENXIO;
 -
 - cfg = irq_cfg(irq);
 - err = assign_irq_vector(irq, cfg, apic-target_cpus());
 - if (err)
 - return err;
 -
 - err = apic-cpu_mask_to_apicid_and(cfg-domain,
 -apic-target_cpus(), dest);
 - if (err)
 - return err;
 + struct irq_cfg *cfg = irq_cfg(irq);
  
 - if (irq_remapped(cfg)) {
 - compose_remapped_msi_msg(pdev, irq, dest, msg, hpet_id);
 - return err;
 - }
 + msg-address_hi = MSI_ADDR_BASE_HI;
  
   if (x2apic_enabled())
 - msg-address_hi = MSI_ADDR_BASE_HI |
 -   MSI_ADDR_EXT_DEST_ID(dest);
 - else
 - msg-address_hi = MSI_ADDR_BASE_HI;
 + msg-address_hi |= MSI_ADDR_EXT_DEST_ID(dest);
  
   msg-address_lo =
   MSI_ADDR_BASE_LO |
 @@ -3038,8 +3017,32 @@ static int msi_compose_msg(struct pci_dev *pdev, 
 unsigned int irq,
   MSI_DATA_DELIVERY_FIXED:
   MSI_DATA_DELIVERY_LOWPRI) |
   MSI_DATA_VECTOR(cfg-vector);
 +}
  
 - return err;
 +#ifdef CONFIG_PCI_MSI
 +static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
 +struct msi_msg *msg, u8 hpet_id)
 +{
 + struct irq_cfg *cfg;
 + int err;
 + unsigned dest;
 +
 + if (disable_apic)
 + return -ENXIO;
 +
 + cfg = irq_cfg(irq);
 + err = assign_irq_vector(irq, cfg, apic-target_cpus());
 + if (err)
 + return err;
 +
 + err = apic-cpu_mask_to_apicid_and(cfg-domain,
 +apic-target_cpus(), dest);
 + if (err)
 + return err;
 +
 + x86_msi.compose_msi_msg(pdev, irq, dest, msg, hpet_id);
 +
 + return 0;
  }
  
  static int
 diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
 index

[PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-07 Thread Joerg Roedel 
This call-back points to the right function for initializing
the msi_msg structure.

Signed-off-by: Joerg Roedel 
---
 arch/x86/include/asm/io_apic.h  |3 +++
 arch/x86/include/asm/x86_init.h |4 +++
 arch/x86/kernel/apic/io_apic.c  |   57 ---
 arch/x86/kernel/x86_init.c  |1 +
 drivers/iommu/irq_remapping.c   |9 ---
 5 files changed, 44 insertions(+), 30 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index f294eba..5ffa634 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -160,6 +160,9 @@ extern void __init native_setup_timer_pin(unsigned int 
ioapic_idx,
  unsigned int pin, int vector);
 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
 
+extern void native_compose_msi_msg(struct pci_dev *pdev,
+  unsigned int irq, unsigned int dest,
+  struct msi_msg *msg, u8 hpet_id);
 int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct 
io_apic_irq_attr *attr);
 
 extern int save_ioapic_entries(void);
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index ffe5860..1430af0 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -180,9 +180,13 @@ struct x86_platform_ops {
 };
 
 struct pci_dev;
+struct msi_msg;
 
 struct x86_msi_ops {
int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
+   void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq,
+   unsigned int dest, struct msi_msg *msg,
+  u8 hpet_id);
void (*teardown_msi_irq)(unsigned int irq);
void (*teardown_msi_irqs)(struct pci_dev *dev);
void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index ec37ec2..94e2f9d 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -2990,36 +2990,16 @@ void destroy_irq(unsigned int irq)
  * MSI message composition
  */
 #ifdef CONFIG_PCI_MSI
-static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
-  struct msi_msg *msg, u8 hpet_id)
+void native_compose_msi_msg(struct pci_dev *pdev,
+   unsigned int irq, unsigned int dest,
+   struct msi_msg *msg, u8 hpet_id)
 {
-   struct irq_cfg *cfg;
-   int err;
-   unsigned dest;
-
-   if (disable_apic)
-   return -ENXIO;
+   struct irq_cfg *cfg = irq_cfg(irq);
 
-   cfg = irq_cfg(irq);
-   err = assign_irq_vector(irq, cfg, apic->target_cpus());
-   if (err)
-   return err;
-
-   err = apic->cpu_mask_to_apicid_and(cfg->domain,
-  apic->target_cpus(), );
-   if (err)
-   return err;
-
-   if (irq_remapped(cfg)) {
-   compose_remapped_msi_msg(pdev, irq, dest, msg, hpet_id);
-   return err;
-   }
+   msg->address_hi = MSI_ADDR_BASE_HI;
 
if (x2apic_enabled())
-   msg->address_hi = MSI_ADDR_BASE_HI |
- MSI_ADDR_EXT_DEST_ID(dest);
-   else
-   msg->address_hi = MSI_ADDR_BASE_HI;
+   msg->address_hi |= MSI_ADDR_EXT_DEST_ID(dest);
 
msg->address_lo =
MSI_ADDR_BASE_LO |
@@ -3038,8 +3018,31 @@ static int msi_compose_msg(struct pci_dev *pdev, 
unsigned int irq,
MSI_DATA_DELIVERY_FIXED:
MSI_DATA_DELIVERY_LOWPRI) |
MSI_DATA_VECTOR(cfg->vector);
+}
 
-   return err;
+static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
+  struct msi_msg *msg, u8 hpet_id)
+{
+   struct irq_cfg *cfg;
+   int err;
+   unsigned dest;
+
+   if (disable_apic)
+   return -ENXIO;
+
+   cfg = irq_cfg(irq);
+   err = assign_irq_vector(irq, cfg, apic->target_cpus());
+   if (err)
+   return err;
+
+   err = apic->cpu_mask_to_apicid_and(cfg->domain,
+  apic->target_cpus(), );
+   if (err)
+   return err;
+
+   x86_msi.compose_msi_msg(pdev, irq, dest, msg, hpet_id);
+
+   return 0;
 }
 
 static int
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index eba02e5..af5874e 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -115,6 +115,7 @@ struct x86_platform_ops x86_platform = {
 EXPORT_SYMBOL_GPL(x86_platform);
 struct x86_msi_ops x86_msi = {
.setup_msi_irqs = native_setup_msi_irqs,
+   .compose_msi_msg= native_compose_msi_msg,
.teardown_msi_irq   = native_teardown_msi_irq,
.teardown_msi_irqs  = default_teardown_msi_irqs,

[PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

2012-08-07 Thread Joerg Roedel 
This call-back points to the right function for initializing
the msi_msg structure.

Signed-off-by: Joerg Roedel joerg.roe...@amd.com
---
 arch/x86/include/asm/io_apic.h  |3 +++
 arch/x86/include/asm/x86_init.h |4 +++
 arch/x86/kernel/apic/io_apic.c  |   57 ---
 arch/x86/kernel/x86_init.c  |1 +
 drivers/iommu/irq_remapping.c   |9 ---
 5 files changed, 44 insertions(+), 30 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index f294eba..5ffa634 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -160,6 +160,9 @@ extern void __init native_setup_timer_pin(unsigned int 
ioapic_idx,
  unsigned int pin, int vector);
 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
 
+extern void native_compose_msi_msg(struct pci_dev *pdev,
+  unsigned int irq, unsigned int dest,
+  struct msi_msg *msg, u8 hpet_id);
 int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct 
io_apic_irq_attr *attr);
 
 extern int save_ioapic_entries(void);
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index ffe5860..1430af0 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -180,9 +180,13 @@ struct x86_platform_ops {
 };
 
 struct pci_dev;
+struct msi_msg;
 
 struct x86_msi_ops {
int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
+   void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq,
+   unsigned int dest, struct msi_msg *msg,
+  u8 hpet_id);
void (*teardown_msi_irq)(unsigned int irq);
void (*teardown_msi_irqs)(struct pci_dev *dev);
void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index ec37ec2..94e2f9d 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -2990,36 +2990,16 @@ void destroy_irq(unsigned int irq)
  * MSI message composition
  */
 #ifdef CONFIG_PCI_MSI
-static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
-  struct msi_msg *msg, u8 hpet_id)
+void native_compose_msi_msg(struct pci_dev *pdev,
+   unsigned int irq, unsigned int dest,
+   struct msi_msg *msg, u8 hpet_id)
 {
-   struct irq_cfg *cfg;
-   int err;
-   unsigned dest;
-
-   if (disable_apic)
-   return -ENXIO;
+   struct irq_cfg *cfg = irq_cfg(irq);
 
-   cfg = irq_cfg(irq);
-   err = assign_irq_vector(irq, cfg, apic-target_cpus());
-   if (err)
-   return err;
-
-   err = apic-cpu_mask_to_apicid_and(cfg-domain,
-  apic-target_cpus(), dest);
-   if (err)
-   return err;
-
-   if (irq_remapped(cfg)) {
-   compose_remapped_msi_msg(pdev, irq, dest, msg, hpet_id);
-   return err;
-   }
+   msg-address_hi = MSI_ADDR_BASE_HI;
 
if (x2apic_enabled())
-   msg-address_hi = MSI_ADDR_BASE_HI |
- MSI_ADDR_EXT_DEST_ID(dest);
-   else
-   msg-address_hi = MSI_ADDR_BASE_HI;
+   msg-address_hi |= MSI_ADDR_EXT_DEST_ID(dest);
 
msg-address_lo =
MSI_ADDR_BASE_LO |
@@ -3038,8 +3018,31 @@ static int msi_compose_msg(struct pci_dev *pdev, 
unsigned int irq,
MSI_DATA_DELIVERY_FIXED:
MSI_DATA_DELIVERY_LOWPRI) |
MSI_DATA_VECTOR(cfg-vector);
+}
 
-   return err;
+static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
+  struct msi_msg *msg, u8 hpet_id)
+{
+   struct irq_cfg *cfg;
+   int err;
+   unsigned dest;
+
+   if (disable_apic)
+   return -ENXIO;
+
+   cfg = irq_cfg(irq);
+   err = assign_irq_vector(irq, cfg, apic-target_cpus());
+   if (err)
+   return err;
+
+   err = apic-cpu_mask_to_apicid_and(cfg-domain,
+  apic-target_cpus(), dest);
+   if (err)
+   return err;
+
+   x86_msi.compose_msi_msg(pdev, irq, dest, msg, hpet_id);
+
+   return 0;
 }
 
 static int
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index eba02e5..af5874e 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -115,6 +115,7 @@ struct x86_platform_ops x86_platform = {
 EXPORT_SYMBOL_GPL(x86_platform);
 struct x86_msi_ops x86_msi = {
.setup_msi_irqs = native_setup_msi_irqs,
+   .compose_msi_msg= native_compose_msi_msg,
.teardown_msi_irq   = native_teardown_msi_irq,
.teardown_msi_irqs  = default_teardown_msi_irqs,