Re: [PATCH 5/5] arm64: dts: exynos5433: Add support of bus frequency using VDD_INT on TM2

[Krzysztof Kozlowski]

On Fri, Dec 02, 2016 at 04:18:07PM +0900, Chanwoo Choi wrote:
> This patch adds the bus Device-tree nodes for INT (Internal) block
> to enable the bus frequency scaling.
> 
> Signed-off-by: Chanwoo Choi 
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 72 
> +++
>  1 file changed, 72 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts 
> b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> index c08589970134..7b37aae336b1 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -170,6 +170,58 @@
>   };
>  };
>  
> +_g2d_400 {
> + devfreq-events = <_event0_d0_general>, <_event0_d1_general>;
> + vdd-supply = <_reg>;
> + exynos,saturation-ratio = <10>;
> + status = "okay";
> +};
> +
> +_mscl {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_jpeg {

Except the first entry (which is a parent), are there any objections to
order these nodes alphabetically? This also applies to the previously
patch.

Beside that nit, looks good. I will have to wait anyway to next merge
window, so for the reference:

Reviewed-by: Krzysztof Kozlowski 

Best regards,
Krzysztof


> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_mfc {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_g2d_266 {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_gscl {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_hevc {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_bus0 {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_bus1 {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_bus2 {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
>  _aud {
>   assigned-clocks = <_aud CLK_MOUT_AUD_PLL_USER>;
>   assigned-clock-parents = <_top CLK_FOUT_AUD_PLL>;
> @@ -794,6 +846,26 @@
>   bus-width = <4>;
>  };
>  
> +_d0_general {
> + status = "okay";
> +
> + events {
> + ppmu_event0_d0_general: ppmu-event0-d0-general {
> + event-name = "ppmu-event0-d0-general";
> + };
> + };
> +};
> +
> +_d1_general {
> + status = "okay";
> +
> + events {
> + ppmu_event0_d1_general: ppmu-event0-d1-general {
> +event-name = "ppmu-event0-d1-general";
> +};
> +   };
> +};
> +
>  _alive {
>   pinctrl-names = "default";
>   pinctrl-0 = <_alive>;
> -- 
> 1.9.1
> 

Re: [PATCH 5/5] arm64: dts: exynos5433: Add support of bus frequency using VDD_INT on TM2

[Krzysztof Kozlowski]

On Fri, Dec 02, 2016 at 04:18:07PM +0900, Chanwoo Choi wrote:
> This patch adds the bus Device-tree nodes for INT (Internal) block
> to enable the bus frequency scaling.
> 
> Signed-off-by: Chanwoo Choi 
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 72 
> +++
>  1 file changed, 72 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts 
> b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> index c08589970134..7b37aae336b1 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -170,6 +170,58 @@
>   };
>  };
>  
> +_g2d_400 {
> + devfreq-events = <_event0_d0_general>, <_event0_d1_general>;
> + vdd-supply = <_reg>;
> + exynos,saturation-ratio = <10>;
> + status = "okay";
> +};
> +
> +_mscl {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_jpeg {

Except the first entry (which is a parent), are there any objections to
order these nodes alphabetically? This also applies to the previously
patch.

Beside that nit, looks good. I will have to wait anyway to next merge
window, so for the reference:

Reviewed-by: Krzysztof Kozlowski 

Best regards,
Krzysztof


> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_mfc {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_g2d_266 {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_gscl {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_hevc {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_bus0 {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_bus1 {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
> +_bus2 {
> + devfreq = <_g2d_400>;
> + status = "okay";
> +};
> +
>  _aud {
>   assigned-clocks = <_aud CLK_MOUT_AUD_PLL_USER>;
>   assigned-clock-parents = <_top CLK_FOUT_AUD_PLL>;
> @@ -794,6 +846,26 @@
>   bus-width = <4>;
>  };
>  
> +_d0_general {
> + status = "okay";
> +
> + events {
> + ppmu_event0_d0_general: ppmu-event0-d0-general {
> + event-name = "ppmu-event0-d0-general";
> + };
> + };
> +};
> +
> +_d1_general {
> + status = "okay";
> +
> + events {
> + ppmu_event0_d1_general: ppmu-event0-d1-general {
> +event-name = "ppmu-event0-d1-general";
> +};
> +   };
> +};
> +
>  _alive {
>   pinctrl-names = "default";
>   pinctrl-0 = <_alive>;
> -- 
> 1.9.1
> 

[PATCH 5/5] arm64: dts: exynos5433: Add support of bus frequency using VDD_INT on TM2

[Chanwoo Choi]

This patch adds the bus Device-tree nodes for INT (Internal) block
to enable the bus frequency scaling.

Signed-off-by: Chanwoo Choi 
---
 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 72 +++
 1 file changed, 72 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts 
b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index c08589970134..7b37aae336b1 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -170,6 +170,58 @@
};
 };
 
+_g2d_400 {
+   devfreq-events = <_event0_d0_general>, <_event0_d1_general>;
+   vdd-supply = <_reg>;
+   exynos,saturation-ratio = <10>;
+   status = "okay";
+};
+
+_mscl {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_jpeg {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_mfc {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_g2d_266 {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_gscl {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_hevc {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_bus0 {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_bus1 {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_bus2 {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
 _aud {
assigned-clocks = <_aud CLK_MOUT_AUD_PLL_USER>;
assigned-clock-parents = <_top CLK_FOUT_AUD_PLL>;
@@ -794,6 +846,26 @@
bus-width = <4>;
 };
 
+_d0_general {
+   status = "okay";
+
+   events {
+   ppmu_event0_d0_general: ppmu-event0-d0-general {
+   event-name = "ppmu-event0-d0-general";
+   };
+   };
+};
+
+_d1_general {
+   status = "okay";
+
+   events {
+   ppmu_event0_d1_general: ppmu-event0-d1-general {
+  event-name = "ppmu-event0-d1-general";
+  };
+   };
+};
+
 _alive {
pinctrl-names = "default";
pinctrl-0 = <_alive>;
-- 
1.9.1

[PATCH 5/5] arm64: dts: exynos5433: Add support of bus frequency using VDD_INT on TM2

[Chanwoo Choi]

This patch adds the bus Device-tree nodes for INT (Internal) block
to enable the bus frequency scaling.

Signed-off-by: Chanwoo Choi 
---
 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 72 +++
 1 file changed, 72 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts 
b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index c08589970134..7b37aae336b1 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -170,6 +170,58 @@
};
 };
 
+_g2d_400 {
+   devfreq-events = <_event0_d0_general>, <_event0_d1_general>;
+   vdd-supply = <_reg>;
+   exynos,saturation-ratio = <10>;
+   status = "okay";
+};
+
+_mscl {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_jpeg {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_mfc {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_g2d_266 {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_gscl {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_hevc {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_bus0 {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_bus1 {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
+_bus2 {
+   devfreq = <_g2d_400>;
+   status = "okay";
+};
+
 _aud {
assigned-clocks = <_aud CLK_MOUT_AUD_PLL_USER>;
assigned-clock-parents = <_top CLK_FOUT_AUD_PLL>;
@@ -794,6 +846,26 @@
bus-width = <4>;
 };
 
+_d0_general {
+   status = "okay";
+
+   events {
+   ppmu_event0_d0_general: ppmu-event0-d0-general {
+   event-name = "ppmu-event0-d0-general";
+   };
+   };
+};
+
+_d1_general {
+   status = "okay";
+
+   events {
+   ppmu_event0_d1_general: ppmu-event0-d1-general {
+  event-name = "ppmu-event0-d1-general";
+  };
+   };
+};
+
 _alive {
pinctrl-names = "default";
pinctrl-0 = <_alive>;
-- 
1.9.1