[PATCH RESEND V3 3/9] clk: imx: add pllv4 support

2018-02-13 Thread Dong Aisheng
pllv4 is designed for System Clock Generation (SCG) module observed in IMX ULP SoC series. e.g. i.MX7ULP. The SCG modules generates clock used to derive processor, system, peripheral bus and external memory interface clocks while this patch intends to support the PLL part. Cc: Stephen Boyd

[PATCH RESEND V3 3/9] clk: imx: add pllv4 support

2018-02-13 Thread Dong Aisheng
pllv4 is designed for System Clock Generation (SCG) module observed in IMX ULP SoC series. e.g. i.MX7ULP. The SCG modules generates clock used to derive processor, system, peripheral bus and external memory interface clocks while this patch intends to support the PLL part. Cc: Stephen Boyd Cc: