On 2018-02-23 14:37, Marc Zyngier wrote:
> Hi Rasmus,
>
> On 23/02/18 12:16, Rasmus Villemoes wrote:
>> On 2018-02-02 15:58, Marc Zyngier wrote:
>>> Why 3? Reading the DT binding, this is indeed set to 3 without any
>>> reason. I'd suggest this becomes 2, encoding the pin number and the
>>> trigg
Hi Rasmus,
On 23/02/18 12:16, Rasmus Villemoes wrote:
> On 2018-02-02 15:58, Marc Zyngier wrote:
>> Hi Lina,
>>
>> On 02/02/18 14:21, Lina Iyer wrote:
>>> From : Archana Sathyakumar
>>>
>>> +
>>> +static int qcom_pdc_translate(struct irq_domain *d,
>>> + struct irq_fwspec *fwspec, unsigned long
On 2018-02-02 15:58, Marc Zyngier wrote:
> Hi Lina,
>
> On 02/02/18 14:21, Lina Iyer wrote:
>> From : Archana Sathyakumar
>>
>> +
>> +static int qcom_pdc_translate(struct irq_domain *d,
>> +struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type)
>> +{
>> +if (is_of_node(fwspe
All valid comments. Will fix them all in the next rev.
Thanks Thomas.
-- Lina
On Fri, Feb 02 2018 at 15:37 +, Thomas Gleixner wrote:
On Fri, 2 Feb 2018, Lina Iyer wrote:
+static inline void pdc_enable_intr(struct irq_data *d, bool on)
+{
+ int pin_out = d->hwirq;
+ u32 index,
On Fri, Feb 02 2018 at 16:21 +, Marc Zyngier wrote:
Hi Lina,
On 02/02/18 14:21, Lina Iyer wrote:
From : Archana Sathyakumar
The Power Domain Controller (PDC) on QTI SoCs like SDM845 houses an
interrupt controller along with other domain control functions to handle
interrupt related functi
Hi Lina,
On 02/02/18 14:21, Lina Iyer wrote:
> From : Archana Sathyakumar
>
> The Power Domain Controller (PDC) on QTI SoCs like SDM845 houses an
> interrupt controller along with other domain control functions to handle
> interrupt related functions like handle falling edge or active low which
On Fri, 2 Feb 2018, Lina Iyer wrote:
> +static inline void pdc_enable_intr(struct irq_data *d, bool on)
> +{
> + int pin_out = d->hwirq;
> + u32 index, mask;
> + u32 enable;
> + unsigned long flags;
> +
> + index = pin_out / 32;
> + mask = pin_out % 32;
> +
> + spin_lock
>From : Archana Sathyakumar
The Power Domain Controller (PDC) on QTI SoCs like SDM845 houses an
interrupt controller along with other domain control functions to handle
interrupt related functions like handle falling edge or active low which
are not detected at the GIC and handle wakeup interrupt
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