Re: [PATCH net-next] fsl/fman: implement several errata workarounds

[David Miller]

From: Florinel Iordache 
Date: Thu, 10 Aug 2017 16:47:04 +0300

> Implemented workarounds for the following dTSEC Erratum:
> A002, A004, A0012, A0014, A004839 on several operations
> that involve MAC CFG register changes: adjust link,
> rx pause frames, modify MAC address.
> 
> Signed-off-by: Florinel Iordache 

Applied, thanks.

Re: [PATCH net-next] fsl/fman: implement several errata workarounds

[David Miller]

From: Florinel Iordache 
Date: Thu, 10 Aug 2017 16:47:04 +0300

> Implemented workarounds for the following dTSEC Erratum:
> A002, A004, A0012, A0014, A004839 on several operations
> that involve MAC CFG register changes: adjust link,
> rx pause frames, modify MAC address.
> 
> Signed-off-by: Florinel Iordache 

Applied, thanks.

RE: [PATCH net-next] fsl/fman: implement several errata workarounds

[Madalin-cristian Bucur]

> -Original Message-
> From: Florinel Iordache [mailto:florinel.iorda...@nxp.com]
> Subject: [PATCH net-next] fsl/fman: implement several errata workarounds
> 
> Implemented workarounds for the following dTSEC Erratum:
> A002, A004, A0012, A0014, A004839 on several operations
> that involve MAC CFG register changes: adjust link,
> rx pause frames, modify MAC address.
> 
> Signed-off-by: Florinel Iordache <florinel.iorda...@nxp.com>

Acked-by: Madalin Bucur <madalin.bu...@nxp.com>

RE: [PATCH net-next] fsl/fman: implement several errata workarounds

[Madalin-cristian Bucur]

> -Original Message-
> From: Florinel Iordache [mailto:florinel.iorda...@nxp.com]
> Subject: [PATCH net-next] fsl/fman: implement several errata workarounds
> 
> Implemented workarounds for the following dTSEC Erratum:
> A002, A004, A0012, A0014, A004839 on several operations
> that involve MAC CFG register changes: adjust link,
> rx pause frames, modify MAC address.
> 
> Signed-off-by: Florinel Iordache 

Acked-by: Madalin Bucur 

[PATCH net-next] fsl/fman: implement several errata workarounds

[Florinel Iordache]

Implemented workarounds for the following dTSEC Erratum:
A002, A004, A0012, A0014, A004839 on several operations
that involve MAC CFG register changes: adjust link,
rx pause frames, modify MAC address.

Signed-off-by: Florinel Iordache 
---
 drivers/net/ethernet/freescale/fman/fman_dtsec.c | 118 ++-
 1 file changed, 93 insertions(+), 25 deletions(-)

diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c 
b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index 98bba10..ea43b49 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -123,7 +123,7 @@
 #define DTSEC_ECNTRL_R100M 0x0008
 #define DTSEC_ECNTRL_QSGMIIM   0x0001
 
-#define DTSEC_TCTRL_GTS0x0020
+#define TCTRL_GTS  0x0020
 
 #define RCTRL_PAL_MASK 0x001f
 #define RCTRL_PAL_SHIFT16
@@ -863,6 +863,52 @@ int dtsec_cfg_pad_and_crc(struct fman_mac *dtsec, bool 
new_val)
return 0;
 }
 
+static void graceful_start(struct fman_mac *dtsec, enum comm_mode mode)
+{
+   struct dtsec_regs __iomem *regs = dtsec->regs;
+
+   if (mode & COMM_MODE_TX)
+   iowrite32be(ioread32be(>tctrl) &
+   ~TCTRL_GTS, >tctrl);
+   if (mode & COMM_MODE_RX)
+   iowrite32be(ioread32be(>rctrl) &
+   ~RCTRL_GRS, >rctrl);
+}
+
+static void graceful_stop(struct fman_mac *dtsec, enum comm_mode mode)
+{
+   struct dtsec_regs __iomem *regs = dtsec->regs;
+   u32 tmp;
+
+   /* Graceful stop - Assert the graceful Rx stop bit */
+   if (mode & COMM_MODE_RX) {
+   tmp = ioread32be(>rctrl) | RCTRL_GRS;
+   iowrite32be(tmp, >rctrl);
+
+   if (dtsec->fm_rev_info.major == 2) {
+   /* Workaround for dTSEC Errata A002 */
+   usleep_range(100, 200);
+   } else {
+   /* Workaround for dTSEC Errata A004839 */
+   usleep_range(10, 50);
+   }
+   }
+
+   /* Graceful stop - Assert the graceful Tx stop bit */
+   if (mode & COMM_MODE_TX) {
+   if (dtsec->fm_rev_info.major == 2) {
+   /* dTSEC Errata A004: Do not use TCTRL[GTS]=1 */
+   pr_debug("GTS not supported due to DTSEC_A004 
Errata.\n");
+   } else {
+   tmp = ioread32be(>tctrl) | TCTRL_GTS;
+   iowrite32be(tmp, >tctrl);
+
+   /* Workaround for dTSEC Errata A0012, A0014 */
+   usleep_range(10, 50);
+   }
+   }
+}
+
 int dtsec_enable(struct fman_mac *dtsec, enum comm_mode mode)
 {
struct dtsec_regs __iomem *regs = dtsec->regs;
@@ -880,13 +926,8 @@ int dtsec_enable(struct fman_mac *dtsec, enum comm_mode 
mode)
 
iowrite32be(tmp, >maccfg1);
 
-   /* Graceful start - clear the graceful receive stop bit */
-   if (mode & COMM_MODE_TX)
-   iowrite32be(ioread32be(>tctrl) & ~DTSEC_TCTRL_GTS,
-   >tctrl);
-   if (mode & COMM_MODE_RX)
-   iowrite32be(ioread32be(>rctrl) & ~RCTRL_GRS,
-   >rctrl);
+   /* Graceful start - clear the graceful Rx/Tx stop bit */
+   graceful_start(dtsec, mode);
 
return 0;
 }
@@ -899,23 +940,8 @@ int dtsec_disable(struct fman_mac *dtsec, enum comm_mode 
mode)
if (!is_init_done(dtsec->dtsec_drv_param))
return -EINVAL;
 
-   /* Gracefull stop - Assert the graceful transmit stop bit */
-   if (mode & COMM_MODE_RX) {
-   tmp = ioread32be(>rctrl) | RCTRL_GRS;
-   iowrite32be(tmp, >rctrl);
-
-   if (dtsec->fm_rev_info.major == 2)
-   usleep_range(100, 200);
-   else
-   udelay(10);
-   }
-
-   if (mode & COMM_MODE_TX) {
-   if (dtsec->fm_rev_info.major == 2)
-   pr_debug("GTS not supported due to DTSEC_A004 
errata.\n");
-   else
-   pr_debug("GTS not supported due to DTSEC_A0014 
errata.\n");
-   }
+   /* Graceful stop - Assert the graceful Rx/Tx stop bit */
+   graceful_stop(dtsec, mode);
 
tmp = ioread32be(>maccfg1);
if (mode & COMM_MODE_RX)
@@ -933,11 +959,19 @@ int dtsec_set_tx_pause_frames(struct fman_mac *dtsec,
  u16 pause_time, u16 __maybe_unused thresh_time)
 {
struct dtsec_regs __iomem *regs = dtsec->regs;
+   enum comm_mode mode = COMM_MODE_NONE;
u32 ptv = 0;
 
if (!is_init_done(dtsec->dtsec_drv_param))
return -EINVAL;
 
+   if ((ioread32be(>rctrl) & RCTRL_GRS) == 0)
+   mode |= COMM_MODE_RX;
+   if ((ioread32be(>tctrl) & TCTRL_GTS) == 0)
+ 

[PATCH net-next] fsl/fman: implement several errata workarounds

[Florinel Iordache]

Implemented workarounds for the following dTSEC Erratum:
A002, A004, A0012, A0014, A004839 on several operations
that involve MAC CFG register changes: adjust link,
rx pause frames, modify MAC address.

Signed-off-by: Florinel Iordache 
---
 drivers/net/ethernet/freescale/fman/fman_dtsec.c | 118 ++-
 1 file changed, 93 insertions(+), 25 deletions(-)

diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c 
b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
index 98bba10..ea43b49 100644
--- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
+++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
@@ -123,7 +123,7 @@
 #define DTSEC_ECNTRL_R100M 0x0008
 #define DTSEC_ECNTRL_QSGMIIM   0x0001
 
-#define DTSEC_TCTRL_GTS0x0020
+#define TCTRL_GTS  0x0020
 
 #define RCTRL_PAL_MASK 0x001f
 #define RCTRL_PAL_SHIFT16
@@ -863,6 +863,52 @@ int dtsec_cfg_pad_and_crc(struct fman_mac *dtsec, bool 
new_val)
return 0;
 }
 
+static void graceful_start(struct fman_mac *dtsec, enum comm_mode mode)
+{
+   struct dtsec_regs __iomem *regs = dtsec->regs;
+
+   if (mode & COMM_MODE_TX)
+   iowrite32be(ioread32be(>tctrl) &
+   ~TCTRL_GTS, >tctrl);
+   if (mode & COMM_MODE_RX)
+   iowrite32be(ioread32be(>rctrl) &
+   ~RCTRL_GRS, >rctrl);
+}
+
+static void graceful_stop(struct fman_mac *dtsec, enum comm_mode mode)
+{
+   struct dtsec_regs __iomem *regs = dtsec->regs;
+   u32 tmp;
+
+   /* Graceful stop - Assert the graceful Rx stop bit */
+   if (mode & COMM_MODE_RX) {
+   tmp = ioread32be(>rctrl) | RCTRL_GRS;
+   iowrite32be(tmp, >rctrl);
+
+   if (dtsec->fm_rev_info.major == 2) {
+   /* Workaround for dTSEC Errata A002 */
+   usleep_range(100, 200);
+   } else {
+   /* Workaround for dTSEC Errata A004839 */
+   usleep_range(10, 50);
+   }
+   }
+
+   /* Graceful stop - Assert the graceful Tx stop bit */
+   if (mode & COMM_MODE_TX) {
+   if (dtsec->fm_rev_info.major == 2) {
+   /* dTSEC Errata A004: Do not use TCTRL[GTS]=1 */
+   pr_debug("GTS not supported due to DTSEC_A004 
Errata.\n");
+   } else {
+   tmp = ioread32be(>tctrl) | TCTRL_GTS;
+   iowrite32be(tmp, >tctrl);
+
+   /* Workaround for dTSEC Errata A0012, A0014 */
+   usleep_range(10, 50);
+   }
+   }
+}
+
 int dtsec_enable(struct fman_mac *dtsec, enum comm_mode mode)
 {
struct dtsec_regs __iomem *regs = dtsec->regs;
@@ -880,13 +926,8 @@ int dtsec_enable(struct fman_mac *dtsec, enum comm_mode 
mode)
 
iowrite32be(tmp, >maccfg1);
 
-   /* Graceful start - clear the graceful receive stop bit */
-   if (mode & COMM_MODE_TX)
-   iowrite32be(ioread32be(>tctrl) & ~DTSEC_TCTRL_GTS,
-   >tctrl);
-   if (mode & COMM_MODE_RX)
-   iowrite32be(ioread32be(>rctrl) & ~RCTRL_GRS,
-   >rctrl);
+   /* Graceful start - clear the graceful Rx/Tx stop bit */
+   graceful_start(dtsec, mode);
 
return 0;
 }
@@ -899,23 +940,8 @@ int dtsec_disable(struct fman_mac *dtsec, enum comm_mode 
mode)
if (!is_init_done(dtsec->dtsec_drv_param))
return -EINVAL;
 
-   /* Gracefull stop - Assert the graceful transmit stop bit */
-   if (mode & COMM_MODE_RX) {
-   tmp = ioread32be(>rctrl) | RCTRL_GRS;
-   iowrite32be(tmp, >rctrl);
-
-   if (dtsec->fm_rev_info.major == 2)
-   usleep_range(100, 200);
-   else
-   udelay(10);
-   }
-
-   if (mode & COMM_MODE_TX) {
-   if (dtsec->fm_rev_info.major == 2)
-   pr_debug("GTS not supported due to DTSEC_A004 
errata.\n");
-   else
-   pr_debug("GTS not supported due to DTSEC_A0014 
errata.\n");
-   }
+   /* Graceful stop - Assert the graceful Rx/Tx stop bit */
+   graceful_stop(dtsec, mode);
 
tmp = ioread32be(>maccfg1);
if (mode & COMM_MODE_RX)
@@ -933,11 +959,19 @@ int dtsec_set_tx_pause_frames(struct fman_mac *dtsec,
  u16 pause_time, u16 __maybe_unused thresh_time)
 {
struct dtsec_regs __iomem *regs = dtsec->regs;
+   enum comm_mode mode = COMM_MODE_NONE;
u32 ptv = 0;
 
if (!is_init_done(dtsec->dtsec_drv_param))
return -EINVAL;
 
+   if ((ioread32be(>rctrl) & RCTRL_GRS) == 0)
+   mode |= COMM_MODE_RX;
+   if ((ioread32be(>tctrl) & TCTRL_GTS) == 0)
+   mode |=