Re: [PATCH v1 0/1] arm: npcm: enable L2 cache in NPCM7xx architecture
On Sun, Apr 8, 2018 at 4:03 PM, Tomer Maimon wrote: > This patch Enable ARM L2 cache module in Nuvoton NPCM7xx BMC > by adding L2 cache parameters into NPCM7xx DT machine start structure. > > At patch V7 arm: npcm: add basic support for Nuvoton BMCs we got comments > regarding the flags use in L2 cache module. > - https://www.spinics.net/lists/arm-kernel/msg613212.html > > After checking again the L2 cache use in the NPCM7xx, > the only L2 cache flag we need to set is L2C_AUX_CTRL_SHARED_OVERRIDE > and it is done in the device tree: > https://patchwork.kernel.org/patch/10063497/ > > L2 cache flag mask allowed all the flag option. I've applied the patch to my fixes branch now, but took your description above instead of the two-line text that you had in the patch itself. I liked the longer text much better. Arnd
[PATCH v1 0/1] arm: npcm: enable L2 cache in NPCM7xx architecture
This patch Enable ARM L2 cache module in Nuvoton NPCM7xx BMC by adding L2 cache parameters into NPCM7xx DT machine start structure. At patch V7 arm: npcm: add basic support for Nuvoton BMCs we got comments regarding the flags use in L2 cache module. - https://www.spinics.net/lists/arm-kernel/msg613212.html After checking again the L2 cache use in the NPCM7xx, the only L2 cache flag we need to set is L2C_AUX_CTRL_SHARED_OVERRIDE and it is done in the device tree: https://patchwork.kernel.org/patch/10063497/ L2 cache flag mask allowed all the flag option. Tomer Maimon (1): arm: npcm: enable L2 cache in NPCM7xx architecture arch/arm/mach-npcm/npcm7xx.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.14.1
