[PATCH v10 5/8] i2c: octeon,thunderx: Move register offsets to struct

2016-06-15 Thread Jan Glauber 
The register offsets are different between Octeon and ThunderX so move
them into the algorithm struct and get rid of the define.

Signed-off-by: Jan Glauber 
---
 drivers/i2c/busses/i2c-cavium.c| 28 +--
 drivers/i2c/busses/i2c-cavium.h| 35 +-
 drivers/i2c/busses/i2c-octeon-core.c   |  4 
 drivers/i2c/busses/i2c-thunderx-core.c |  4 
 4 files changed, 40 insertions(+), 31 deletions(-)

diff --git a/drivers/i2c/busses/i2c-cavium.c b/drivers/i2c/busses/i2c-cavium.c
index 3e4dd64..56b23c2 100644
--- a/drivers/i2c/busses/i2c-cavium.c
+++ b/drivers/i2c/busses/i2c-cavium.c
@@ -99,7 +99,7 @@ static int octeon_i2c_wait(struct octeon_i2c *i2c)
 
 static bool octeon_i2c_hlc_test_valid(struct octeon_i2c *i2c)
 {
-   return (__raw_readq(i2c->twsi_base + SW_TWSI) & SW_TWSI_V) == 0;
+   return (__raw_readq(i2c->twsi_base + SW_TWSI(i2c)) & SW_TWSI_V) == 0;
 }
 
 static bool octeon_i2c_hlc_test_ready(struct octeon_i2c *i2c, bool *first)
@@ -446,12 +446,12 @@ static int octeon_i2c_hlc_read(struct octeon_i2c *i2c, 
struct i2c_msg *msgs)
else
cmd |= SW_TWSI_OP_7;
 
-   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI);
+   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
ret = octeon_i2c_hlc_wait(i2c);
if (ret)
goto err;
 
-   cmd = __raw_readq(i2c->twsi_base + SW_TWSI);
+   cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
if ((cmd & SW_TWSI_R) == 0)
return -EAGAIN;
 
@@ -459,7 +459,7 @@ static int octeon_i2c_hlc_read(struct octeon_i2c *i2c, 
struct i2c_msg *msgs)
msgs[0].buf[j] = (cmd >> (8 * i)) & 0xff;
 
if (msgs[0].len > 4) {
-   cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT);
+   cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT(i2c));
for (i = 0; i  < msgs[0].len - 4 && i < 4; i++, j--)
msgs[0].buf[j] = (cmd >> (8 * i)) & 0xff;
}
@@ -496,15 +496,15 @@ static int octeon_i2c_hlc_write(struct octeon_i2c *i2c, 
struct i2c_msg *msgs)
 
for (i = 0; i < msgs[0].len - 4 && i < 4; i++, j--)
ext |= (u64)msgs[0].buf[j] << (8 * i);
-   octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT);
+   octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
}
 
-   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI);
+   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
ret = octeon_i2c_hlc_wait(i2c);
if (ret)
goto err;
 
-   cmd = __raw_readq(i2c->twsi_base + SW_TWSI);
+   cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
if ((cmd & SW_TWSI_R) == 0)
return -EAGAIN;
 
@@ -539,19 +539,19 @@ static int octeon_i2c_hlc_comp_read(struct octeon_i2c 
*i2c, struct i2c_msg *msgs
cmd |= SW_TWSI_EIA;
ext = (u64)msgs[0].buf[0] << SW_TWSI_IA_SHIFT;
cmd |= (u64)msgs[0].buf[1] << SW_TWSI_IA_SHIFT;
-   octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT);
+   octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
} else {
cmd |= (u64)msgs[0].buf[0] << SW_TWSI_IA_SHIFT;
}
 
octeon_i2c_hlc_int_clear(i2c);
-   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI);
+   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
 
ret = octeon_i2c_hlc_wait(i2c);
if (ret)
goto err;
 
-   cmd = __raw_readq(i2c->twsi_base + SW_TWSI);
+   cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
if ((cmd & SW_TWSI_R) == 0)
return -EAGAIN;
 
@@ -559,7 +559,7 @@ static int octeon_i2c_hlc_comp_read(struct octeon_i2c *i2c, 
struct i2c_msg *msgs
msgs[1].buf[j] = (cmd >> (8 * i)) & 0xff;
 
if (msgs[1].len > 4) {
-   cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT);
+   cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT(i2c));
for (i = 0; i  < msgs[1].len - 4 && i < 4; i++, j--)
msgs[1].buf[j] = (cmd >> (8 * i)) & 0xff;
}
@@ -606,16 +606,16 @@ static int octeon_i2c_hlc_comp_write(struct octeon_i2c 
*i2c, struct i2c_msg *msg
set_ext = true;
}
if (set_ext)
-   octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT);
+   octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
 
octeon_i2c_hlc_int_clear(i2c);
-   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI);
+   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
 
ret = octeon_i2c_hlc_wait(i2c);
if (ret)
goto err;
 
-   cmd = __raw_readq(i2c->twsi_base + SW_TWSI);
+   cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));

[PATCH v10 5/8] i2c: octeon,thunderx: Move register offsets to struct

2016-06-15 Thread Jan Glauber 
The register offsets are different between Octeon and ThunderX so move
them into the algorithm struct and get rid of the define.

Signed-off-by: Jan Glauber 
---
 drivers/i2c/busses/i2c-cavium.c| 28 +--
 drivers/i2c/busses/i2c-cavium.h| 35 +-
 drivers/i2c/busses/i2c-octeon-core.c   |  4 
 drivers/i2c/busses/i2c-thunderx-core.c |  4 
 4 files changed, 40 insertions(+), 31 deletions(-)

diff --git a/drivers/i2c/busses/i2c-cavium.c b/drivers/i2c/busses/i2c-cavium.c
index 3e4dd64..56b23c2 100644
--- a/drivers/i2c/busses/i2c-cavium.c
+++ b/drivers/i2c/busses/i2c-cavium.c
@@ -99,7 +99,7 @@ static int octeon_i2c_wait(struct octeon_i2c *i2c)
 
 static bool octeon_i2c_hlc_test_valid(struct octeon_i2c *i2c)
 {
-   return (__raw_readq(i2c->twsi_base + SW_TWSI) & SW_TWSI_V) == 0;
+   return (__raw_readq(i2c->twsi_base + SW_TWSI(i2c)) & SW_TWSI_V) == 0;
 }
 
 static bool octeon_i2c_hlc_test_ready(struct octeon_i2c *i2c, bool *first)
@@ -446,12 +446,12 @@ static int octeon_i2c_hlc_read(struct octeon_i2c *i2c, 
struct i2c_msg *msgs)
else
cmd |= SW_TWSI_OP_7;
 
-   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI);
+   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
ret = octeon_i2c_hlc_wait(i2c);
if (ret)
goto err;
 
-   cmd = __raw_readq(i2c->twsi_base + SW_TWSI);
+   cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
if ((cmd & SW_TWSI_R) == 0)
return -EAGAIN;
 
@@ -459,7 +459,7 @@ static int octeon_i2c_hlc_read(struct octeon_i2c *i2c, 
struct i2c_msg *msgs)
msgs[0].buf[j] = (cmd >> (8 * i)) & 0xff;
 
if (msgs[0].len > 4) {
-   cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT);
+   cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT(i2c));
for (i = 0; i  < msgs[0].len - 4 && i < 4; i++, j--)
msgs[0].buf[j] = (cmd >> (8 * i)) & 0xff;
}
@@ -496,15 +496,15 @@ static int octeon_i2c_hlc_write(struct octeon_i2c *i2c, 
struct i2c_msg *msgs)
 
for (i = 0; i < msgs[0].len - 4 && i < 4; i++, j--)
ext |= (u64)msgs[0].buf[j] << (8 * i);
-   octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT);
+   octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
}
 
-   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI);
+   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
ret = octeon_i2c_hlc_wait(i2c);
if (ret)
goto err;
 
-   cmd = __raw_readq(i2c->twsi_base + SW_TWSI);
+   cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
if ((cmd & SW_TWSI_R) == 0)
return -EAGAIN;
 
@@ -539,19 +539,19 @@ static int octeon_i2c_hlc_comp_read(struct octeon_i2c 
*i2c, struct i2c_msg *msgs
cmd |= SW_TWSI_EIA;
ext = (u64)msgs[0].buf[0] << SW_TWSI_IA_SHIFT;
cmd |= (u64)msgs[0].buf[1] << SW_TWSI_IA_SHIFT;
-   octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT);
+   octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
} else {
cmd |= (u64)msgs[0].buf[0] << SW_TWSI_IA_SHIFT;
}
 
octeon_i2c_hlc_int_clear(i2c);
-   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI);
+   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
 
ret = octeon_i2c_hlc_wait(i2c);
if (ret)
goto err;
 
-   cmd = __raw_readq(i2c->twsi_base + SW_TWSI);
+   cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
if ((cmd & SW_TWSI_R) == 0)
return -EAGAIN;
 
@@ -559,7 +559,7 @@ static int octeon_i2c_hlc_comp_read(struct octeon_i2c *i2c, 
struct i2c_msg *msgs
msgs[1].buf[j] = (cmd >> (8 * i)) & 0xff;
 
if (msgs[1].len > 4) {
-   cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT);
+   cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT(i2c));
for (i = 0; i  < msgs[1].len - 4 && i < 4; i++, j--)
msgs[1].buf[j] = (cmd >> (8 * i)) & 0xff;
}
@@ -606,16 +606,16 @@ static int octeon_i2c_hlc_comp_write(struct octeon_i2c 
*i2c, struct i2c_msg *msg
set_ext = true;
}
if (set_ext)
-   octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT);
+   octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
 
octeon_i2c_hlc_int_clear(i2c);
-   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI);
+   octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
 
ret = octeon_i2c_hlc_wait(i2c);
if (ret)
goto err;
 
-   cmd = __raw_readq(i2c->twsi_base + SW_TWSI);
+   cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
if ((cmd &