From: Nan Li
The IP of eMMC controller in AXG is similiar to Meson-GX series.
Here we add the initial support of the HS200 mode with
clock running at 166MHz (to be safe), since we found some eMMC chip
fail to run at 200MHz due to tunning phase error.
Signed-off-by: Nan Li
Signed-off-by: Yixun Lan
---
Hi Kevin
Please note this patch actually depend on the eMMC driver here [0].
Still a few problem to solve, to improve the tuning phase driver to make
the clock running at 200MHz, and to further support the HS400 mode.
Anyway, this patch itself is quite independent.
changes since v1 at [1]:
- fix missing gpio dt-bindings header
[0] http://lkml.kernel.org/r/20180403100652.41056-1-yixun@amlogic.com
[1] http://lkml.kernel.org/r/20180403102651.60340-1-yixun@amlogic.com
---
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 58 ++
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 82 ++
2 files changed, 140 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
index 57eedced5a51..f67d4e47e641 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
@@ -15,6 +15,44 @@
serial0 = &uart_AO;
serial1 = &uart_A;
};
+
+ vddio_boot: regulator-vddio_boot {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_BOOT";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ };
+
+ vddao_3v3: regulator-vddao_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ vddio_ao18: regulator-vddio_ao18 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_AO18";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
+ };
};
ðmac {
@@ -47,3 +85,23 @@
pinctrl-0 = <&i2c1_z_pins>;
pinctrl-names = "default";
};
+
+/* emmc storage */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <18000>;
+ non-removable;
+ disable-wp;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vddio_boot>;
+};
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index b58808eb3cc8..cb70778c323c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -7,6 +7,7 @@
#include
#include
#include
+#include
/ {
compatible = "amlogic,meson-axg";
@@ -113,6 +114,36 @@
#size-cells = <2>;
ranges;
+ apb: apb@ffe0 {
+ compatible = "simple-bus";
+ reg = <0x0 0xffe0 0x0 0x20>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xffe0 0x0 0x20>;
+
+ sd_emmc_b: sd@5000 {
+ compatible = "amlogic,meson-axg-mmc";
+ reg = <0x0 0x5000 0x0 0x2000>;
+ interrupts = ;
+ status = "disabled";
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_CLK0>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "clkin0", "clkin1";
+ };
+
+ sd_emmc_c: mmc@7000 {
+ compatible = "amlogic,meson-axg-mmc";
+ reg = <0x0 0x7000 0x0 0x2000>;
+ interrupts = ;
+ status = "disabled";
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_CLK0>,
+
