Re: [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718

[Shawn Guo]

On Fri, Dec 02, 2016 at 01:52:36PM +0800, Baoyou Xie wrote:
> This patch adds the CPU clock phandle in CPU's node
> and uses operating-points-v2 to register operating points.
> 
> So it can be used by cpufreq-dt driver.
> 
> Signed-off-by: Baoyou Xie 

Applied, thanks.

Re: [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718

[Shawn Guo]

On Fri, Dec 02, 2016 at 01:52:36PM +0800, Baoyou Xie wrote:
> This patch adds the CPU clock phandle in CPU's node
> and uses operating-points-v2 to register operating points.
> 
> So it can be used by cpufreq-dt driver.
> 
> Signed-off-by: Baoyou Xie 

Applied, thanks.

Re: [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718

[Jun Nie]

2016-12-02 14:00 GMT+08:00 Viresh Kumar :
> On 02-12-16, 13:58, Baoyou Xie wrote:
>> + Viresh, the author of the bindings.
>>
>> On 2 December 2016 at 13:52, Baoyou Xie  wrote:
>>
>> > This patch adds the CPU clock phandle in CPU's node
>> > and uses operating-points-v2 to register operating points.
>> >
>> > So it can be used by cpufreq-dt driver.
>> >
>> > Signed-off-by: Baoyou Xie 
>> > ---
>> >  arch/arm64/boot/dts/zte/zx296718.dtsi | 39 ++
>> > +
>> >  1 file changed, 39 insertions(+)

Reviewed-by: Jun Nie 

>
> Acked-by: Viresh Kumar 
>
> --
> viresh

Re: [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718

[Jun Nie]

2016-12-02 14:00 GMT+08:00 Viresh Kumar :
> On 02-12-16, 13:58, Baoyou Xie wrote:
>> + Viresh, the author of the bindings.
>>
>> On 2 December 2016 at 13:52, Baoyou Xie  wrote:
>>
>> > This patch adds the CPU clock phandle in CPU's node
>> > and uses operating-points-v2 to register operating points.
>> >
>> > So it can be used by cpufreq-dt driver.
>> >
>> > Signed-off-by: Baoyou Xie 
>> > ---
>> >  arch/arm64/boot/dts/zte/zx296718.dtsi | 39 ++
>> > +
>> >  1 file changed, 39 insertions(+)

Reviewed-by: Jun Nie 

>
> Acked-by: Viresh Kumar 
>
> --
> viresh

Re: [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718

[Viresh Kumar]

On 02-12-16, 13:58, Baoyou Xie wrote:
> + Viresh, the author of the bindings.
> 
> On 2 December 2016 at 13:52, Baoyou Xie  wrote:
> 
> > This patch adds the CPU clock phandle in CPU's node
> > and uses operating-points-v2 to register operating points.
> >
> > So it can be used by cpufreq-dt driver.
> >
> > Signed-off-by: Baoyou Xie 
> > ---
> >  arch/arm64/boot/dts/zte/zx296718.dtsi | 39 ++
> > +
> >  1 file changed, 39 insertions(+)

Acked-by: Viresh Kumar 

-- 
viresh

Re: [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718

[Viresh Kumar]

On 02-12-16, 13:58, Baoyou Xie wrote:
> + Viresh, the author of the bindings.
> 
> On 2 December 2016 at 13:52, Baoyou Xie  wrote:
> 
> > This patch adds the CPU clock phandle in CPU's node
> > and uses operating-points-v2 to register operating points.
> >
> > So it can be used by cpufreq-dt driver.
> >
> > Signed-off-by: Baoyou Xie 
> > ---
> >  arch/arm64/boot/dts/zte/zx296718.dtsi | 39 ++
> > +
> >  1 file changed, 39 insertions(+)

Acked-by: Viresh Kumar 

-- 
viresh

[PATCH v2] arm64: dts: zx: support cpu-freq for zx296718

[Baoyou Xie]

This patch adds the CPU clock phandle in CPU's node
and uses operating-points-v2 to register operating points.

So it can be used by cpufreq-dt driver.

Signed-off-by: Baoyou Xie 
---
 arch/arm64/boot/dts/zte/zx296718.dtsi | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi 
b/arch/arm64/boot/dts/zte/zx296718.dtsi
index 7a1aed7..b44d1d1 100644
--- a/arch/arm64/boot/dts/zte/zx296718.dtsi
+++ b/arch/arm64/boot/dts/zte/zx296718.dtsi
@@ -44,6 +44,7 @@
 #include 
 #include 
 #include 
+#include 
 
 / {
compatible = "zte,zx296718";
@@ -81,6 +82,8 @@
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
+   clocks = < A53_GATE>;
+   operating-points-v2 = <_opp>;
};
 
cpu1: cpu@1 {
@@ -88,6 +91,8 @@
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
+   clocks = < A53_GATE>;
+   operating-points-v2 = <_opp>;
};
 
cpu2: cpu@2 {
@@ -95,6 +100,8 @@
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
+   clocks = < A53_GATE>;
+   operating-points-v2 = <_opp>;
};
 
cpu3: cpu@3 {
@@ -102,6 +109,38 @@
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
+   clocks = < A53_GATE>;
+   operating-points-v2 = <_opp>;
+   };
+   };
+
+   cluster0_opp: opp-table0 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@5 {
+   opp-hz = /bits/ 64 <5>;
+   clock-latency-ns = <50>;
+   };
+
+   opp@64800 {
+   opp-hz = /bits/ 64 <64800>;
+   clock-latency-ns = <50>;
+   };
+
+   opp@8 {
+   opp-hz = /bits/ 64 <8>;
+   clock-latency-ns = <50>;
+   };
+
+   opp@10 {
+   opp-hz = /bits/ 64 <10>;
+   clock-latency-ns = <50>;
+   };
+
+   opp@118800 {
+   opp-hz = /bits/ 64 <118800>;
+   clock-latency-ns = <50>;
};
};
 
-- 
2.7.4

[PATCH v2] arm64: dts: zx: support cpu-freq for zx296718

[Baoyou Xie]

This patch adds the CPU clock phandle in CPU's node
and uses operating-points-v2 to register operating points.

So it can be used by cpufreq-dt driver.

Signed-off-by: Baoyou Xie 
---
 arch/arm64/boot/dts/zte/zx296718.dtsi | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi 
b/arch/arm64/boot/dts/zte/zx296718.dtsi
index 7a1aed7..b44d1d1 100644
--- a/arch/arm64/boot/dts/zte/zx296718.dtsi
+++ b/arch/arm64/boot/dts/zte/zx296718.dtsi
@@ -44,6 +44,7 @@
 #include 
 #include 
 #include 
+#include 
 
 / {
compatible = "zte,zx296718";
@@ -81,6 +82,8 @@
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
+   clocks = < A53_GATE>;
+   operating-points-v2 = <_opp>;
};
 
cpu1: cpu@1 {
@@ -88,6 +91,8 @@
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
+   clocks = < A53_GATE>;
+   operating-points-v2 = <_opp>;
};
 
cpu2: cpu@2 {
@@ -95,6 +100,8 @@
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
+   clocks = < A53_GATE>;
+   operating-points-v2 = <_opp>;
};
 
cpu3: cpu@3 {
@@ -102,6 +109,38 @@
compatible = "arm,cortex-a53","arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
+   clocks = < A53_GATE>;
+   operating-points-v2 = <_opp>;
+   };
+   };
+
+   cluster0_opp: opp-table0 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@5 {
+   opp-hz = /bits/ 64 <5>;
+   clock-latency-ns = <50>;
+   };
+
+   opp@64800 {
+   opp-hz = /bits/ 64 <64800>;
+   clock-latency-ns = <50>;
+   };
+
+   opp@8 {
+   opp-hz = /bits/ 64 <8>;
+   clock-latency-ns = <50>;
+   };
+
+   opp@10 {
+   opp-hz = /bits/ 64 <10>;
+   clock-latency-ns = <50>;
+   };
+
+   opp@118800 {
+   opp-hz = /bits/ 64 <118800>;
+   clock-latency-ns = <50>;
};
};
 
-- 
2.7.4