Re: [PATCH v2 1/3] dt-bindings: display: display-timing: Add property to configure sync drive edge

2016-09-29 Thread Tomi Valkeinen
On 22/09/16 13:35, Peter Ujfalusi wrote:
> There are display panels which demands that the sync signal is driven on
> different edge than the pixel data.
> With the syncclk-active property we can specify the clk edge to be used to
> drive the sync signal. When the property is missing it indicates that the
> sync is driven on the same edge as the pixel data.
> 
> Signed-off-by: Peter Ujfalusi 
> CC: Rob Herring 
> CC: Mark Rutland 
> CC: devicet...@vger.kernel.org
> ---
>  .../devicetree/bindings/display/panel/display-timing.txt  | 8 
> 
>  1 file changed, 8 insertions(+)
> 
> diff --git 
> a/Documentation/devicetree/bindings/display/panel/display-timing.txt 
> b/Documentation/devicetree/bindings/display/panel/display-timing.txt
> index e1d4a0b59612..81a75893d1b8 100644
> --- a/Documentation/devicetree/bindings/display/panel/display-timing.txt
> +++ b/Documentation/devicetree/bindings/display/panel/display-timing.txt
> @@ -32,6 +32,14 @@ optional properties:
>   - active low  = drive pixel data on falling edge/
>   sample data on rising edge
>   - ignored = ignored
> + - syncclk-active: with
> + - active high = drive sync on rising edge/
> + sample sync on falling edge of pixel
> + clock
> + - active low  = drive sync on falling edge/
> + sample sync on rising edge of pixel
> + clock
> + - omitted = same configuration as pixelclk-active

I wonder if the "sample sync on..." should be left out here. It makes
sense for the pixel data, but for sync... Do the panels "sample" it, or
do they trigger on rising/falling edge?

Well, maybe that's a bit on the nitpick side, so:

Reviewed-by: Tomi Valkeinen 

 Tomi



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Re: [PATCH v2 1/3] dt-bindings: display: display-timing: Add property to configure sync drive edge

2016-09-29 Thread Tomi Valkeinen
On 22/09/16 13:35, Peter Ujfalusi wrote:
> There are display panels which demands that the sync signal is driven on
> different edge than the pixel data.
> With the syncclk-active property we can specify the clk edge to be used to
> drive the sync signal. When the property is missing it indicates that the
> sync is driven on the same edge as the pixel data.
> 
> Signed-off-by: Peter Ujfalusi 
> CC: Rob Herring 
> CC: Mark Rutland 
> CC: devicet...@vger.kernel.org
> ---
>  .../devicetree/bindings/display/panel/display-timing.txt  | 8 
> 
>  1 file changed, 8 insertions(+)
> 
> diff --git 
> a/Documentation/devicetree/bindings/display/panel/display-timing.txt 
> b/Documentation/devicetree/bindings/display/panel/display-timing.txt
> index e1d4a0b59612..81a75893d1b8 100644
> --- a/Documentation/devicetree/bindings/display/panel/display-timing.txt
> +++ b/Documentation/devicetree/bindings/display/panel/display-timing.txt
> @@ -32,6 +32,14 @@ optional properties:
>   - active low  = drive pixel data on falling edge/
>   sample data on rising edge
>   - ignored = ignored
> + - syncclk-active: with
> + - active high = drive sync on rising edge/
> + sample sync on falling edge of pixel
> + clock
> + - active low  = drive sync on falling edge/
> + sample sync on rising edge of pixel
> + clock
> + - omitted = same configuration as pixelclk-active

I wonder if the "sample sync on..." should be left out here. It makes
sense for the pixel data, but for sync... Do the panels "sample" it, or
do they trigger on rising/falling edge?

Well, maybe that's a bit on the nitpick side, so:

Reviewed-by: Tomi Valkeinen 

 Tomi



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Description: OpenPGP digital signature


Re: [PATCH v2 1/3] dt-bindings: display: display-timing: Add property to configure sync drive edge

2016-09-23 Thread Rob Herring
On Thu, Sep 22, 2016 at 01:35:24PM +0300, Peter Ujfalusi wrote:
> There are display panels which demands that the sync signal is driven on
> different edge than the pixel data.
> With the syncclk-active property we can specify the clk edge to be used to
> drive the sync signal. When the property is missing it indicates that the
> sync is driven on the same edge as the pixel data.
> 
> Signed-off-by: Peter Ujfalusi 
> CC: Rob Herring 
> CC: Mark Rutland 
> CC: devicet...@vger.kernel.org
> ---
>  .../devicetree/bindings/display/panel/display-timing.txt  | 8 
> 
>  1 file changed, 8 insertions(+)

Acked-by: Rob Herring 


Re: [PATCH v2 1/3] dt-bindings: display: display-timing: Add property to configure sync drive edge

2016-09-23 Thread Rob Herring
On Thu, Sep 22, 2016 at 01:35:24PM +0300, Peter Ujfalusi wrote:
> There are display panels which demands that the sync signal is driven on
> different edge than the pixel data.
> With the syncclk-active property we can specify the clk edge to be used to
> drive the sync signal. When the property is missing it indicates that the
> sync is driven on the same edge as the pixel data.
> 
> Signed-off-by: Peter Ujfalusi 
> CC: Rob Herring 
> CC: Mark Rutland 
> CC: devicet...@vger.kernel.org
> ---
>  .../devicetree/bindings/display/panel/display-timing.txt  | 8 
> 
>  1 file changed, 8 insertions(+)

Acked-by: Rob Herring 


[PATCH v2 1/3] dt-bindings: display: display-timing: Add property to configure sync drive edge

2016-09-22 Thread Peter Ujfalusi
There are display panels which demands that the sync signal is driven on
different edge than the pixel data.
With the syncclk-active property we can specify the clk edge to be used to
drive the sync signal. When the property is missing it indicates that the
sync is driven on the same edge as the pixel data.

Signed-off-by: Peter Ujfalusi 
CC: Rob Herring 
CC: Mark Rutland 
CC: devicet...@vger.kernel.org
---
 .../devicetree/bindings/display/panel/display-timing.txt  | 8 
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/display-timing.txt 
b/Documentation/devicetree/bindings/display/panel/display-timing.txt
index e1d4a0b59612..81a75893d1b8 100644
--- a/Documentation/devicetree/bindings/display/panel/display-timing.txt
+++ b/Documentation/devicetree/bindings/display/panel/display-timing.txt
@@ -32,6 +32,14 @@ optional properties:
- active low  = drive pixel data on falling edge/
sample data on rising edge
- ignored = ignored
+ - syncclk-active: with
+   - active high = drive sync on rising edge/
+   sample sync on falling edge of pixel
+   clock
+   - active low  = drive sync on falling edge/
+   sample sync on rising edge of pixel
+   clock
+   - omitted = same configuration as pixelclk-active
  - interlaced (bool): boolean to enable interlaced mode
  - doublescan (bool): boolean to enable doublescan mode
  - doubleclk (bool): boolean to enable doubleclock mode
-- 
2.10.0



[PATCH v2 1/3] dt-bindings: display: display-timing: Add property to configure sync drive edge

2016-09-22 Thread Peter Ujfalusi
There are display panels which demands that the sync signal is driven on
different edge than the pixel data.
With the syncclk-active property we can specify the clk edge to be used to
drive the sync signal. When the property is missing it indicates that the
sync is driven on the same edge as the pixel data.

Signed-off-by: Peter Ujfalusi 
CC: Rob Herring 
CC: Mark Rutland 
CC: devicet...@vger.kernel.org
---
 .../devicetree/bindings/display/panel/display-timing.txt  | 8 
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/display-timing.txt 
b/Documentation/devicetree/bindings/display/panel/display-timing.txt
index e1d4a0b59612..81a75893d1b8 100644
--- a/Documentation/devicetree/bindings/display/panel/display-timing.txt
+++ b/Documentation/devicetree/bindings/display/panel/display-timing.txt
@@ -32,6 +32,14 @@ optional properties:
- active low  = drive pixel data on falling edge/
sample data on rising edge
- ignored = ignored
+ - syncclk-active: with
+   - active high = drive sync on rising edge/
+   sample sync on falling edge of pixel
+   clock
+   - active low  = drive sync on falling edge/
+   sample sync on rising edge of pixel
+   clock
+   - omitted = same configuration as pixelclk-active
  - interlaced (bool): boolean to enable interlaced mode
  - doublescan (bool): boolean to enable doublescan mode
  - doubleclk (bool): boolean to enable doubleclock mode
-- 
2.10.0