Re: [PATCH v2 10/12] ARM: dts: STi: Add fake reg property for clocks

Hi Rob On 02/12/2018 04:22 PM, Rob Herring wrote: > On Mon, Feb 12, 2018 at 8:43 AM, wrote: >> From: Patrice Chotard >> >> For all clock's element inside SoC, add a fake reg property, >> this allows to fix the following warnings when compiling >>

Re: [PATCH v2 10/12] ARM: dts: STi: Add fake reg property for clocks

Hi Rob On 02/12/2018 04:22 PM, Rob Herring wrote: > On Mon, Feb 12, 2018 at 8:43 AM, wrote: >> From: Patrice Chotard >> >> For all clock's element inside SoC, add a fake reg property, >> this allows to fix the following warnings when compiling >> dtb with W=1 option : >> >>

Re: [PATCH v2 10/12] ARM: dts: STi: Add fake reg property for clocks

On Mon, Feb 12, 2018 at 8:43 AM, wrote: > From: Patrice Chotard > > For all clock's element inside SoC, add a fake reg property, > this allows to fix the following warnings when compiling > dtb with W=1 option : > >

Re: [PATCH v2 10/12] ARM: dts: STi: Add fake reg property for clocks

On Mon, Feb 12, 2018 at 8:43 AM, wrote: > From: Patrice Chotard > > For all clock's element inside SoC, add a fake reg property, > this allows to fix the following warnings when compiling > dtb with W=1 option : > > arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg): > Node

[PATCH v2 10/12] ARM: dts: STi: Add fake reg property for clocks

From: Patrice Chotard For all clock's element inside SoC, add a fake reg property, this allows to fix the following warnings when compiling dtb with W=1 option : arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg): Node /clocks/clk-m-a9-periphs missing or empty

[PATCH v2 10/12] ARM: dts: STi: Add fake reg property for clocks

From: Patrice Chotard For all clock's element inside SoC, add a fake reg property, this allows to fix the following warnings when compiling dtb with W=1 option : arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg): Node /clocks/clk-m-a9-periphs missing or empty reg/ranges property