Re: [PATCH v2 11/15] clk: sunxi-ng: Add N-M-factor clock support

[Maxime Ripard]

Hi,

On Thu, Jun 09, 2016 at 09:41:01AM +0200, Jean-Francois Moine wrote:
> On Tue,  7 Jun 2016 22:41:50 +0200
> Maxime Ripard  wrote:
> 
> > Introduce support for clocks that multiply and divide using linear factors.
> > 
> > Signed-off-by: Maxime Ripard 
> > 
> > ---
> > Changes from v1:
> >   - Fixed the maximums for both factors passed to the rational factor
> > computation.
> > ---
> >  drivers/clk/sunxi-ng/Makefile |   1 +
> >  drivers/clk/sunxi-ng/ccu_nm.c | 114 
> > ++
> >  drivers/clk/sunxi-ng/ccu_nm.h |  95 +++
> >  3 files changed, 210 insertions(+)
> >  create mode 100644 drivers/clk/sunxi-ng/ccu_nm.c
> >  create mode 100644 drivers/clk/sunxi-ng/ccu_nm.h
> > 
> > diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile
> > index a201fad6b11d..5c7ae1ad1082 100644
> > --- a/drivers/clk/sunxi-ng/Makefile
> > +++ b/drivers/clk/sunxi-ng/Makefile
> > @@ -9,4 +9,5 @@ obj-y += ccu_gate.o
> >  obj-y += ccu_mp.o
> >  obj-y += ccu_mux.o
> >  obj-y += ccu_nk.o
> > +obj-y += ccu_nm.o
> >  obj-y += ccu_phase.o
> > diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
> > new file mode 100644
> > index ..e35ddd8eec8b
> > --- /dev/null
> > +++ b/drivers/clk/sunxi-ng/ccu_nm.c
> > @@ -0,0 +1,114 @@
> > +/*
> > + * Copyright (C) 2016 Maxime Ripard
> > + * Maxime Ripard 
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + */
> > +
> > +#include 
> > +#include 
> > +
> > +#include "ccu_frac.h"
> > +#include "ccu_gate.h"
> > +#include "ccu_nm.h"
>   [snip]
> > +static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw,
> > +   unsigned long parent_rate)
> > +{
> > +   struct ccu_nm *nm = hw_to_ccu_nm(hw);
> > +   unsigned long n, m;
> > +   u32 reg;
> > +
> > +   if (ccu_frac_helper_is_enabled(>common, >frac))
> > +   return ccu_frac_helper_read_rate(>common, >frac);
> > +
> > +   reg = readl(nm->common.base + nm->common.reg);
> > +
> > +   n = reg >> nm->n.shift;
> > +   n &= (1 << nm->n.width) - 1;
> > +
> > +   m = reg >> nm->m.shift;
> > +   m &= (1 << nm->m.width) - 1;
> > +
> > +   return parent_rate * (n + 1) / (m + 1);
> 
> In the H3, 'm' is a pre-divider (audio and video PLLs):
> 
>   return parent_rate / (m + 1) * (n + 1);

That's true, but the "true" N-M clocks exist and are using this
formula (like the Audio PLL on A10's).

If (and when) that causes some rounding issues, we can always add
pre-divider support to N-Clocks that we are going to need anyway for
the older SoCs.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com


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Re: [PATCH v2 11/15] clk: sunxi-ng: Add N-M-factor clock support

[Maxime Ripard]

Hi,

On Thu, Jun 09, 2016 at 09:41:01AM +0200, Jean-Francois Moine wrote:
> On Tue,  7 Jun 2016 22:41:50 +0200
> Maxime Ripard  wrote:
> 
> > Introduce support for clocks that multiply and divide using linear factors.
> > 
> > Signed-off-by: Maxime Ripard 
> > 
> > ---
> > Changes from v1:
> >   - Fixed the maximums for both factors passed to the rational factor
> > computation.
> > ---
> >  drivers/clk/sunxi-ng/Makefile |   1 +
> >  drivers/clk/sunxi-ng/ccu_nm.c | 114 
> > ++
> >  drivers/clk/sunxi-ng/ccu_nm.h |  95 +++
> >  3 files changed, 210 insertions(+)
> >  create mode 100644 drivers/clk/sunxi-ng/ccu_nm.c
> >  create mode 100644 drivers/clk/sunxi-ng/ccu_nm.h
> > 
> > diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile
> > index a201fad6b11d..5c7ae1ad1082 100644
> > --- a/drivers/clk/sunxi-ng/Makefile
> > +++ b/drivers/clk/sunxi-ng/Makefile
> > @@ -9,4 +9,5 @@ obj-y += ccu_gate.o
> >  obj-y += ccu_mp.o
> >  obj-y += ccu_mux.o
> >  obj-y += ccu_nk.o
> > +obj-y += ccu_nm.o
> >  obj-y += ccu_phase.o
> > diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
> > new file mode 100644
> > index ..e35ddd8eec8b
> > --- /dev/null
> > +++ b/drivers/clk/sunxi-ng/ccu_nm.c
> > @@ -0,0 +1,114 @@
> > +/*
> > + * Copyright (C) 2016 Maxime Ripard
> > + * Maxime Ripard 
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + */
> > +
> > +#include 
> > +#include 
> > +
> > +#include "ccu_frac.h"
> > +#include "ccu_gate.h"
> > +#include "ccu_nm.h"
>   [snip]
> > +static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw,
> > +   unsigned long parent_rate)
> > +{
> > +   struct ccu_nm *nm = hw_to_ccu_nm(hw);
> > +   unsigned long n, m;
> > +   u32 reg;
> > +
> > +   if (ccu_frac_helper_is_enabled(>common, >frac))
> > +   return ccu_frac_helper_read_rate(>common, >frac);
> > +
> > +   reg = readl(nm->common.base + nm->common.reg);
> > +
> > +   n = reg >> nm->n.shift;
> > +   n &= (1 << nm->n.width) - 1;
> > +
> > +   m = reg >> nm->m.shift;
> > +   m &= (1 << nm->m.width) - 1;
> > +
> > +   return parent_rate * (n + 1) / (m + 1);
> 
> In the H3, 'm' is a pre-divider (audio and video PLLs):
> 
>   return parent_rate / (m + 1) * (n + 1);

That's true, but the "true" N-M clocks exist and are using this
formula (like the Audio PLL on A10's).

If (and when) that causes some rounding issues, we can always add
pre-divider support to N-Clocks that we are going to need anyway for
the older SoCs.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com


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Description: PGP signature

Re: [PATCH v2 11/15] clk: sunxi-ng: Add N-M-factor clock support

[Jean-Francois Moine]

On Tue,  7 Jun 2016 22:41:50 +0200
Maxime Ripard  wrote:

> Introduce support for clocks that multiply and divide using linear factors.
> 
> Signed-off-by: Maxime Ripard 
> 
> ---
> Changes from v1:
>   - Fixed the maximums for both factors passed to the rational factor
> computation.
> ---
>  drivers/clk/sunxi-ng/Makefile |   1 +
>  drivers/clk/sunxi-ng/ccu_nm.c | 114 
> ++
>  drivers/clk/sunxi-ng/ccu_nm.h |  95 +++
>  3 files changed, 210 insertions(+)
>  create mode 100644 drivers/clk/sunxi-ng/ccu_nm.c
>  create mode 100644 drivers/clk/sunxi-ng/ccu_nm.h
> 
> diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile
> index a201fad6b11d..5c7ae1ad1082 100644
> --- a/drivers/clk/sunxi-ng/Makefile
> +++ b/drivers/clk/sunxi-ng/Makefile
> @@ -9,4 +9,5 @@ obj-y += ccu_gate.o
>  obj-y += ccu_mp.o
>  obj-y += ccu_mux.o
>  obj-y += ccu_nk.o
> +obj-y += ccu_nm.o
>  obj-y += ccu_phase.o
> diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
> new file mode 100644
> index ..e35ddd8eec8b
> --- /dev/null
> +++ b/drivers/clk/sunxi-ng/ccu_nm.c
> @@ -0,0 +1,114 @@
> +/*
> + * Copyright (C) 2016 Maxime Ripard
> + * Maxime Ripard 
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
> +
> +#include 
> +#include 
> +
> +#include "ccu_frac.h"
> +#include "ccu_gate.h"
> +#include "ccu_nm.h"
[snip]
> +static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw,
> + unsigned long parent_rate)
> +{
> + struct ccu_nm *nm = hw_to_ccu_nm(hw);
> + unsigned long n, m;
> + u32 reg;
> +
> + if (ccu_frac_helper_is_enabled(>common, >frac))
> + return ccu_frac_helper_read_rate(>common, >frac);
> +
> + reg = readl(nm->common.base + nm->common.reg);
> +
> + n = reg >> nm->n.shift;
> + n &= (1 << nm->n.width) - 1;
> +
> + m = reg >> nm->m.shift;
> + m &= (1 << nm->m.width) - 1;
> +
> + return parent_rate * (n + 1) / (m + 1);

In the H3, 'm' is a pre-divider (audio and video PLLs):

return parent_rate / (m + 1) * (n + 1);

> +}
> +
> +static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
> +   unsigned long *parent_rate)
> +{
> + struct ccu_nm *nm = hw_to_ccu_nm(hw);
> + unsigned long n, m;
> +
> + rational_best_approximation(rate, *parent_rate,
> + 1 << nm->n.width, 1 << nm->m.width,
> + , );
> +
> + return *parent_rate * n / m;

Same here.

> +}
> +
> +static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
> +unsigned long parent_rate)
> +{
[snip]

-- 
Ken ar c'hentañ | ** Breizh ha Linux atav! **
Jef |   http://moinejf.free.fr/

Re: [PATCH v2 11/15] clk: sunxi-ng: Add N-M-factor clock support

[Jean-Francois Moine]

On Tue,  7 Jun 2016 22:41:50 +0200
Maxime Ripard  wrote:

> Introduce support for clocks that multiply and divide using linear factors.
> 
> Signed-off-by: Maxime Ripard 
> 
> ---
> Changes from v1:
>   - Fixed the maximums for both factors passed to the rational factor
> computation.
> ---
>  drivers/clk/sunxi-ng/Makefile |   1 +
>  drivers/clk/sunxi-ng/ccu_nm.c | 114 
> ++
>  drivers/clk/sunxi-ng/ccu_nm.h |  95 +++
>  3 files changed, 210 insertions(+)
>  create mode 100644 drivers/clk/sunxi-ng/ccu_nm.c
>  create mode 100644 drivers/clk/sunxi-ng/ccu_nm.h
> 
> diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile
> index a201fad6b11d..5c7ae1ad1082 100644
> --- a/drivers/clk/sunxi-ng/Makefile
> +++ b/drivers/clk/sunxi-ng/Makefile
> @@ -9,4 +9,5 @@ obj-y += ccu_gate.o
>  obj-y += ccu_mp.o
>  obj-y += ccu_mux.o
>  obj-y += ccu_nk.o
> +obj-y += ccu_nm.o
>  obj-y += ccu_phase.o
> diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
> new file mode 100644
> index ..e35ddd8eec8b
> --- /dev/null
> +++ b/drivers/clk/sunxi-ng/ccu_nm.c
> @@ -0,0 +1,114 @@
> +/*
> + * Copyright (C) 2016 Maxime Ripard
> + * Maxime Ripard 
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
> +
> +#include 
> +#include 
> +
> +#include "ccu_frac.h"
> +#include "ccu_gate.h"
> +#include "ccu_nm.h"
[snip]
> +static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw,
> + unsigned long parent_rate)
> +{
> + struct ccu_nm *nm = hw_to_ccu_nm(hw);
> + unsigned long n, m;
> + u32 reg;
> +
> + if (ccu_frac_helper_is_enabled(>common, >frac))
> + return ccu_frac_helper_read_rate(>common, >frac);
> +
> + reg = readl(nm->common.base + nm->common.reg);
> +
> + n = reg >> nm->n.shift;
> + n &= (1 << nm->n.width) - 1;
> +
> + m = reg >> nm->m.shift;
> + m &= (1 << nm->m.width) - 1;
> +
> + return parent_rate * (n + 1) / (m + 1);

In the H3, 'm' is a pre-divider (audio and video PLLs):

return parent_rate / (m + 1) * (n + 1);

> +}
> +
> +static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
> +   unsigned long *parent_rate)
> +{
> + struct ccu_nm *nm = hw_to_ccu_nm(hw);
> + unsigned long n, m;
> +
> + rational_best_approximation(rate, *parent_rate,
> + 1 << nm->n.width, 1 << nm->m.width,
> + , );
> +
> + return *parent_rate * n / m;

Same here.

> +}
> +
> +static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
> +unsigned long parent_rate)
> +{
[snip]

-- 
Ken ar c'hentañ | ** Breizh ha Linux atav! **
Jef |   http://moinejf.free.fr/

[PATCH v2 11/15] clk: sunxi-ng: Add N-M-factor clock support

[Maxime Ripard]

Introduce support for clocks that multiply and divide using linear factors.

Signed-off-by: Maxime Ripard 

---
Changes from v1:
  - Fixed the maximums for both factors passed to the rational factor
computation.
---
 drivers/clk/sunxi-ng/Makefile |   1 +
 drivers/clk/sunxi-ng/ccu_nm.c | 114 ++
 drivers/clk/sunxi-ng/ccu_nm.h |  95 +++
 3 files changed, 210 insertions(+)
 create mode 100644 drivers/clk/sunxi-ng/ccu_nm.c
 create mode 100644 drivers/clk/sunxi-ng/ccu_nm.h

diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile
index a201fad6b11d..5c7ae1ad1082 100644
--- a/drivers/clk/sunxi-ng/Makefile
+++ b/drivers/clk/sunxi-ng/Makefile
@@ -9,4 +9,5 @@ obj-y += ccu_gate.o
 obj-y += ccu_mp.o
 obj-y += ccu_mux.o
 obj-y += ccu_nk.o
+obj-y += ccu_nm.o
 obj-y += ccu_phase.o
diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
new file mode 100644
index ..e35ddd8eec8b
--- /dev/null
+++ b/drivers/clk/sunxi-ng/ccu_nm.c
@@ -0,0 +1,114 @@
+/*
+ * Copyright (C) 2016 Maxime Ripard
+ * Maxime Ripard 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include 
+#include 
+
+#include "ccu_frac.h"
+#include "ccu_gate.h"
+#include "ccu_nm.h"
+
+static void ccu_nm_disable(struct clk_hw *hw)
+{
+   struct ccu_nm *nm = hw_to_ccu_nm(hw);
+
+   return ccu_gate_helper_disable(>common, nm->enable);
+}
+
+static int ccu_nm_enable(struct clk_hw *hw)
+{
+   struct ccu_nm *nm = hw_to_ccu_nm(hw);
+
+   return ccu_gate_helper_enable(>common, nm->enable);
+}
+
+static int ccu_nm_is_enabled(struct clk_hw *hw)
+{
+   struct ccu_nm *nm = hw_to_ccu_nm(hw);
+
+   return ccu_gate_helper_is_enabled(>common, nm->enable);
+}
+
+static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw,
+   unsigned long parent_rate)
+{
+   struct ccu_nm *nm = hw_to_ccu_nm(hw);
+   unsigned long n, m;
+   u32 reg;
+
+   if (ccu_frac_helper_is_enabled(>common, >frac))
+   return ccu_frac_helper_read_rate(>common, >frac);
+
+   reg = readl(nm->common.base + nm->common.reg);
+
+   n = reg >> nm->n.shift;
+   n &= (1 << nm->n.width) - 1;
+
+   m = reg >> nm->m.shift;
+   m &= (1 << nm->m.width) - 1;
+
+   return parent_rate * (n + 1) / (m + 1);
+}
+
+static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+   struct ccu_nm *nm = hw_to_ccu_nm(hw);
+   unsigned long n, m;
+
+   rational_best_approximation(rate, *parent_rate,
+   1 << nm->n.width, 1 << nm->m.width,
+   , );
+
+   return *parent_rate * n / m;
+}
+
+static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
+  unsigned long parent_rate)
+{
+   struct ccu_nm *nm = hw_to_ccu_nm(hw);
+   unsigned long flags;
+   unsigned long n, m;
+   u32 reg;
+
+   if (ccu_frac_helper_has_rate(>common, >frac, rate))
+   return ccu_frac_helper_set_rate(>common, >frac, rate);
+   else
+   ccu_frac_helper_disable(>common, >frac);
+
+   rational_best_approximation(rate, parent_rate,
+   1 << nm->n.width, 1 << nm->m.width,
+   , );
+
+   spin_lock_irqsave(nm->common.lock, flags);
+
+   reg = readl(nm->common.base + nm->common.reg);
+   reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift);
+   reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);
+
+   writel(reg | ((m - 1) << nm->m.shift) | ((n - 1) << nm->n.shift),
+  nm->common.base + nm->common.reg);
+
+   spin_unlock_irqrestore(nm->common.lock, flags);
+
+   ccu_helper_wait_for_lock(>common, nm->lock);
+
+   return 0;
+}
+
+const struct clk_ops ccu_nm_ops = {
+   .disable= ccu_nm_disable,
+   .enable = ccu_nm_enable,
+   .is_enabled = ccu_nm_is_enabled,
+
+   .recalc_rate= ccu_nm_recalc_rate,
+   .round_rate = ccu_nm_round_rate,
+   .set_rate   = ccu_nm_set_rate,
+};
diff --git a/drivers/clk/sunxi-ng/ccu_nm.h b/drivers/clk/sunxi-ng/ccu_nm.h
new file mode 100644
index ..ceabb2e161e5
--- /dev/null
+++ b/drivers/clk/sunxi-ng/ccu_nm.h
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2016 Maxime Ripard. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is 

[PATCH v2 11/15] clk: sunxi-ng: Add N-M-factor clock support

[Maxime Ripard]

Introduce support for clocks that multiply and divide using linear factors.

Signed-off-by: Maxime Ripard 

---
Changes from v1:
  - Fixed the maximums for both factors passed to the rational factor
computation.
---
 drivers/clk/sunxi-ng/Makefile |   1 +
 drivers/clk/sunxi-ng/ccu_nm.c | 114 ++
 drivers/clk/sunxi-ng/ccu_nm.h |  95 +++
 3 files changed, 210 insertions(+)
 create mode 100644 drivers/clk/sunxi-ng/ccu_nm.c
 create mode 100644 drivers/clk/sunxi-ng/ccu_nm.h

diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile
index a201fad6b11d..5c7ae1ad1082 100644
--- a/drivers/clk/sunxi-ng/Makefile
+++ b/drivers/clk/sunxi-ng/Makefile
@@ -9,4 +9,5 @@ obj-y += ccu_gate.o
 obj-y += ccu_mp.o
 obj-y += ccu_mux.o
 obj-y += ccu_nk.o
+obj-y += ccu_nm.o
 obj-y += ccu_phase.o
diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
new file mode 100644
index ..e35ddd8eec8b
--- /dev/null
+++ b/drivers/clk/sunxi-ng/ccu_nm.c
@@ -0,0 +1,114 @@
+/*
+ * Copyright (C) 2016 Maxime Ripard
+ * Maxime Ripard 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include 
+#include 
+
+#include "ccu_frac.h"
+#include "ccu_gate.h"
+#include "ccu_nm.h"
+
+static void ccu_nm_disable(struct clk_hw *hw)
+{
+   struct ccu_nm *nm = hw_to_ccu_nm(hw);
+
+   return ccu_gate_helper_disable(>common, nm->enable);
+}
+
+static int ccu_nm_enable(struct clk_hw *hw)
+{
+   struct ccu_nm *nm = hw_to_ccu_nm(hw);
+
+   return ccu_gate_helper_enable(>common, nm->enable);
+}
+
+static int ccu_nm_is_enabled(struct clk_hw *hw)
+{
+   struct ccu_nm *nm = hw_to_ccu_nm(hw);
+
+   return ccu_gate_helper_is_enabled(>common, nm->enable);
+}
+
+static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw,
+   unsigned long parent_rate)
+{
+   struct ccu_nm *nm = hw_to_ccu_nm(hw);
+   unsigned long n, m;
+   u32 reg;
+
+   if (ccu_frac_helper_is_enabled(>common, >frac))
+   return ccu_frac_helper_read_rate(>common, >frac);
+
+   reg = readl(nm->common.base + nm->common.reg);
+
+   n = reg >> nm->n.shift;
+   n &= (1 << nm->n.width) - 1;
+
+   m = reg >> nm->m.shift;
+   m &= (1 << nm->m.width) - 1;
+
+   return parent_rate * (n + 1) / (m + 1);
+}
+
+static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+   struct ccu_nm *nm = hw_to_ccu_nm(hw);
+   unsigned long n, m;
+
+   rational_best_approximation(rate, *parent_rate,
+   1 << nm->n.width, 1 << nm->m.width,
+   , );
+
+   return *parent_rate * n / m;
+}
+
+static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
+  unsigned long parent_rate)
+{
+   struct ccu_nm *nm = hw_to_ccu_nm(hw);
+   unsigned long flags;
+   unsigned long n, m;
+   u32 reg;
+
+   if (ccu_frac_helper_has_rate(>common, >frac, rate))
+   return ccu_frac_helper_set_rate(>common, >frac, rate);
+   else
+   ccu_frac_helper_disable(>common, >frac);
+
+   rational_best_approximation(rate, parent_rate,
+   1 << nm->n.width, 1 << nm->m.width,
+   , );
+
+   spin_lock_irqsave(nm->common.lock, flags);
+
+   reg = readl(nm->common.base + nm->common.reg);
+   reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift);
+   reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);
+
+   writel(reg | ((m - 1) << nm->m.shift) | ((n - 1) << nm->n.shift),
+  nm->common.base + nm->common.reg);
+
+   spin_unlock_irqrestore(nm->common.lock, flags);
+
+   ccu_helper_wait_for_lock(>common, nm->lock);
+
+   return 0;
+}
+
+const struct clk_ops ccu_nm_ops = {
+   .disable= ccu_nm_disable,
+   .enable = ccu_nm_enable,
+   .is_enabled = ccu_nm_is_enabled,
+
+   .recalc_rate= ccu_nm_recalc_rate,
+   .round_rate = ccu_nm_round_rate,
+   .set_rate   = ccu_nm_set_rate,
+};
diff --git a/drivers/clk/sunxi-ng/ccu_nm.h b/drivers/clk/sunxi-ng/ccu_nm.h
new file mode 100644
index ..ceabb2e161e5
--- /dev/null
+++ b/drivers/clk/sunxi-ng/ccu_nm.h
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2016 Maxime Ripard. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY