Re: [PATCH v2 3/8] arm64: zynqmp: Add support for Xilinx zcu102
On 2.3.2018 17:48, Rob Herring wrote:
> On Fri, Feb 23, 2018 at 03:40:25PM +0100, Michal Simek wrote:
>> This patch is adding revA, revB and rev1.0. There are also other
>> revisions between which should be backward compatible with previous
>> versions. Unfortunately all revs are still in use.
>>
>> Signed-off-by: Michal Simek
>> ---
>>
>> Changes in v2:
>> - Remove i2c mw u-boot commands
>> - Use i2c-mux instead of i2cswitch
>> - Use clock generator without numbers.
>> - Use dash in node name zcu102 rev1.0
>> - Record compatible string to xilinx.txt
>>
>> Documentation/devicetree/bindings/arm/xilinx.txt | 5 +
>> arch/arm64/boot/dts/xilinx/Makefile| 3 +
>> .../arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts | 36 ++
>> arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 550
>> +
>> arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts | 42 ++
>> 5 files changed, 636 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts
>> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
>> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts
>
> Reviewed-by: Rob Herring
>
> but...
>
>
>> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts
>> b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts
>> new file mode 100644
>> index ..ed3cc684931f
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts
>> @@ -0,0 +1,42 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * dts file for Xilinx ZynqMP ZCU102 RevB
>> + *
>> + * (C) Copyright 2016 - 2018, Xilinx, Inc.
>> + *
>> + * Michal Simek
>> + */
>> +
>> +#include "zynqmp-zcu102-revA.dts"
>> +
>> +/ {
>> +model = "ZynqMP ZCU102 RevB";
>> +compatible = "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102",
>> "xlnx,zynqmp";
>> +};
>> +
>> +&gem3 {
>> +phy-handle = <&phyc>;
>> +phyc: phy@c {
>> +reg = <0xc>;
>> +ti,rx-internal-delay = <0x8>;
>> +ti,tx-internal-delay = <0xa>;
>> +ti,fifo-depth = <0x1>;
>> +};
>> +/* Cleanup from RevA */
>> +/delete-node/ phy@21;
>> +};
>> +
>> +/* Different qspi 512Mbit version */
>
> Stray comment
will remove.
>
>> +
>> +/* Fix collision with u61 */
>> +&i2c0 {
>> +i2cswitch@75 {
>
> Missed this name.
>
> This probably creates a new node rather than going into the existing
> tree. If this compiles, we should fix it to not allow the same
> unit-address twice.
hmm interesting I didn't see that before I sent this. There is a warning
but not error.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs
signature.asc
Description: OpenPGP digital signature
Re: [PATCH v2 3/8] arm64: zynqmp: Add support for Xilinx zcu102
On Fri, Feb 23, 2018 at 03:40:25PM +0100, Michal Simek wrote:
> This patch is adding revA, revB and rev1.0. There are also other
> revisions between which should be backward compatible with previous
> versions. Unfortunately all revs are still in use.
>
> Signed-off-by: Michal Simek
> ---
>
> Changes in v2:
> - Remove i2c mw u-boot commands
> - Use i2c-mux instead of i2cswitch
> - Use clock generator without numbers.
> - Use dash in node name zcu102 rev1.0
> - Record compatible string to xilinx.txt
>
> Documentation/devicetree/bindings/arm/xilinx.txt | 5 +
> arch/arm64/boot/dts/xilinx/Makefile| 3 +
> .../arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts | 36 ++
> arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 550
> +
> arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts | 42 ++
> 5 files changed, 636 insertions(+)
> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts
> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts
Reviewed-by: Rob Herring
but...
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts
> b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts
> new file mode 100644
> index ..ed3cc684931f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts
> @@ -0,0 +1,42 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * dts file for Xilinx ZynqMP ZCU102 RevB
> + *
> + * (C) Copyright 2016 - 2018, Xilinx, Inc.
> + *
> + * Michal Simek
> + */
> +
> +#include "zynqmp-zcu102-revA.dts"
> +
> +/ {
> + model = "ZynqMP ZCU102 RevB";
> + compatible = "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102",
> "xlnx,zynqmp";
> +};
> +
> +&gem3 {
> + phy-handle = <&phyc>;
> + phyc: phy@c {
> + reg = <0xc>;
> + ti,rx-internal-delay = <0x8>;
> + ti,tx-internal-delay = <0xa>;
> + ti,fifo-depth = <0x1>;
> + };
> + /* Cleanup from RevA */
> + /delete-node/ phy@21;
> +};
> +
> +/* Different qspi 512Mbit version */
Stray comment
> +
> +/* Fix collision with u61 */
> +&i2c0 {
> + i2cswitch@75 {
Missed this name.
This probably creates a new node rather than going into the existing
tree. If this compiles, we should fix it to not allow the same
unit-address twice.
> + i2c@2 {
> + max15303@1b { /* u8 */
> + compatible = "maxim,max15303";
> + reg = <0x1b>;
> + };
> + /delete-node/ max15303@20;
> + };
> + };
> +};
> --
> 1.9.1
>
[PATCH v2 3/8] arm64: zynqmp: Add support for Xilinx zcu102
This patch is adding revA, revB and rev1.0. There are also other
revisions between which should be backward compatible with previous
versions. Unfortunately all revs are still in use.
Signed-off-by: Michal Simek
---
Changes in v2:
- Remove i2c mw u-boot commands
- Use i2c-mux instead of i2cswitch
- Use clock generator without numbers.
- Use dash in node name zcu102 rev1.0
- Record compatible string to xilinx.txt
Documentation/devicetree/bindings/arm/xilinx.txt | 5 +
arch/arm64/boot/dts/xilinx/Makefile| 3 +
.../arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts | 36 ++
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 550 +
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts | 42 ++
5 files changed, 636 insertions(+)
create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts
create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts
diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt
b/Documentation/devicetree/bindings/arm/xilinx.txt
index 29039b645807..2b922ec3c82a 100644
--- a/Documentation/devicetree/bindings/arm/xilinx.txt
+++ b/Documentation/devicetree/bindings/arm/xilinx.txt
@@ -21,3 +21,8 @@ Additional compatible strings:
- Xilinx 96boards compatible board zcu100
"xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100"
+
+- Xilinx evaluation board zcu102
+ "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102"
+ "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102"
+ "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102"
diff --git a/arch/arm64/boot/dts/xilinx/Makefile
b/arch/arm64/boot/dts/xilinx/Makefile
index 7266a6a9c0cd..24e3ce801304 100644
--- a/arch/arm64/boot/dts/xilinx/Makefile
+++ b/arch/arm64/boot/dts/xilinx/Makefile
@@ -1,3 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-ep108.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu100-revC.dtb
+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revA.dtb
+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb
+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts
b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts
new file mode 100644
index ..6647e97edba3
--- /dev/null
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * dts file for Xilinx ZynqMP ZCU102 Rev1.0
+ *
+ * (C) Copyright 2016 - 2018, Xilinx, Inc.
+ *
+ * Michal Simek
+ */
+
+#include "zynqmp-zcu102-revB.dts"
+
+/ {
+ model = "ZynqMP ZCU102 Rev1.0";
+ compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102",
"xlnx,zynqmp";
+};
+
+&eeprom {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ board_sn: board-sn@0 {
+ reg = <0x0 0x14>;
+ };
+
+ eth_mac: eth-mac@20 {
+ reg = <0x20 0x6>;
+ };
+
+ board_name: board-name@d0 {
+ reg = <0xd0 0x6>;
+ };
+
+ board_revision: board-revision@e0 {
+ reg = <0xe0 0x3>;
+ };
+};
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
new file mode 100644
index ..53f189fca9b1
--- /dev/null
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
@@ -0,0 +1,550 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * dts file for Xilinx ZynqMP ZCU102 RevA
+ *
+ * (C) Copyright 2015 - 2018, Xilinx, Inc.
+ *
+ * Michal Simek
+ */
+
+/dts-v1/;
+
+#include "zynqmp.dtsi"
+#include "zynqmp-clk.dtsi"
+#include
+#include
+
+/ {
+ model = "ZynqMP ZCU102 RevA";
+ compatible = "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102",
"xlnx,zynqmp";
+
+ aliases {
+ ethernet0 = &gem3;
+ gpio0 = &gpio;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ mmc0 = &sdhci1;
+ rtc0 = &rtc;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &dcc;
+ usb0 = &usb0;
+ };
+
+ chosen {
+ bootargs = "earlycon";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x8000>, <0x8 0x 0x0 0x8000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ autorepeat;
+ sw19 {
+ label = "sw19";
+ gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
+ linux,code = ;
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ heartbeat_led {
+ label = "heartbeat";
+ gpios = <&gpio 23 GPIO_ACT
