[PATCH v3 2/5] RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler
The old mechanism for handling IRQs on RISC-V was pretty ugly: the arch code looked at the Kconfig entry for our first-level irqchip driver and called into it directly. This patch uses the new generic IRQ handling infastructure, which essentially just deletes a bunch of code. This does add an additional load to the interrupt latency, but there's a lot of tuning left to be done there on RISC-V so I think it's OK for now. Reviewed-by: Christoph HellwigAcked-by: Stafford Horne Signed-off-by: Palmer Dabbelt --- arch/riscv/Kconfig| 1 + arch/riscv/include/asm/Kbuild | 1 + arch/riscv/kernel/entry.S | 7 +++ arch/riscv/kernel/irq.c | 13 - 4 files changed, 5 insertions(+), 17 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 04807c7f64cc..148865de1692 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -33,6 +33,7 @@ config RISCV select MODULES_USE_ELF_RELA if MODULES select THREAD_INFO_IN_TASK select RISCV_TIMER + select GENERIC_IRQ_MULTI_HANDLER config MMU def_bool y diff --git a/arch/riscv/include/asm/Kbuild b/arch/riscv/include/asm/Kbuild index 4286a5f83876..1e5fd280fb4d 100644 --- a/arch/riscv/include/asm/Kbuild +++ b/arch/riscv/include/asm/Kbuild @@ -15,6 +15,7 @@ generic-y += fcntl.h generic-y += futex.h generic-y += hardirq.h generic-y += hash.h +generic-y += handle_irq.h generic-y += hw_irq.h generic-y += ioctl.h generic-y += ioctls.h diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 56fa592cfa34..9aaf6c986771 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -167,10 +167,9 @@ ENTRY(handle_exception) bge s4, zero, 1f /* Handle interrupts */ - slli a0, s4, 1 - srli a0, a0, 1 - move a1, sp /* pt_regs */ - tail do_IRQ + move a0, sp /* pt_regs */ + REG_L a1, handle_arch_irq + jr a1 1: /* Exceptions run with interrupts enabled */ csrs sstatus, SR_SIE diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c index 328718e8026e..b74cbfbce2d0 100644 --- a/arch/riscv/kernel/irq.c +++ b/arch/riscv/kernel/irq.c @@ -24,16 +24,3 @@ void __init init_IRQ(void) { irqchip_init(); } - -asmlinkage void __irq_entry do_IRQ(unsigned int cause, struct pt_regs *regs) -{ -#ifdef CONFIG_RISCV_INTC - /* -* FIXME: We don't want a direct call to riscv_intc_irq here. The plan -* is to put an IRQ domain here and let the interrupt controller -* register with that, but I poked around the arm64 code a bit and -* there might be a better way to do it (ie, something fully generic). -*/ - riscv_intc_irq(cause, regs); -#endif -} -- 2.16.1
[PATCH v3 2/5] RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler
The old mechanism for handling IRQs on RISC-V was pretty ugly: the arch code looked at the Kconfig entry for our first-level irqchip driver and called into it directly. This patch uses the new generic IRQ handling infastructure, which essentially just deletes a bunch of code. This does add an additional load to the interrupt latency, but there's a lot of tuning left to be done there on RISC-V so I think it's OK for now. Reviewed-by: Christoph Hellwig Acked-by: Stafford Horne Signed-off-by: Palmer Dabbelt --- arch/riscv/Kconfig| 1 + arch/riscv/include/asm/Kbuild | 1 + arch/riscv/kernel/entry.S | 7 +++ arch/riscv/kernel/irq.c | 13 - 4 files changed, 5 insertions(+), 17 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 04807c7f64cc..148865de1692 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -33,6 +33,7 @@ config RISCV select MODULES_USE_ELF_RELA if MODULES select THREAD_INFO_IN_TASK select RISCV_TIMER + select GENERIC_IRQ_MULTI_HANDLER config MMU def_bool y diff --git a/arch/riscv/include/asm/Kbuild b/arch/riscv/include/asm/Kbuild index 4286a5f83876..1e5fd280fb4d 100644 --- a/arch/riscv/include/asm/Kbuild +++ b/arch/riscv/include/asm/Kbuild @@ -15,6 +15,7 @@ generic-y += fcntl.h generic-y += futex.h generic-y += hardirq.h generic-y += hash.h +generic-y += handle_irq.h generic-y += hw_irq.h generic-y += ioctl.h generic-y += ioctls.h diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 56fa592cfa34..9aaf6c986771 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -167,10 +167,9 @@ ENTRY(handle_exception) bge s4, zero, 1f /* Handle interrupts */ - slli a0, s4, 1 - srli a0, a0, 1 - move a1, sp /* pt_regs */ - tail do_IRQ + move a0, sp /* pt_regs */ + REG_L a1, handle_arch_irq + jr a1 1: /* Exceptions run with interrupts enabled */ csrs sstatus, SR_SIE diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c index 328718e8026e..b74cbfbce2d0 100644 --- a/arch/riscv/kernel/irq.c +++ b/arch/riscv/kernel/irq.c @@ -24,16 +24,3 @@ void __init init_IRQ(void) { irqchip_init(); } - -asmlinkage void __irq_entry do_IRQ(unsigned int cause, struct pt_regs *regs) -{ -#ifdef CONFIG_RISCV_INTC - /* -* FIXME: We don't want a direct call to riscv_intc_irq here. The plan -* is to put an IRQ domain here and let the interrupt controller -* register with that, but I poked around the arm64 code a bit and -* there might be a better way to do it (ie, something fully generic). -*/ - riscv_intc_irq(cause, regs); -#endif -} -- 2.16.1