Re: [PATCH v4 15/24] fpga: dfl-fme-pr: add compat_id support for dfl-fme-region platform device.

2018-03-01 Thread Wu Hao 
On Thu, Mar 01, 2018 at 09:59:16AM -0600, Alan Tull wrote:
> On Wed, Feb 28, 2018 at 11:49 PM, Wu Hao  wrote:
> > On Wed, Feb 28, 2018 at 05:06:57PM -0600, Alan Tull wrote:
> >> On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao  wrote:
> 
> >> > +
> >> > +   compat_id.id_l = readq(fme_pr + FME_PR_INTFC_ID_L);
> >> > +   compat_id.id_h = readq(fme_pr + FME_PR_INTFC_ID_H);
> >>
> >> I tried building for 32 bit ARM and ran into readq and writeq not
> >> being defined.  v2 had proper '#indef readq/writeq', so looks like we
> >> need that after all.
> >
> > Sorry, it's missing a header file for dfl-fme-pr.h, as some files don't 
> > include
> > dfl.h at this version. That header file has definitions for readq/writeq.
> >
> > +#include 
> >
> > will fix it.
> 
> Hi Hao,
> 
> That sounds good.  I was able to build if I added it.  There are a
> couple issues in the enumeration code:
> 
> In file included from
> /home/atull/repos/linux-socfpga/include/linux/kernel.h:11:0,
>  from /home/atull/repos/linux-socfpga/include/linux/list.h:9,
>  from 
> /home/atull/repos/linux-socfpga/include/linux/module.h:9,
>  from /home/atull/repos/linux-socfpga/drivers/fpga/dfl.c:13:
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl.c: In function
> 'parse_feature_list':
> /home/atull/repos/linux-socfpga/include/linux/bitops.h:7:24: warning:
> left shift count >= width of type [-Wshift-count-overflow]
>  #define BIT(nr)   (1UL << (nr))
> ^
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl.h:73:19: note: in
> expansion of macro 'BIT'
>  #define DFH_EOL   BIT(40)   /* End of list */
>^
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl.c:643:12: note: in
> expansion of macro 'DFH_EOL'
>if ((v & DFH_EOL) || !ofst)
> ^
> 
> and
> 
>   CC  drivers/fpga/dfl-fme-mgr.o
> In file included from
> /home/atull/repos/linux-socfpga/include/linux/kernel.h:11:0,
>  from /home/atull/repos/linux-socfpga/include/linux/list.h:9,
>  from
> /home/atull/repos/linux-socfpga/include/linux/kobject.h:19,
>  from 
> /home/atull/repos/linux-socfpga/include/linux/device.h:16,
>  from
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl-fme-pr.c:20:
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl-fme-pr.c: In function
> 'pr_mgmt_init':
> /home/atull/repos/linux-socfpga/include/linux/bitops.h:7:24: warning:
> left shift count >= width of type [-Wshift-count-overflow]
>  #define BIT(nr)   (1UL << (nr))
> ^
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl.h:113:27: note: in
> expansion of macro 'BIT'
>  #define FME_PORT_OFST_IMP BIT(60)
>^
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl-fme-pr.c:449:23:
> note: in expansion of macro 'FME_PORT_OFST_IMP'
>if (!(port_offset & FME_PORT_OFST_IMP))

Hi Alan

I think it needs to use BIT_ULL instead of BIT.
will fix them in the next version.

Thanks
Hao

>^
> Alan
> 
> 
> >
> > Thanks
> > Hao
> >
> >> Alan

Re: [PATCH v4 15/24] fpga: dfl-fme-pr: add compat_id support for dfl-fme-region platform device.

2018-03-01 Thread Wu Hao 
On Thu, Mar 01, 2018 at 09:59:16AM -0600, Alan Tull wrote:
> On Wed, Feb 28, 2018 at 11:49 PM, Wu Hao  wrote:
> > On Wed, Feb 28, 2018 at 05:06:57PM -0600, Alan Tull wrote:
> >> On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao  wrote:
> 
> >> > +
> >> > +   compat_id.id_l = readq(fme_pr + FME_PR_INTFC_ID_L);
> >> > +   compat_id.id_h = readq(fme_pr + FME_PR_INTFC_ID_H);
> >>
> >> I tried building for 32 bit ARM and ran into readq and writeq not
> >> being defined.  v2 had proper '#indef readq/writeq', so looks like we
> >> need that after all.
> >
> > Sorry, it's missing a header file for dfl-fme-pr.h, as some files don't 
> > include
> > dfl.h at this version. That header file has definitions for readq/writeq.
> >
> > +#include 
> >
> > will fix it.
> 
> Hi Hao,
> 
> That sounds good.  I was able to build if I added it.  There are a
> couple issues in the enumeration code:
> 
> In file included from
> /home/atull/repos/linux-socfpga/include/linux/kernel.h:11:0,
>  from /home/atull/repos/linux-socfpga/include/linux/list.h:9,
>  from 
> /home/atull/repos/linux-socfpga/include/linux/module.h:9,
>  from /home/atull/repos/linux-socfpga/drivers/fpga/dfl.c:13:
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl.c: In function
> 'parse_feature_list':
> /home/atull/repos/linux-socfpga/include/linux/bitops.h:7:24: warning:
> left shift count >= width of type [-Wshift-count-overflow]
>  #define BIT(nr)   (1UL << (nr))
> ^
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl.h:73:19: note: in
> expansion of macro 'BIT'
>  #define DFH_EOL   BIT(40)   /* End of list */
>^
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl.c:643:12: note: in
> expansion of macro 'DFH_EOL'
>if ((v & DFH_EOL) || !ofst)
> ^
> 
> and
> 
>   CC  drivers/fpga/dfl-fme-mgr.o
> In file included from
> /home/atull/repos/linux-socfpga/include/linux/kernel.h:11:0,
>  from /home/atull/repos/linux-socfpga/include/linux/list.h:9,
>  from
> /home/atull/repos/linux-socfpga/include/linux/kobject.h:19,
>  from 
> /home/atull/repos/linux-socfpga/include/linux/device.h:16,
>  from
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl-fme-pr.c:20:
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl-fme-pr.c: In function
> 'pr_mgmt_init':
> /home/atull/repos/linux-socfpga/include/linux/bitops.h:7:24: warning:
> left shift count >= width of type [-Wshift-count-overflow]
>  #define BIT(nr)   (1UL << (nr))
> ^
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl.h:113:27: note: in
> expansion of macro 'BIT'
>  #define FME_PORT_OFST_IMP BIT(60)
>^
> /home/atull/repos/linux-socfpga/drivers/fpga/dfl-fme-pr.c:449:23:
> note: in expansion of macro 'FME_PORT_OFST_IMP'
>if (!(port_offset & FME_PORT_OFST_IMP))

Hi Alan

I think it needs to use BIT_ULL instead of BIT.
will fix them in the next version.

Thanks
Hao

>^
> Alan
> 
> 
> >
> > Thanks
> > Hao
> >
> >> Alan

Re: [PATCH v4 15/24] fpga: dfl-fme-pr: add compat_id support for dfl-fme-region platform device.

2018-03-01 Thread Alan Tull 
On Wed, Feb 28, 2018 at 11:49 PM, Wu Hao  wrote:
> On Wed, Feb 28, 2018 at 05:06:57PM -0600, Alan Tull wrote:
>> On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao  wrote:

>> > +
>> > +   compat_id.id_l = readq(fme_pr + FME_PR_INTFC_ID_L);
>> > +   compat_id.id_h = readq(fme_pr + FME_PR_INTFC_ID_H);
>>
>> I tried building for 32 bit ARM and ran into readq and writeq not
>> being defined.  v2 had proper '#indef readq/writeq', so looks like we
>> need that after all.
>
> Sorry, it's missing a header file for dfl-fme-pr.h, as some files don't 
> include
> dfl.h at this version. That header file has definitions for readq/writeq.
>
> +#include 
>
> will fix it.

Hi Hao,

That sounds good.  I was able to build if I added it.  There are a
couple issues in the enumeration code:

In file included from
/home/atull/repos/linux-socfpga/include/linux/kernel.h:11:0,
 from /home/atull/repos/linux-socfpga/include/linux/list.h:9,
 from /home/atull/repos/linux-socfpga/include/linux/module.h:9,
 from /home/atull/repos/linux-socfpga/drivers/fpga/dfl.c:13:
/home/atull/repos/linux-socfpga/drivers/fpga/dfl.c: In function
'parse_feature_list':
/home/atull/repos/linux-socfpga/include/linux/bitops.h:7:24: warning:
left shift count >= width of type [-Wshift-count-overflow]
 #define BIT(nr)   (1UL << (nr))
^
/home/atull/repos/linux-socfpga/drivers/fpga/dfl.h:73:19: note: in
expansion of macro 'BIT'
 #define DFH_EOL   BIT(40)   /* End of list */
   ^
/home/atull/repos/linux-socfpga/drivers/fpga/dfl.c:643:12: note: in
expansion of macro 'DFH_EOL'
   if ((v & DFH_EOL) || !ofst)
^

and

  CC  drivers/fpga/dfl-fme-mgr.o
In file included from
/home/atull/repos/linux-socfpga/include/linux/kernel.h:11:0,
 from /home/atull/repos/linux-socfpga/include/linux/list.h:9,
 from
/home/atull/repos/linux-socfpga/include/linux/kobject.h:19,
 from /home/atull/repos/linux-socfpga/include/linux/device.h:16,
 from
/home/atull/repos/linux-socfpga/drivers/fpga/dfl-fme-pr.c:20:
/home/atull/repos/linux-socfpga/drivers/fpga/dfl-fme-pr.c: In function
'pr_mgmt_init':
/home/atull/repos/linux-socfpga/include/linux/bitops.h:7:24: warning:
left shift count >= width of type [-Wshift-count-overflow]
 #define BIT(nr)   (1UL << (nr))
^
/home/atull/repos/linux-socfpga/drivers/fpga/dfl.h:113:27: note: in
expansion of macro 'BIT'
 #define FME_PORT_OFST_IMP BIT(60)
   ^
/home/atull/repos/linux-socfpga/drivers/fpga/dfl-fme-pr.c:449:23:
note: in expansion of macro 'FME_PORT_OFST_IMP'
   if (!(port_offset & FME_PORT_OFST_IMP))
   ^
Alan


>
> Thanks
> Hao
>
>> Alan

Re: [PATCH v4 15/24] fpga: dfl-fme-pr: add compat_id support for dfl-fme-region platform device.

2018-03-01 Thread Alan Tull 
On Wed, Feb 28, 2018 at 11:49 PM, Wu Hao  wrote:
> On Wed, Feb 28, 2018 at 05:06:57PM -0600, Alan Tull wrote:
>> On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao  wrote:

>> > +
>> > +   compat_id.id_l = readq(fme_pr + FME_PR_INTFC_ID_L);
>> > +   compat_id.id_h = readq(fme_pr + FME_PR_INTFC_ID_H);
>>
>> I tried building for 32 bit ARM and ran into readq and writeq not
>> being defined.  v2 had proper '#indef readq/writeq', so looks like we
>> need that after all.
>
> Sorry, it's missing a header file for dfl-fme-pr.h, as some files don't 
> include
> dfl.h at this version. That header file has definitions for readq/writeq.
>
> +#include 
>
> will fix it.

Hi Hao,

That sounds good.  I was able to build if I added it.  There are a
couple issues in the enumeration code:

In file included from
/home/atull/repos/linux-socfpga/include/linux/kernel.h:11:0,
 from /home/atull/repos/linux-socfpga/include/linux/list.h:9,
 from /home/atull/repos/linux-socfpga/include/linux/module.h:9,
 from /home/atull/repos/linux-socfpga/drivers/fpga/dfl.c:13:
/home/atull/repos/linux-socfpga/drivers/fpga/dfl.c: In function
'parse_feature_list':
/home/atull/repos/linux-socfpga/include/linux/bitops.h:7:24: warning:
left shift count >= width of type [-Wshift-count-overflow]
 #define BIT(nr)   (1UL << (nr))
^
/home/atull/repos/linux-socfpga/drivers/fpga/dfl.h:73:19: note: in
expansion of macro 'BIT'
 #define DFH_EOL   BIT(40)   /* End of list */
   ^
/home/atull/repos/linux-socfpga/drivers/fpga/dfl.c:643:12: note: in
expansion of macro 'DFH_EOL'
   if ((v & DFH_EOL) || !ofst)
^

and

  CC  drivers/fpga/dfl-fme-mgr.o
In file included from
/home/atull/repos/linux-socfpga/include/linux/kernel.h:11:0,
 from /home/atull/repos/linux-socfpga/include/linux/list.h:9,
 from
/home/atull/repos/linux-socfpga/include/linux/kobject.h:19,
 from /home/atull/repos/linux-socfpga/include/linux/device.h:16,
 from
/home/atull/repos/linux-socfpga/drivers/fpga/dfl-fme-pr.c:20:
/home/atull/repos/linux-socfpga/drivers/fpga/dfl-fme-pr.c: In function
'pr_mgmt_init':
/home/atull/repos/linux-socfpga/include/linux/bitops.h:7:24: warning:
left shift count >= width of type [-Wshift-count-overflow]
 #define BIT(nr)   (1UL << (nr))
^
/home/atull/repos/linux-socfpga/drivers/fpga/dfl.h:113:27: note: in
expansion of macro 'BIT'
 #define FME_PORT_OFST_IMP BIT(60)
   ^
/home/atull/repos/linux-socfpga/drivers/fpga/dfl-fme-pr.c:449:23:
note: in expansion of macro 'FME_PORT_OFST_IMP'
   if (!(port_offset & FME_PORT_OFST_IMP))
   ^
Alan


>
> Thanks
> Hao
>
>> Alan

Re: [PATCH v4 15/24] fpga: dfl-fme-pr: add compat_id support for dfl-fme-region platform device.

2018-02-28 Thread Wu Hao 
On Wed, Feb 28, 2018 at 05:06:57PM -0600, Alan Tull wrote:
> On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao  wrote:
> 
> Hi Hao,
> 
> > This patch adds compat_id support when driver creates the platform
> > device for dfl-fme-region. It allows dfl-fme-region platform driver
> > to create fpga-region with correct compat_id.
> >
> > Signed-off-by: Wu Hao 
> > ---
> >  drivers/fpga/dfl-fme-pr.c | 20 
> >  drivers/fpga/dfl-fme-pr.h |  3 +++
> >  2 files changed, 23 insertions(+)
> >
> > diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl-fme-pr.c
> > index 526e90b..c17170b 100644
> > --- a/drivers/fpga/dfl-fme-pr.c
> > +++ b/drivers/fpga/dfl-fme-pr.c
> > @@ -314,6 +314,25 @@ static void fpga_fme_destroy_bridges(struct 
> > feature_platform_data *pdata)
> >  }
> >
> >  /**
> > + * fpga_fme_get_region_compat_id - read region compat_id from hardware
> > + *
> > + * @dev: fme device.
> > + */
> > +static struct fpga_region_compat_id
> > +fpga_fme_get_region_compat_id(struct device *dev)
> > +{
> > +   struct fpga_region_compat_id compat_id;
> > +   void __iomem *fme_pr;
> > +
> > +   fme_pr = get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_PR_MGMT);
> > +
> > +   compat_id.id_l = readq(fme_pr + FME_PR_INTFC_ID_L);
> > +   compat_id.id_h = readq(fme_pr + FME_PR_INTFC_ID_H);
> 
> I tried building for 32 bit ARM and ran into readq and writeq not
> being defined.  v2 had proper '#indef readq/writeq', so looks like we
> need that after all.

Sorry, it's missing a header file for dfl-fme-pr.h, as some files don't include
dfl.h at this version. That header file has definitions for readq/writeq.

+#include 

will fix it.

Thanks
Hao

> Alan

Re: [PATCH v4 15/24] fpga: dfl-fme-pr: add compat_id support for dfl-fme-region platform device.

2018-02-28 Thread Wu Hao 
On Wed, Feb 28, 2018 at 05:06:57PM -0600, Alan Tull wrote:
> On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao  wrote:
> 
> Hi Hao,
> 
> > This patch adds compat_id support when driver creates the platform
> > device for dfl-fme-region. It allows dfl-fme-region platform driver
> > to create fpga-region with correct compat_id.
> >
> > Signed-off-by: Wu Hao 
> > ---
> >  drivers/fpga/dfl-fme-pr.c | 20 
> >  drivers/fpga/dfl-fme-pr.h |  3 +++
> >  2 files changed, 23 insertions(+)
> >
> > diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl-fme-pr.c
> > index 526e90b..c17170b 100644
> > --- a/drivers/fpga/dfl-fme-pr.c
> > +++ b/drivers/fpga/dfl-fme-pr.c
> > @@ -314,6 +314,25 @@ static void fpga_fme_destroy_bridges(struct 
> > feature_platform_data *pdata)
> >  }
> >
> >  /**
> > + * fpga_fme_get_region_compat_id - read region compat_id from hardware
> > + *
> > + * @dev: fme device.
> > + */
> > +static struct fpga_region_compat_id
> > +fpga_fme_get_region_compat_id(struct device *dev)
> > +{
> > +   struct fpga_region_compat_id compat_id;
> > +   void __iomem *fme_pr;
> > +
> > +   fme_pr = get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_PR_MGMT);
> > +
> > +   compat_id.id_l = readq(fme_pr + FME_PR_INTFC_ID_L);
> > +   compat_id.id_h = readq(fme_pr + FME_PR_INTFC_ID_H);
> 
> I tried building for 32 bit ARM and ran into readq and writeq not
> being defined.  v2 had proper '#indef readq/writeq', so looks like we
> need that after all.

Sorry, it's missing a header file for dfl-fme-pr.h, as some files don't include
dfl.h at this version. That header file has definitions for readq/writeq.

+#include 

will fix it.

Thanks
Hao

> Alan

Re: [PATCH v4 15/24] fpga: dfl-fme-pr: add compat_id support for dfl-fme-region platform device.

2018-02-28 Thread Alan Tull 
On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao  wrote:

Hi Hao,

> This patch adds compat_id support when driver creates the platform
> device for dfl-fme-region. It allows dfl-fme-region platform driver
> to create fpga-region with correct compat_id.
>
> Signed-off-by: Wu Hao 
> ---
>  drivers/fpga/dfl-fme-pr.c | 20 
>  drivers/fpga/dfl-fme-pr.h |  3 +++
>  2 files changed, 23 insertions(+)
>
> diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl-fme-pr.c
> index 526e90b..c17170b 100644
> --- a/drivers/fpga/dfl-fme-pr.c
> +++ b/drivers/fpga/dfl-fme-pr.c
> @@ -314,6 +314,25 @@ static void fpga_fme_destroy_bridges(struct 
> feature_platform_data *pdata)
>  }
>
>  /**
> + * fpga_fme_get_region_compat_id - read region compat_id from hardware
> + *
> + * @dev: fme device.
> + */
> +static struct fpga_region_compat_id
> +fpga_fme_get_region_compat_id(struct device *dev)
> +{
> +   struct fpga_region_compat_id compat_id;
> +   void __iomem *fme_pr;
> +
> +   fme_pr = get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_PR_MGMT);
> +
> +   compat_id.id_l = readq(fme_pr + FME_PR_INTFC_ID_L);
> +   compat_id.id_h = readq(fme_pr + FME_PR_INTFC_ID_H);

I tried building for 32 bit ARM and ran into readq and writeq not
being defined.  v2 had proper '#indef readq/writeq', so looks like we
need that after all.

Alan

Re: [PATCH v4 15/24] fpga: dfl-fme-pr: add compat_id support for dfl-fme-region platform device.

2018-02-28 Thread Alan Tull 
On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao  wrote:

Hi Hao,

> This patch adds compat_id support when driver creates the platform
> device for dfl-fme-region. It allows dfl-fme-region platform driver
> to create fpga-region with correct compat_id.
>
> Signed-off-by: Wu Hao 
> ---
>  drivers/fpga/dfl-fme-pr.c | 20 
>  drivers/fpga/dfl-fme-pr.h |  3 +++
>  2 files changed, 23 insertions(+)
>
> diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl-fme-pr.c
> index 526e90b..c17170b 100644
> --- a/drivers/fpga/dfl-fme-pr.c
> +++ b/drivers/fpga/dfl-fme-pr.c
> @@ -314,6 +314,25 @@ static void fpga_fme_destroy_bridges(struct 
> feature_platform_data *pdata)
>  }
>
>  /**
> + * fpga_fme_get_region_compat_id - read region compat_id from hardware
> + *
> + * @dev: fme device.
> + */
> +static struct fpga_region_compat_id
> +fpga_fme_get_region_compat_id(struct device *dev)
> +{
> +   struct fpga_region_compat_id compat_id;
> +   void __iomem *fme_pr;
> +
> +   fme_pr = get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_PR_MGMT);
> +
> +   compat_id.id_l = readq(fme_pr + FME_PR_INTFC_ID_L);
> +   compat_id.id_h = readq(fme_pr + FME_PR_INTFC_ID_H);

I tried building for 32 bit ARM and ran into readq and writeq not
being defined.  v2 had proper '#indef readq/writeq', so looks like we
need that after all.

Alan

[PATCH v4 15/24] fpga: dfl-fme-pr: add compat_id support for dfl-fme-region platform device.

2018-02-13 Thread Wu Hao 
This patch adds compat_id support when driver creates the platform
device for dfl-fme-region. It allows dfl-fme-region platform driver
to create fpga-region with correct compat_id.

Signed-off-by: Wu Hao 
---
 drivers/fpga/dfl-fme-pr.c | 20 
 drivers/fpga/dfl-fme-pr.h |  3 +++
 2 files changed, 23 insertions(+)

diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl-fme-pr.c
index 526e90b..c17170b 100644
--- a/drivers/fpga/dfl-fme-pr.c
+++ b/drivers/fpga/dfl-fme-pr.c
@@ -314,6 +314,25 @@ static void fpga_fme_destroy_bridges(struct 
feature_platform_data *pdata)
 }
 
 /**
+ * fpga_fme_get_region_compat_id - read region compat_id from hardware
+ *
+ * @dev: fme device.
+ */
+static struct fpga_region_compat_id
+fpga_fme_get_region_compat_id(struct device *dev)
+{
+   struct fpga_region_compat_id compat_id;
+   void __iomem *fme_pr;
+
+   fme_pr = get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_PR_MGMT);
+
+   compat_id.id_l = readq(fme_pr + FME_PR_INTFC_ID_L);
+   compat_id.id_h = readq(fme_pr + FME_PR_INTFC_ID_H);
+
+   return compat_id;
+}
+
+/**
  * fpga_fme_create_region - create fpga region platform device as child
  *
  * @pdata: fme platform device's pdata
@@ -339,6 +358,7 @@ fpga_fme_create_region(struct feature_platform_data *pdata,
 
region_pdata.mgr = mgr;
region_pdata.br = br;
+   region_pdata.compat_id = fpga_fme_get_region_compat_id(dev);
 
/*
 * Each FPGA device may have more than one port, so allocate platform
diff --git a/drivers/fpga/dfl-fme-pr.h b/drivers/fpga/dfl-fme-pr.h
index 11bd001..ef6c95a 100644
--- a/drivers/fpga/dfl-fme-pr.h
+++ b/drivers/fpga/dfl-fme-pr.h
@@ -19,6 +19,7 @@
 #define __DFL_FME_PR_H
 
 #include 
+#include 
 
 /**
  * struct fme_region - FME fpga region data structure
@@ -39,11 +40,13 @@ struct fme_region {
  * @mgr: platform device of the FPGA manager.
  * @br: platform device of the FPGA bridge.
  * @region_id: region id (same as port_id).
+ * @compat_id: compat id of the FPGA region.
  */
 struct fme_region_pdata {
struct platform_device *mgr;
struct platform_device *br;
int region_id;
+   struct fpga_region_compat_id compat_id;
 };
 
 /**
-- 
2.7.4

[PATCH v4 15/24] fpga: dfl-fme-pr: add compat_id support for dfl-fme-region platform device.

2018-02-13 Thread Wu Hao 
This patch adds compat_id support when driver creates the platform
device for dfl-fme-region. It allows dfl-fme-region platform driver
to create fpga-region with correct compat_id.

Signed-off-by: Wu Hao 
---
 drivers/fpga/dfl-fme-pr.c | 20 
 drivers/fpga/dfl-fme-pr.h |  3 +++
 2 files changed, 23 insertions(+)

diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl-fme-pr.c
index 526e90b..c17170b 100644
--- a/drivers/fpga/dfl-fme-pr.c
+++ b/drivers/fpga/dfl-fme-pr.c
@@ -314,6 +314,25 @@ static void fpga_fme_destroy_bridges(struct 
feature_platform_data *pdata)
 }
 
 /**
+ * fpga_fme_get_region_compat_id - read region compat_id from hardware
+ *
+ * @dev: fme device.
+ */
+static struct fpga_region_compat_id
+fpga_fme_get_region_compat_id(struct device *dev)
+{
+   struct fpga_region_compat_id compat_id;
+   void __iomem *fme_pr;
+
+   fme_pr = get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_PR_MGMT);
+
+   compat_id.id_l = readq(fme_pr + FME_PR_INTFC_ID_L);
+   compat_id.id_h = readq(fme_pr + FME_PR_INTFC_ID_H);
+
+   return compat_id;
+}
+
+/**
  * fpga_fme_create_region - create fpga region platform device as child
  *
  * @pdata: fme platform device's pdata
@@ -339,6 +358,7 @@ fpga_fme_create_region(struct feature_platform_data *pdata,
 
region_pdata.mgr = mgr;
region_pdata.br = br;
+   region_pdata.compat_id = fpga_fme_get_region_compat_id(dev);
 
/*
 * Each FPGA device may have more than one port, so allocate platform
diff --git a/drivers/fpga/dfl-fme-pr.h b/drivers/fpga/dfl-fme-pr.h
index 11bd001..ef6c95a 100644
--- a/drivers/fpga/dfl-fme-pr.h
+++ b/drivers/fpga/dfl-fme-pr.h
@@ -19,6 +19,7 @@
 #define __DFL_FME_PR_H
 
 #include 
+#include 
 
 /**
  * struct fme_region - FME fpga region data structure
@@ -39,11 +40,13 @@ struct fme_region {
  * @mgr: platform device of the FPGA manager.
  * @br: platform device of the FPGA bridge.
  * @region_id: region id (same as port_id).
+ * @compat_id: compat id of the FPGA region.
  */
 struct fme_region_pdata {
struct platform_device *mgr;
struct platform_device *br;
int region_id;
+   struct fpga_region_compat_id compat_id;
 };
 
 /**
-- 
2.7.4