[PATCH v5 09/23] ASoC: qdsp6: q6afe: Add support to MI2S ports

2018-04-18 Thread srinivas . kandagatla
From: Srinivas Kandagatla 

This patch adds support to 4 MI2S ports on LPASS.

Signed-off-by: Srinivas Kandagatla 
Reviewed-and-tested-by: Rohit kumar 
---
 sound/soc/qcom/qdsp6/q6afe.c | 228 +++
 sound/soc/qcom/qdsp6/q6afe.h |  13 +++
 2 files changed, 241 insertions(+)

diff --git a/sound/soc/qcom/qdsp6/q6afe.c b/sound/soc/qcom/qdsp6/q6afe.c
index 27c1055ac791..fe936d415178 100644
--- a/sound/soc/qcom/qdsp6/q6afe.c
+++ b/sound/soc/qcom/qdsp6/q6afe.c
@@ -14,6 +14,10 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
+#include 
 #include "q6dsp-errno.h"
 #include "q6core.h"
 #include "q6afe.h"
@@ -28,7 +32,36 @@
 
 #define AFE_PARAM_ID_CDC_SLIMBUS_SLAVE_CFG 0x00010235
 
+#define AFE_PARAM_ID_LPAIF_CLK_CONFIG  0x00010238
+#define AFE_PARAM_ID_INTERNAL_DIGITAL_CDC_CLK_CONFIG   0x00010239
+
 #define AFE_PARAM_ID_SLIMBUS_CONFIG0x00010212
+#define AFE_PARAM_ID_I2S_CONFIG0x0001020D
+
+/* I2S config specific */
+#define AFE_API_VERSION_I2S_CONFIG 0x1
+#define AFE_PORT_I2S_SD0   0x1
+#define AFE_PORT_I2S_SD1   0x2
+#define AFE_PORT_I2S_SD2   0x3
+#define AFE_PORT_I2S_SD3   0x4
+#define AFE_PORT_I2S_SD0_MASK  BIT(0x1)
+#define AFE_PORT_I2S_SD1_MASK  BIT(0x2)
+#define AFE_PORT_I2S_SD2_MASK  BIT(0x3)
+#define AFE_PORT_I2S_SD3_MASK  BIT(0x4)
+#define AFE_PORT_I2S_SD0_1_MASKGENMASK(2, 1)
+#define AFE_PORT_I2S_SD2_3_MASKGENMASK(4, 3)
+#define AFE_PORT_I2S_SD0_1_2_MASK  GENMASK(3, 1)
+#define AFE_PORT_I2S_SD0_1_2_3_MASKGENMASK(4, 1)
+#define AFE_PORT_I2S_QUAD010x5
+#define AFE_PORT_I2S_QUAD230x6
+#define AFE_PORT_I2S_6CHS  0x7
+#define AFE_PORT_I2S_8CHS  0x8
+#define AFE_PORT_I2S_MONO  0x0
+#define AFE_PORT_I2S_STEREO0x1
+#define AFE_PORT_CONFIG_I2S_WS_SRC_EXTERNAL0x0
+#define AFE_PORT_CONFIG_I2S_WS_SRC_INTERNAL0x1
+#define AFE_LINEAR_PCM_DATA0x0
+
 
 /* Port IDs */
 #define AFE_API_VERSION_HDMI_CONFIG0x1
@@ -64,6 +97,19 @@
 #define AFE_PORT_ID_SLIMBUS_MULTI_CHAN_6_RX  0x400c
 /* SLIMbus Tx port on channel 6. */
 #define AFE_PORT_ID_SLIMBUS_MULTI_CHAN_6_TX  0x400d
+#define AFE_PORT_ID_PRIMARY_MI2S_RX 0x1000
+#define AFE_PORT_ID_PRIMARY_MI2S_TX 0x1001
+#define AFE_PORT_ID_SECONDARY_MI2S_RX   0x1002
+#define AFE_PORT_ID_SECONDARY_MI2S_TX   0x1003
+#define AFE_PORT_ID_TERTIARY_MI2S_RX0x1004
+#define AFE_PORT_ID_TERTIARY_MI2S_TX0x1005
+#define AFE_PORT_ID_QUATERNARY_MI2S_RX  0x1006
+#define AFE_PORT_ID_QUATERNARY_MI2S_TX  0x1007
+
+#define Q6AFE_LPASS_MODE_CLK1_VALID 1
+#define Q6AFE_LPASS_MODE_CLK2_VALID 2
+#define Q6AFE_LPASS_CLK_SRC_INTERNAL 1
+#define Q6AFE_LPASS_CLK_ROOT_DEFAULT 0
 
 #define TIMEOUT_MS 1000
 #define AFE_CMD_RESP_AVAIL 0
@@ -160,10 +206,21 @@ struct afe_param_id_slimbus_cfg {
  */
 } __packed;
 
+struct afe_param_id_i2s_cfg {
+   u32 i2s_cfg_minor_version;
+   u16 bit_width;
+   u16 channel_mode;
+   u16 mono_stereo;
+   u16 ws_src;
+   u32 sample_rate;
+   u16 data_format;
+   u16 reserved;
+} __packed;
 
 union afe_port_config {
struct afe_param_id_hdmi_multi_chan_audio_cfg hdmi_multi_ch;
struct afe_param_id_slimbus_cfg   slim_cfg;
+   struct afe_param_id_i2s_cfg i2s_cfg;
 } __packed;
 
 struct q6afe_port {
@@ -210,6 +267,22 @@ static struct afe_port_map port_maps[AFE_PORT_MAX] = {
SLIMBUS_4_RX, 1, 1},
[SLIMBUS_5_RX] = { AFE_PORT_ID_SLIMBUS_MULTI_CHAN_5_RX,
SLIMBUS_5_RX, 1, 1},
+   [QUATERNARY_MI2S_RX] = { AFE_PORT_ID_QUATERNARY_MI2S_RX,
+   QUATERNARY_MI2S_RX, 1, 1},
+   [QUATERNARY_MI2S_TX] = { AFE_PORT_ID_QUATERNARY_MI2S_TX,
+   QUATERNARY_MI2S_TX, 0, 1},
+   [SECONDARY_MI2S_RX] = { AFE_PORT_ID_SECONDARY_MI2S_RX,
+   SECONDARY_MI2S_RX, 1, 1},
+   [SECONDARY_MI2S_TX] = { AFE_PORT_ID_SECONDARY_MI2S_TX,
+   SECONDARY_MI2S_TX, 0, 1},
+   [TERTIARY_MI2S_RX] = { AFE_PORT_ID_TERTIARY_MI2S_RX,
+   TERTIARY_MI2S_RX, 1, 1},
+   [TERTIARY_MI2S_TX] = { AFE_PORT_ID_TERTIARY_MI2S_TX,
+   TERTIARY_MI2S_TX, 0, 1},
+   [PRIMARY_MI2S_RX] = { AFE_PORT_ID_PRIMARY_MI2S_RX,
+   PRIMARY_MI2S_RX, 1, 1},
+   [PRIMARY_MI2S_TX] = { AFE_PORT_ID_PRIMARY_MI2S_TX,
+   PRIMARY_MI2S_RX, 0, 1},
[SLIMBUS_6_RX] = { AFE_PORT_ID_SLIMBUS_MULTI_CHAN_6_RX,
SLIMBUS_6_RX, 1, 1},
 };
@@ -448,6 +521,150 @@ void q6afe_hdmi_port_prepare(struct 

[PATCH v5 09/23] ASoC: qdsp6: q6afe: Add support to MI2S ports

2018-04-18 Thread srinivas . kandagatla
From: Srinivas Kandagatla 

This patch adds support to 4 MI2S ports on LPASS.

Signed-off-by: Srinivas Kandagatla 
Reviewed-and-tested-by: Rohit kumar 
---
 sound/soc/qcom/qdsp6/q6afe.c | 228 +++
 sound/soc/qcom/qdsp6/q6afe.h |  13 +++
 2 files changed, 241 insertions(+)

diff --git a/sound/soc/qcom/qdsp6/q6afe.c b/sound/soc/qcom/qdsp6/q6afe.c
index 27c1055ac791..fe936d415178 100644
--- a/sound/soc/qcom/qdsp6/q6afe.c
+++ b/sound/soc/qcom/qdsp6/q6afe.c
@@ -14,6 +14,10 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
+#include 
 #include "q6dsp-errno.h"
 #include "q6core.h"
 #include "q6afe.h"
@@ -28,7 +32,36 @@
 
 #define AFE_PARAM_ID_CDC_SLIMBUS_SLAVE_CFG 0x00010235
 
+#define AFE_PARAM_ID_LPAIF_CLK_CONFIG  0x00010238
+#define AFE_PARAM_ID_INTERNAL_DIGITAL_CDC_CLK_CONFIG   0x00010239
+
 #define AFE_PARAM_ID_SLIMBUS_CONFIG0x00010212
+#define AFE_PARAM_ID_I2S_CONFIG0x0001020D
+
+/* I2S config specific */
+#define AFE_API_VERSION_I2S_CONFIG 0x1
+#define AFE_PORT_I2S_SD0   0x1
+#define AFE_PORT_I2S_SD1   0x2
+#define AFE_PORT_I2S_SD2   0x3
+#define AFE_PORT_I2S_SD3   0x4
+#define AFE_PORT_I2S_SD0_MASK  BIT(0x1)
+#define AFE_PORT_I2S_SD1_MASK  BIT(0x2)
+#define AFE_PORT_I2S_SD2_MASK  BIT(0x3)
+#define AFE_PORT_I2S_SD3_MASK  BIT(0x4)
+#define AFE_PORT_I2S_SD0_1_MASKGENMASK(2, 1)
+#define AFE_PORT_I2S_SD2_3_MASKGENMASK(4, 3)
+#define AFE_PORT_I2S_SD0_1_2_MASK  GENMASK(3, 1)
+#define AFE_PORT_I2S_SD0_1_2_3_MASKGENMASK(4, 1)
+#define AFE_PORT_I2S_QUAD010x5
+#define AFE_PORT_I2S_QUAD230x6
+#define AFE_PORT_I2S_6CHS  0x7
+#define AFE_PORT_I2S_8CHS  0x8
+#define AFE_PORT_I2S_MONO  0x0
+#define AFE_PORT_I2S_STEREO0x1
+#define AFE_PORT_CONFIG_I2S_WS_SRC_EXTERNAL0x0
+#define AFE_PORT_CONFIG_I2S_WS_SRC_INTERNAL0x1
+#define AFE_LINEAR_PCM_DATA0x0
+
 
 /* Port IDs */
 #define AFE_API_VERSION_HDMI_CONFIG0x1
@@ -64,6 +97,19 @@
 #define AFE_PORT_ID_SLIMBUS_MULTI_CHAN_6_RX  0x400c
 /* SLIMbus Tx port on channel 6. */
 #define AFE_PORT_ID_SLIMBUS_MULTI_CHAN_6_TX  0x400d
+#define AFE_PORT_ID_PRIMARY_MI2S_RX 0x1000
+#define AFE_PORT_ID_PRIMARY_MI2S_TX 0x1001
+#define AFE_PORT_ID_SECONDARY_MI2S_RX   0x1002
+#define AFE_PORT_ID_SECONDARY_MI2S_TX   0x1003
+#define AFE_PORT_ID_TERTIARY_MI2S_RX0x1004
+#define AFE_PORT_ID_TERTIARY_MI2S_TX0x1005
+#define AFE_PORT_ID_QUATERNARY_MI2S_RX  0x1006
+#define AFE_PORT_ID_QUATERNARY_MI2S_TX  0x1007
+
+#define Q6AFE_LPASS_MODE_CLK1_VALID 1
+#define Q6AFE_LPASS_MODE_CLK2_VALID 2
+#define Q6AFE_LPASS_CLK_SRC_INTERNAL 1
+#define Q6AFE_LPASS_CLK_ROOT_DEFAULT 0
 
 #define TIMEOUT_MS 1000
 #define AFE_CMD_RESP_AVAIL 0
@@ -160,10 +206,21 @@ struct afe_param_id_slimbus_cfg {
  */
 } __packed;
 
+struct afe_param_id_i2s_cfg {
+   u32 i2s_cfg_minor_version;
+   u16 bit_width;
+   u16 channel_mode;
+   u16 mono_stereo;
+   u16 ws_src;
+   u32 sample_rate;
+   u16 data_format;
+   u16 reserved;
+} __packed;
 
 union afe_port_config {
struct afe_param_id_hdmi_multi_chan_audio_cfg hdmi_multi_ch;
struct afe_param_id_slimbus_cfg   slim_cfg;
+   struct afe_param_id_i2s_cfg i2s_cfg;
 } __packed;
 
 struct q6afe_port {
@@ -210,6 +267,22 @@ static struct afe_port_map port_maps[AFE_PORT_MAX] = {
SLIMBUS_4_RX, 1, 1},
[SLIMBUS_5_RX] = { AFE_PORT_ID_SLIMBUS_MULTI_CHAN_5_RX,
SLIMBUS_5_RX, 1, 1},
+   [QUATERNARY_MI2S_RX] = { AFE_PORT_ID_QUATERNARY_MI2S_RX,
+   QUATERNARY_MI2S_RX, 1, 1},
+   [QUATERNARY_MI2S_TX] = { AFE_PORT_ID_QUATERNARY_MI2S_TX,
+   QUATERNARY_MI2S_TX, 0, 1},
+   [SECONDARY_MI2S_RX] = { AFE_PORT_ID_SECONDARY_MI2S_RX,
+   SECONDARY_MI2S_RX, 1, 1},
+   [SECONDARY_MI2S_TX] = { AFE_PORT_ID_SECONDARY_MI2S_TX,
+   SECONDARY_MI2S_TX, 0, 1},
+   [TERTIARY_MI2S_RX] = { AFE_PORT_ID_TERTIARY_MI2S_RX,
+   TERTIARY_MI2S_RX, 1, 1},
+   [TERTIARY_MI2S_TX] = { AFE_PORT_ID_TERTIARY_MI2S_TX,
+   TERTIARY_MI2S_TX, 0, 1},
+   [PRIMARY_MI2S_RX] = { AFE_PORT_ID_PRIMARY_MI2S_RX,
+   PRIMARY_MI2S_RX, 1, 1},
+   [PRIMARY_MI2S_TX] = { AFE_PORT_ID_PRIMARY_MI2S_TX,
+   PRIMARY_MI2S_RX, 0, 1},
[SLIMBUS_6_RX] = { AFE_PORT_ID_SLIMBUS_MULTI_CHAN_6_RX,
SLIMBUS_6_RX, 1, 1},
 };
@@ -448,6 +521,150 @@ void q6afe_hdmi_port_prepare(struct q6afe_port *port,
 }
 EXPORT_SYMBOL_GPL(q6afe_hdmi_port_prepare);
 
+/**
+ *