[PATCH v5 22/23] phy: Add support for Qualcomm's USB HSIC phy

2016-10-17 Thread Stephen Boyd
The HSIC USB controller on qcom SoCs has an integrated all
digital phy controlled via the ULPI viewport.

Cc: Kishon Vijay Abraham I 
Acked-by: Rob Herring 
Cc: 
Signed-off-by: Stephen Boyd 
---
 .../devicetree/bindings/phy/qcom,usb-hsic-phy.txt  |  65 +
 drivers/phy/Kconfig|   7 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-qcom-usb-hsic.c| 160 +
 4 files changed, 233 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
 create mode 100644 drivers/phy/phy-qcom-usb-hsic.c

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt 
b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
new file mode 100644
index ..3c7cb2be4b12
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
@@ -0,0 +1,65 @@
+Qualcomm's USB HSIC PHY
+
+PROPERTIES
+
+- compatible:
+Usage: required
+Value type: 
+Definition: Should contain "qcom,usb-hsic-phy" and more specifically one 
of the
+   following:
+
+   "qcom,usb-hsic-phy-mdm9615"
+   "qcom,usb-hsic-phy-msm8974"
+
+- #phy-cells:
+Usage: required
+Value type: 
+Definition: Should contain 0
+
+- clocks:
+Usage: required
+Value type: 
+Definition: Should contain clock specifier for phy, calibration and
+a calibration sleep clock
+
+- clock-names:
+Usage: required
+Value type: 
+Definition: Should contain "phy, "cal" and "cal_sleep"
+
+- pinctrl-names:
+Usage: required
+Value type: 
+Definition: Should contain "init" and "default" in that order
+
+- pinctrl-0:
+Usage: required
+Value type: 
+Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch
+free state
+
+- pinctrl-1:
+Usage: required
+Value type: 
+Definition: List of pinctrl settings to apply to mux out the HSIC pins
+
+EXAMPLE
+
+usb-controller {
+   ulpi {
+   phy {
+   compatible = "qcom,usb-hsic-phy-msm8974",
+"qcom,usb-hsic-phy";
+   #phy-cells = <0>;
+   pinctrl-names = "init", "default";
+   pinctrl-0 = <_sleep>;
+   pinctrl-1 = <_default>;
+   clocks = < GCC_USB_HSIC_CLK>,
+< GCC_USB_HSIC_IO_CAL_CLK>,
+< GCC_USB_HSIC_IO_CAL_SLEEP_CLK>;
+   clock-names = "phy", "cal", "cal_sleep";
+   assigned-clocks = < GCC_USB_HSIC_IO_CAL_CLK>;
+   assigned-clock-rates = <96>;
+   };
+   };
+};
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index fe00f9134d51..6bfc91a8ea3e 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -453,6 +453,13 @@ config PHY_QCOM_UFS
help
  Support for UFS PHY on QCOM chipsets.
 
+config PHY_QCOM_USB_HSIC
+   tristate "Qualcomm USB HSIC ULPI PHY module"
+   depends on USB_ULPI_BUS
+   select GENERIC_PHY
+   help
+ Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
+
 config PHY_TUSB1210
tristate "TI TUSB1210 ULPI PHY module"
depends on USB_ULPI_BUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index a534cf5be07d..914b843eac13 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -54,6 +54,7 @@ obj-$(CONFIG_PHY_STIH41X_USB) += phy-stih41x-usb.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o
+obj-$(CONFIG_PHY_QCOM_USB_HSIC)+= phy-qcom-usb-hsic.o
 obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
 obj-$(CONFIG_PHY_BRCM_SATA)+= phy-brcm-sata.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)+= phy-pistachio-usb.o
diff --git a/drivers/phy/phy-qcom-usb-hsic.c b/drivers/phy/phy-qcom-usb-hsic.c
new file mode 100644
index ..47690f9945b9
--- /dev/null
+++ b/drivers/phy/phy-qcom-usb-hsic.c
@@ -0,0 +1,160 @@
+/**
+ * Copyright (C) 2016 Linaro Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "ulpi_phy.h"
+
+#define ULPI_HSIC_CFG  0x30
+#define ULPI_HSIC_IO_CAL   0x33
+
+struct qcom_usb_hsic_phy {
+   struct ulpi *ulpi;
+   struct phy *phy;
+   struct pinctrl *pctl;
+   struct clk *phy_clk;
+   struct clk *cal_clk;
+   struct clk *cal_sleep_clk;
+};
+
+static int 

[PATCH v5 22/23] phy: Add support for Qualcomm's USB HSIC phy

2016-10-17 Thread Stephen Boyd
The HSIC USB controller on qcom SoCs has an integrated all
digital phy controlled via the ULPI viewport.

Cc: Kishon Vijay Abraham I 
Acked-by: Rob Herring 
Cc: 
Signed-off-by: Stephen Boyd 
---
 .../devicetree/bindings/phy/qcom,usb-hsic-phy.txt  |  65 +
 drivers/phy/Kconfig|   7 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-qcom-usb-hsic.c| 160 +
 4 files changed, 233 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
 create mode 100644 drivers/phy/phy-qcom-usb-hsic.c

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt 
b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
new file mode 100644
index ..3c7cb2be4b12
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
@@ -0,0 +1,65 @@
+Qualcomm's USB HSIC PHY
+
+PROPERTIES
+
+- compatible:
+Usage: required
+Value type: 
+Definition: Should contain "qcom,usb-hsic-phy" and more specifically one 
of the
+   following:
+
+   "qcom,usb-hsic-phy-mdm9615"
+   "qcom,usb-hsic-phy-msm8974"
+
+- #phy-cells:
+Usage: required
+Value type: 
+Definition: Should contain 0
+
+- clocks:
+Usage: required
+Value type: 
+Definition: Should contain clock specifier for phy, calibration and
+a calibration sleep clock
+
+- clock-names:
+Usage: required
+Value type: 
+Definition: Should contain "phy, "cal" and "cal_sleep"
+
+- pinctrl-names:
+Usage: required
+Value type: 
+Definition: Should contain "init" and "default" in that order
+
+- pinctrl-0:
+Usage: required
+Value type: 
+Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch
+free state
+
+- pinctrl-1:
+Usage: required
+Value type: 
+Definition: List of pinctrl settings to apply to mux out the HSIC pins
+
+EXAMPLE
+
+usb-controller {
+   ulpi {
+   phy {
+   compatible = "qcom,usb-hsic-phy-msm8974",
+"qcom,usb-hsic-phy";
+   #phy-cells = <0>;
+   pinctrl-names = "init", "default";
+   pinctrl-0 = <_sleep>;
+   pinctrl-1 = <_default>;
+   clocks = < GCC_USB_HSIC_CLK>,
+< GCC_USB_HSIC_IO_CAL_CLK>,
+< GCC_USB_HSIC_IO_CAL_SLEEP_CLK>;
+   clock-names = "phy", "cal", "cal_sleep";
+   assigned-clocks = < GCC_USB_HSIC_IO_CAL_CLK>;
+   assigned-clock-rates = <96>;
+   };
+   };
+};
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index fe00f9134d51..6bfc91a8ea3e 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -453,6 +453,13 @@ config PHY_QCOM_UFS
help
  Support for UFS PHY on QCOM chipsets.
 
+config PHY_QCOM_USB_HSIC
+   tristate "Qualcomm USB HSIC ULPI PHY module"
+   depends on USB_ULPI_BUS
+   select GENERIC_PHY
+   help
+ Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
+
 config PHY_TUSB1210
tristate "TI TUSB1210 ULPI PHY module"
depends on USB_ULPI_BUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index a534cf5be07d..914b843eac13 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -54,6 +54,7 @@ obj-$(CONFIG_PHY_STIH41X_USB) += phy-stih41x-usb.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o
+obj-$(CONFIG_PHY_QCOM_USB_HSIC)+= phy-qcom-usb-hsic.o
 obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
 obj-$(CONFIG_PHY_BRCM_SATA)+= phy-brcm-sata.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)+= phy-pistachio-usb.o
diff --git a/drivers/phy/phy-qcom-usb-hsic.c b/drivers/phy/phy-qcom-usb-hsic.c
new file mode 100644
index ..47690f9945b9
--- /dev/null
+++ b/drivers/phy/phy-qcom-usb-hsic.c
@@ -0,0 +1,160 @@
+/**
+ * Copyright (C) 2016 Linaro Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "ulpi_phy.h"
+
+#define ULPI_HSIC_CFG  0x30
+#define ULPI_HSIC_IO_CAL   0x33
+
+struct qcom_usb_hsic_phy {
+   struct ulpi *ulpi;
+   struct phy *phy;
+   struct pinctrl *pctl;
+   struct clk *phy_clk;
+   struct clk *cal_clk;
+   struct clk *cal_sleep_clk;
+};
+
+static int qcom_usb_hsic_phy_power_on(struct phy *phy)
+{
+   struct qcom_usb_hsic_phy *uphy = phy_get_drvdata(phy);