Re: [PATCH v7 7/9] gpio: Add gpio driver for Actions OWL S900 SoC

On Wed, Apr 4, 2018 at 7:22 PM, Manivannan Sadhasivam wrote: > Add gpio driver for Actions Semi OWL family S900 SoC. Set of registers > controlling the gpio shares the same register range with pinctrl block. > > GPIO registers are organized as 6 banks and each

Re: [PATCH v7 7/9] gpio: Add gpio driver for Actions OWL S900 SoC

On Wed, Apr 4, 2018 at 7:22 PM, Manivannan Sadhasivam wrote: > Add gpio driver for Actions Semi OWL family S900 SoC. Set of registers > controlling the gpio shares the same register range with pinctrl block. > > GPIO registers are organized as 6 banks and each bank controls the > maximum of 32

[PATCH v7 7/9] gpio: Add gpio driver for Actions OWL S900 SoC

Add gpio driver for Actions Semi OWL family S900 SoC. Set of registers controlling the gpio shares the same register range with pinctrl block. GPIO registers are organized as 6 banks and each bank controls the maximum of 32 gpios. Signed-off-by: Manivannan Sadhasivam

[PATCH v7 7/9] gpio: Add gpio driver for Actions OWL S900 SoC

Add gpio driver for Actions Semi OWL family S900 SoC. Set of registers controlling the gpio shares the same register range with pinctrl block. GPIO registers are organized as 6 banks and each bank controls the maximum of 32 gpios. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Andy