Re: [PATCHv4 3/5] pinctrl: mvebu: pinctrl driver for 98DX3236 SoC
On Mon, Jan 23, 2017 at 9:18 AM, Chris Packham wrote: > I noticed the mvebu pinctrl series isn't in Linus's (Torvalds) tree. Is > this on the cards for v4.10 or is it waiting for the next merge window? Next merge window. > In other words should I send v5 or my series now or wait for this to be > merged so I can rebase on top of it? Rebase it on my devel branch in the pin control tree: git clone git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git cd linux-pinctrl git checkout -b devel origin/devel [git am .. / git pull old-branch] Yours, Linus Walleij
Re: [PATCHv4 3/5] pinctrl: mvebu: pinctrl driver for 98DX3236 SoC
On 20/01/17 10:10, Chris Packham wrote:
> On 19/01/17 23:03, Russell King - ARM Linux wrote:
>> On Fri, Jan 13, 2017 at 10:12:18PM +1300, Chris Packham wrote:
>>> +static struct mvebu_mpp_ctrl mv98dx3236_mpp_controls[] = {
>>> + MPP_FUNC_CTRL(0, 32, NULL, armada_xp_mpp_ctrl),
>>> +};
>>
>> As Linus has taken my mvebu pinctrl series, this will need to be
>> changed to "mvebu_mmio_mpp_ctrl" rather than "armada_xp_mpp_ctrl"
>> when it's merged.
>>
>
> OK I was thinking about rebasing my series so maybe it's time.
>
I noticed the mvebu pinctrl series isn't in Linus's (Torvalds) tree. Is
this on the cards for v4.10 or is it waiting for the next merge window?
In other words should I send v5 or my series now or wait for this to be
merged so I can rebase on top of it?
Re: [PATCHv4 3/5] pinctrl: mvebu: pinctrl driver for 98DX3236 SoC
On 20/01/17 12:19, Sebastian Hesselbarth wrote: > On 19.01.2017 22:12, Chris Packham wrote: >> On 14/01/17 20:50, Chris Packham wrote: >>> On 13/01/17 22:54, Sebastian Hesselbarth wrote: On 13.01.2017 10:12, Chris Packham wrote: > From: Kalyan Kinthada > > This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs > from Marvell. > > Signed-off-by: Kalyan Kinthada > Signed-off-by: Chris Packham > Acked-by: Rob Herring > Acked-by: Sebastian Hesselbarth > --- > > Notes: > Changes in v2: > - include sdio support for the 98DX4251 > Changes in v3: > - None > Changes in v4: > - Correct some discrepencies between binding and driver. Well, unfortunately I still see differences between the "gpio" in the binding and "gpo" in the driver. Please go back to that list I sent you yesterday and fix them all. >>> >>> I think you may have missed my initial reply [1]. Or I have missed your >>> response to it. Long story short "gpo" is intentional because some of >>> those pins can't be used as inputs. But if you still want me to change >>> it I will. >>> >>> [1] - https://lkml.org/lkml/2017/1/12/117 >>> >> >> Did you get a chance to consider this. Do you still want me to change >> gpo -> gpio given the information above? > > Chris, > > sorry if I wasn't clear enough. I don't want you to change every gpo > into gpio. All I was referring to is the _difference_ between driver > implementation and device tree binding - and soley resolve that. > > So, for the gpo's I see that the binding doc still says "gpio" for the > available functions where the driver expects "gpo". > > e.g. the binding has this: > > mpp6 6gpio, sd0(clk), dev(a2) > > if you change it to > > mpp6 6gpo, sd0(clk), dev(a2) > > both binding and driver are the same, right? > > I do understand that the hardware is gp-output only and you correctly > reflected that in the pinctrl driver - but the binding doc does not > reflect that for those mpps in the list. > Ah OK thanks for clearing up my confusion. I'll make sure the binding and the driver are consistent when I submit v5 (probably next week).
Re: [PATCHv4 3/5] pinctrl: mvebu: pinctrl driver for 98DX3236 SoC
On 19.01.2017 22:12, Chris Packham wrote: > On 14/01/17 20:50, Chris Packham wrote: >> On 13/01/17 22:54, Sebastian Hesselbarth wrote: >>> On 13.01.2017 10:12, Chris Packham wrote: From: Kalyan Kinthada This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs from Marvell. Signed-off-by: Kalyan Kinthada Signed-off-by: Chris Packham Acked-by: Rob Herring Acked-by: Sebastian Hesselbarth --- Notes: Changes in v2: - include sdio support for the 98DX4251 Changes in v3: - None Changes in v4: - Correct some discrepencies between binding and driver. >>> >>> Well, unfortunately I still see differences between the "gpio" in >>> the binding and "gpo" in the driver. >>> >>> Please go back to that list I sent you yesterday and fix them all. >>> >> >> I think you may have missed my initial reply [1]. Or I have missed your >> response to it. Long story short "gpo" is intentional because some of >> those pins can't be used as inputs. But if you still want me to change >> it I will. >> >> [1] - https://lkml.org/lkml/2017/1/12/117 >> > > Did you get a chance to consider this. Do you still want me to change > gpo -> gpio given the information above? Chris, sorry if I wasn't clear enough. I don't want you to change every gpo into gpio. All I was referring to is the _difference_ between driver implementation and device tree binding - and soley resolve that. So, for the gpo's I see that the binding doc still says "gpio" for the available functions where the driver expects "gpo". e.g. the binding has this: mpp6 6gpio, sd0(clk), dev(a2) if you change it to mpp6 6gpo, sd0(clk), dev(a2) both binding and driver are the same, right? I do understand that the hardware is gp-output only and you correctly reflected that in the pinctrl driver - but the binding doc does not reflect that for those mpps in the list. Did I make it clearer now or am I still missing the point? Sebastian
Re: [PATCHv4 3/5] pinctrl: mvebu: pinctrl driver for 98DX3236 SoC
On 14/01/17 20:50, Chris Packham wrote: > On 13/01/17 22:54, Sebastian Hesselbarth wrote: >> On 13.01.2017 10:12, Chris Packham wrote: >>> From: Kalyan Kinthada >>> >>> This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs >>> from Marvell. >>> >>> Signed-off-by: Kalyan Kinthada >>> Signed-off-by: Chris Packham >>> Acked-by: Rob Herring >>> Acked-by: Sebastian Hesselbarth >>> --- >>> >>> Notes: >>> Changes in v2: >>> - include sdio support for the 98DX4251 >>> Changes in v3: >>> - None >>> Changes in v4: >>> - Correct some discrepencies between binding and driver. >> >> Well, unfortunately I still see differences between the "gpio" in >> the binding and "gpo" in the driver. >> >> Please go back to that list I sent you yesterday and fix them all. >> > > I think you may have missed my initial reply [1]. Or I have missed your > response to it. Long story short "gpo" is intentional because some of > those pins can't be used as inputs. But if you still want me to change > it I will. > > [1] - https://lkml.org/lkml/2017/1/12/117 > Hi Sebastian, Did you get a chance to consider this. Do you still want me to change gpo -> gpio given the information above?
Re: [PATCHv4 3/5] pinctrl: mvebu: pinctrl driver for 98DX3236 SoC
On 19/01/17 23:03, Russell King - ARM Linux wrote:
> On Fri, Jan 13, 2017 at 10:12:18PM +1300, Chris Packham wrote:
>> +static struct mvebu_mpp_ctrl mv98dx3236_mpp_controls[] = {
>> +MPP_FUNC_CTRL(0, 32, NULL, armada_xp_mpp_ctrl),
>> +};
>
> As Linus has taken my mvebu pinctrl series, this will need to be
> changed to "mvebu_mmio_mpp_ctrl" rather than "armada_xp_mpp_ctrl"
> when it's merged.
>
OK I was thinking about rebasing my series so maybe it's time.
Re: [PATCHv4 3/5] pinctrl: mvebu: pinctrl driver for 98DX3236 SoC
On Fri, Jan 13, 2017 at 10:12:18PM +1300, Chris Packham wrote:
> +static struct mvebu_mpp_ctrl mv98dx3236_mpp_controls[] = {
> + MPP_FUNC_CTRL(0, 32, NULL, armada_xp_mpp_ctrl),
> +};
As Linus has taken my mvebu pinctrl series, this will need to be
changed to "mvebu_mmio_mpp_ctrl" rather than "armada_xp_mpp_ctrl"
when it's merged.
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
Re: [PATCHv4 3/5] pinctrl: mvebu: pinctrl driver for 98DX3236 SoC
On 13/01/17 22:54, Sebastian Hesselbarth wrote: > On 13.01.2017 10:12, Chris Packham wrote: >> From: Kalyan Kinthada >> >> This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs >> from Marvell. >> >> Signed-off-by: Kalyan Kinthada >> Signed-off-by: Chris Packham >> Acked-by: Rob Herring >> Acked-by: Sebastian Hesselbarth >> --- >> >> Notes: >> Changes in v2: >> - include sdio support for the 98DX4251 >> Changes in v3: >> - None >> Changes in v4: >> - Correct some discrepencies between binding and driver. > > Well, unfortunately I still see differences between the "gpio" in > the binding and "gpo" in the driver. > > Please go back to that list I sent you yesterday and fix them all. > I think you may have missed my initial reply [1]. Or I have missed your response to it. Long story short "gpo" is intentional because some of those pins can't be used as inputs. But if you still want me to change it I will. [1] - https://lkml.org/lkml/2017/1/12/117
Re: [PATCHv4 3/5] pinctrl: mvebu: pinctrl driver for 98DX3236 SoC
On 13.01.2017 10:12, Chris Packham wrote:
From: Kalyan Kinthada
This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs
from Marvell.
Signed-off-by: Kalyan Kinthada
Signed-off-by: Chris Packham
Acked-by: Rob Herring
Acked-by: Sebastian Hesselbarth
---
Notes:
Changes in v2:
- include sdio support for the 98DX4251
Changes in v3:
- None
Changes in v4:
- Correct some discrepencies between binding and driver.
Well, unfortunately I still see differences between the "gpio" in
the binding and "gpo" in the driver.
Please go back to that list I sent you yesterday and fix them all.
[...]
diff --git
a/Documentation/devicetree/bindings/pinctrl/marvell,armada-98dx3236-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/marvell,armada-98dx3236-pinctrl.txt
new file mode 100644
index ..b5bd23992fdf
--- /dev/null
+++
b/Documentation/devicetree/bindings/pinctrl/marvell,armada-98dx3236-pinctrl.txt
@@ -0,0 +1,46 @@
[...]
+mpp6 6gpio, sd0(clk), dev(a2)
e.g. this is "gpio" ...
[...]
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
index e4ea71a9d985..9601d662c7f5 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
@@ -49,6 +49,10 @@ enum armada_xp_variant {
[...]
+ MPP_MODE(6,
+MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS),
... but here it is "gpo".
Sebastian
[PATCHv4 3/5] pinctrl: mvebu: pinctrl driver for 98DX3236 SoC
From: Kalyan Kinthada
This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs
from Marvell.
Signed-off-by: Kalyan Kinthada
Signed-off-by: Chris Packham
Acked-by: Rob Herring
Acked-by: Sebastian Hesselbarth
---
Notes:
Changes in v2:
- include sdio support for the 98DX4251
Changes in v3:
- None
Changes in v4:
- Correct some discrepencies between binding and driver.
- Collect acks from Rob and Sebastian
.../pinctrl/marvell,armada-98dx3236-pinctrl.txt| 46 ++
drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 156 +
2 files changed, 202 insertions(+)
create mode 100644
Documentation/devicetree/bindings/pinctrl/marvell,armada-98dx3236-pinctrl.txt
diff --git
a/Documentation/devicetree/bindings/pinctrl/marvell,armada-98dx3236-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/marvell,armada-98dx3236-pinctrl.txt
new file mode 100644
index ..b5bd23992fdf
--- /dev/null
+++
b/Documentation/devicetree/bindings/pinctrl/marvell,armada-98dx3236-pinctrl.txt
@@ -0,0 +1,46 @@
+* Marvell 98dx3236 pinctrl driver for mpp
+
+Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
+part and usage
+
+Required properties:
+- compatible: "marvell,98dx3236-pinctrl" or "marvell,98dx4251-pinctrl"
+- reg: register specifier of MPP registers
+
+This driver supports all 98dx3236, 98dx3336 and 98dx4251 variants
+
+name pins functions
+
+mpp0 0gpio, spi0(mosi), dev(ad8)
+mpp1 1gpio, spi0(miso), dev(ad9)
+mpp2 2gpio, spi0(sck), dev(ad10)
+mpp3 3gpio, spi0(cs0), dev(ad11)
+mpp4 4gpio, spi0(cs1), smi(mdc), dev(cs0)
+mpp5 5gpio, pex(rsto), sd0(cmd), dev(bootcs)
+mpp6 6gpio, sd0(clk), dev(a2)
+mpp7 7gpio, sd0(d0), dev(ale0)
+mpp8 8gpio, sd0(d1), dev(ale1)
+mpp9 9gpio, sd0(d2), dev(ready0)
+mpp10 10 gpio, sd0(d3), dev(ad12)
+mpp11 11 gpio, uart1(rxd), uart0(cts), dev(ad13)
+mpp12 12 gpio, uart1(txd), uart0(rts), dev(ad14)
+mpp13 13 gpio, intr(out), dev(ad15)
+mpp14 14 gpio, i2c0(sck)
+mpp15 15 gpio, i2c0(sda)
+mpp16 16 gpio, dev(oe)
+mpp17 17 gpio, dev(clkout)
+mpp18 18 gpio, uart1(txd)
+mpp19 19 gpio, uart1(rxd), dev(rb)
+mpp20 20 gpio, dev(we0)
+mpp21 21 gpio, dev(ad0)
+mpp22 22 gpio, dev(ad1)
+mpp23 23 gpio, dev(ad2)
+mpp24 24 gpio, dev(ad3)
+mpp25 25 gpio, dev(ad4)
+mpp26 26 gpio, dev(ad5)
+mpp27 27 gpio, dev(ad6)
+mpp28 28 gpio, dev(ad7)
+mpp29 29 gpio, dev(a0)
+mpp30 30 gpio, dev(a1)
+mpp31 31 gpio, slv_smi(mdc), smi(mdc), dev(we1)
+mpp32 32 gpio, slv_smi(mdio), smi(mdio), dev(cs1)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
index e4ea71a9d985..9601d662c7f5 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
@@ -49,6 +49,10 @@ enum armada_xp_variant {
V_MV78460 = BIT(2),
V_MV78230_PLUS = (V_MV78230 | V_MV78260 | V_MV78460),
V_MV78260_PLUS = (V_MV78260 | V_MV78460),
+ V_98DX3236 = BIT(3),
+ V_98DX3336 = BIT(4),
+ V_98DX4251 = BIT(5),
+ V_98DX3236_PLUS = (V_98DX3236 | V_98DX3336 | V_98DX4251),
};
static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
@@ -360,6 +364,131 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_VAR_FUNCTION(0x1, "dev", "ad31", V_MV78260_PLUS)),
};
+static struct mvebu_mpp_mode mv98dx3236_mpp_modes[] = {
+ MPP_MODE(0,
+MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS),
+MPP_VAR_FUNCTION(0x2, "spi0", "mosi", V_98DX3236_PLUS),
+MPP_VAR_FUNCTION(0x4, "dev", "ad8", V_98DX3236_PLUS)),
+ MPP_MODE(1,
+MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS),
+MPP_VAR_FUNCTION(0x2, "spi0", "miso", V_98DX3236_PLUS),
+MPP_VAR_FUNCTION(0x4, "dev", "ad9", V_98DX3236_PLUS)),
+ MPP_MODE(2,
+MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS),
+MPP_VAR_FUNCTION(0x2, "spi0", "sck",V_98DX3236_PLUS),
+MPP_VAR_FUNCTION(0x4, "dev", "ad10",V_98DX3236_PLUS)),
+ MPP_MODE(3,
+MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS),
+MPP_VAR_FUNCTION(0x2, "spi0", "cs0",V_98DX3236_PLUS),
+MPP_VAR_FUNCTION(0x4, "dev", "ad11",V_98D
