Commit-ID:  2b83809a5e6d619a780876fcaf68cdc42b50d28c
Gitweb:     http://git.kernel.org/tip/2b83809a5e6d619a780876fcaf68cdc42b50d28c
Author:     Suravee Suthikulpanit <suravee.suthikulpa...@amd.com>
AuthorDate: Mon, 31 Jul 2017 10:51:59 +0200
Committer:  Ingo Molnar <mi...@kernel.org>
CommitDate: Thu, 10 Aug 2017 17:37:43 +0200

x86/cpu/amd: Derive L3 shared_cpu_map from cpu_llc_shared_mask

For systems with X86_FEATURE_TOPOEXT, current logic uses the APIC ID
to calculate shared_cpu_map. However, APIC IDs are not guaranteed to
be contiguous for cores across different L3s (e.g. family17h system
w/ downcore configuration). This breaks the logic, and results in an
incorrect L3 shared_cpu_map.

Instead, always use the previously calculated cpu_llc_shared_mask of
each CPU to derive the L3 shared_cpu_map.

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com>
Signed-off-by: Borislav Petkov <b...@suse.de>
Cc: Linus Torvalds <torva...@linux-foundation.org>
Cc: Peter Zijlstra <pet...@infradead.org>
Cc: Thomas Gleixner <t...@linutronix.de>
Link: http://lkml.kernel.org/r/20170731085159.9455-3...@alien8.de
Signed-off-by: Ingo Molnar <mi...@kernel.org>
---
 arch/x86/kernel/cpu/intel_cacheinfo.c | 32 ++++++++++++++++++--------------
 1 file changed, 18 insertions(+), 14 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c 
b/arch/x86/kernel/cpu/intel_cacheinfo.c
index c55fb2c..24f74932 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -811,7 +811,24 @@ static int __cache_amd_cpumap_setup(unsigned int cpu, int 
index,
        struct cacheinfo *this_leaf;
        int i, sibling;
 
-       if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
+       /*
+        * For L3, always use the pre-calculated cpu_llc_shared_mask
+        * to derive shared_cpu_map.
+        */
+       if (index == 3) {
+               for_each_cpu(i, cpu_llc_shared_mask(cpu)) {
+                       this_cpu_ci = get_cpu_cacheinfo(i);
+                       if (!this_cpu_ci->info_list)
+                               continue;
+                       this_leaf = this_cpu_ci->info_list + index;
+                       for_each_cpu(sibling, cpu_llc_shared_mask(cpu)) {
+                               if (!cpu_online(sibling))
+                                       continue;
+                               cpumask_set_cpu(sibling,
+                                               &this_leaf->shared_cpu_map);
+                       }
+               }
+       } else if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
                unsigned int apicid, nshared, first, last;
 
                this_leaf = this_cpu_ci->info_list + index;
@@ -839,19 +856,6 @@ static int __cache_amd_cpumap_setup(unsigned int cpu, int 
index,
                                                &this_leaf->shared_cpu_map);
                        }
                }
-       } else if (index == 3) {
-               for_each_cpu(i, cpu_llc_shared_mask(cpu)) {
-                       this_cpu_ci = get_cpu_cacheinfo(i);
-                       if (!this_cpu_ci->info_list)
-                               continue;
-                       this_leaf = this_cpu_ci->info_list + index;
-                       for_each_cpu(sibling, cpu_llc_shared_mask(cpu)) {
-                               if (!cpu_online(sibling))
-                                       continue;
-                               cpumask_set_cpu(sibling,
-                                               &this_leaf->shared_cpu_map);
-                       }
-               }
        } else
                return 0;
 

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