Re: Question about MDS mitigation

2019-05-16 Thread Liran Alon
Indeed those CPU resources are shared between sibling hyperthreads on same CPU 
core.
There is currently no mechanism merged upstream to completely mitigate 
SMT-enabled scenarios.
Note that this is also true for L1TF.

There are several proposal to address this but they are still in early research 
mode.
For example, see this KVM address space isolation patch series developed by 
myself and Alexandre:
https://lkml.org/lkml/2019/5/13/515
(Which should be integrated with a mechanism which kick sibling hyperthreads 
when switching from KVM isolated address space to full kernel address space)
This partially mimics Microsoft work regarding HyperClear which you can read 
more about it here:
https://techcommunity.microsoft.com/t5/Virtualization/Hyper-V-HyperClear-Mitigation-for-L1-Terminal-Fault/ba-p/382429

-Liran

> On 16 May 2019, at 5:42, wencongyang (A)  wrote:
> 
> Hi all
> 
> Fill buffers, load ports are shared between threads on the same physical core.
> We need to run more than one vm on the same physical core.
> Is there any complete mitigation for environments utilizing SMT?
> 



Question about MDS mitigation

2019-05-15 Thread wencongyang (A)
Hi all

Fill buffers, load ports are shared between threads on the same physical core.
We need to run more than one vm on the same physical core.
Is there any complete mitigation for environments utilizing SMT?