RE: [PATCH v2 2/7] QE: Add ucc hdlc document to bindings

[Qiang Zhao]

On Wen, Feb 24, 2016 at 04:22AM, Rob Herring wrote:
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Wednesday, February 24, 2016 4:22 AM
> To: Qiang Zhao <qiang.z...@nxp.com>
> Cc: o...@buserror.net; Yang-Leo Li <leoyang...@nxp.com>; linux-
> ker...@vger.kernel.org; devicet...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH v2 2/7] QE: Add ucc hdlc document to bindings
> 
> On Thu, Feb 18, 2016 at 09:06:07AM +0800, Zhao Qiang wrote:
> > Add ucc hdlc document to
> > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> 
> Not a very useful description.

Could you give a example for me?

> 
> > Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
> > ---
> > Changes for v2
> > - use ucc-hdlc instead of ucc_hdlc
> > - add more information to properties.
> >
> >  .../bindings/powerpc/fsl/cpm_qe/network.txt| 93
> ++
> >  1 file changed, 93 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> > b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> > index 29b28b8..936158c 100644
> > --- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> > +++
> b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> > @@ -41,3 +41,96 @@ Example:
> > fsl,mdio-pin = <12>;
> > fsl,mdc-pin = <13>;
> > };
> > +
> > +* HDLC
> > +
> > +Currently defined compatibles:
> > +- fsl,ucc-hdlc
> > +
> > +Properties for fsl,ucc-hdlc:
> > +- rx-clock-name
> > +- tx-clock-name
> > +   Usage: required
> > +   Value type: 
> > +   Definition : should be "brg1"-"brg16" for internal clock source,
> > +should be "clk1"-"clk28" for external clock source.
> > +
> > +- fsl,rx-sync-clock
> > +   Usage: required
> > +   Value type: 
> > +   Definition : should be "none" when using internal clock source,
> > +should be "rsync_pin" when using external clock source.
> 
> Why not a boolean property here?

fsl,rx-sync-clock should have other values.
But now we just use rsync_pin and none.

> > +
> > +- fsl,tx-timeslot
> > +- fsl,rx-timeslot
> 
> Perhaps append "-mask"

Agree, I will modify in next version.

> 
> > +   Usage: required
> > +   Value type: 
> > +   Definition : time slot for TDM operation. Indicates which time slots
> > +used for transmitting and receiving.
> > +
> > +- fsl,tdm-framer-type
> > +   Usage: required
> > +   Value type: 
> > +   Definition : "e1" or "t1"
> 
> Boolean?

We just support e1 and t1, in fact, there are more TDM framer types.

> 
> > +
> > +- fsl,tdm-mode
> > +   Usage: required
> > +   Value type: 
> > +   Definition : "normal" or "internal-loopback"
> 
> Boolean?

It can be Boolean.

BR
-Zhao

RE: [PATCH v2 2/7] QE: Add ucc hdlc document to bindings

[Qiang Zhao]

On Wen, Feb 24, 2016 at 04:22AM, Rob Herring wrote:
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Wednesday, February 24, 2016 4:22 AM
> To: Qiang Zhao 
> Cc: o...@buserror.net; Yang-Leo Li ; linux-
> ker...@vger.kernel.org; devicet...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH v2 2/7] QE: Add ucc hdlc document to bindings
> 
> On Thu, Feb 18, 2016 at 09:06:07AM +0800, Zhao Qiang wrote:
> > Add ucc hdlc document to
> > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> 
> Not a very useful description.

Could you give a example for me?

> 
> > Signed-off-by: Zhao Qiang 
> > ---
> > Changes for v2
> > - use ucc-hdlc instead of ucc_hdlc
> > - add more information to properties.
> >
> >  .../bindings/powerpc/fsl/cpm_qe/network.txt| 93
> ++
> >  1 file changed, 93 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> > b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> > index 29b28b8..936158c 100644
> > --- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> > +++
> b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> > @@ -41,3 +41,96 @@ Example:
> > fsl,mdio-pin = <12>;
> > fsl,mdc-pin = <13>;
> > };
> > +
> > +* HDLC
> > +
> > +Currently defined compatibles:
> > +- fsl,ucc-hdlc
> > +
> > +Properties for fsl,ucc-hdlc:
> > +- rx-clock-name
> > +- tx-clock-name
> > +   Usage: required
> > +   Value type: 
> > +   Definition : should be "brg1"-"brg16" for internal clock source,
> > +should be "clk1"-"clk28" for external clock source.
> > +
> > +- fsl,rx-sync-clock
> > +   Usage: required
> > +   Value type: 
> > +   Definition : should be "none" when using internal clock source,
> > +should be "rsync_pin" when using external clock source.
> 
> Why not a boolean property here?

fsl,rx-sync-clock should have other values.
But now we just use rsync_pin and none.

> > +
> > +- fsl,tx-timeslot
> > +- fsl,rx-timeslot
> 
> Perhaps append "-mask"

Agree, I will modify in next version.

> 
> > +   Usage: required
> > +   Value type: 
> > +   Definition : time slot for TDM operation. Indicates which time slots
> > +used for transmitting and receiving.
> > +
> > +- fsl,tdm-framer-type
> > +   Usage: required
> > +   Value type: 
> > +   Definition : "e1" or "t1"
> 
> Boolean?

We just support e1 and t1, in fact, there are more TDM framer types.

> 
> > +
> > +- fsl,tdm-mode
> > +   Usage: required
> > +   Value type: 
> > +   Definition : "normal" or "internal-loopback"
> 
> Boolean?

It can be Boolean.

BR
-Zhao

Re: [PATCH v2 2/7] QE: Add ucc hdlc document to bindings

[Rob Herring]

On Thu, Feb 18, 2016 at 09:06:07AM +0800, Zhao Qiang wrote:
> Add ucc hdlc document to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt

Not a very useful description.

> Signed-off-by: Zhao Qiang 
> ---
> Changes for v2
>   - use ucc-hdlc instead of ucc_hdlc
>   - add more information to properties.
> 
>  .../bindings/powerpc/fsl/cpm_qe/network.txt| 93 
> ++
>  1 file changed, 93 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt 
> b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> index 29b28b8..936158c 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> @@ -41,3 +41,96 @@ Example:
>   fsl,mdio-pin = <12>;
>   fsl,mdc-pin = <13>;
>   };
> +
> +* HDLC
> +
> +Currently defined compatibles:
> +- fsl,ucc-hdlc
> +
> +Properties for fsl,ucc-hdlc:
> +- rx-clock-name
> +- tx-clock-name
> + Usage: required
> + Value type: 
> + Definition : should be "brg1"-"brg16" for internal clock source,
> +  should be "clk1"-"clk28" for external clock source.
> +
> +- fsl,rx-sync-clock
> + Usage: required
> + Value type: 
> + Definition : should be "none" when using internal clock source,
> +  should be "rsync_pin" when using external clock source.

Why not a boolean property here?

> +
> +- fsl,tx-sync-clock
> + Usage: required
> + Value type: 
> + Definition : should be "none" when using internal clock source,
> +  should be "tsync_pin" when using external clock source.

And here.

> +
> +- fsl,tx-timeslot
> +- fsl,rx-timeslot

Perhaps append "-mask"

> + Usage: required
> + Value type: 
> + Definition : time slot for TDM operation. Indicates which time slots
> +  used for transmitting and receiving.
> +
> +- fsl,tdm-framer-type
> + Usage: required
> + Value type: 
> + Definition : "e1" or "t1"

Boolean? 

> +
> +- fsl,tdm-mode
> + Usage: required
> + Value type: 
> + Definition : "normal" or "internal-loopback"

Boolean?
> +
> +- fsl,tdm-id
> + Usage: required
> + Value type: 
> + Definition : number of TDM ID
> +
> +- fsl,siram-entry-id
> + Usage: required
> + Value type: 
> + Definition : should be 0,2,4...64. the number of TDM entry.
> +
> +- fsl,tdm-interface
> + Usage: optional
> + Value type: 
> + Definition : Specify that hdlc is based on tdm-interface
> +
> +Example:
> +
> + ucc@2000 {
> + compatible = "fsl,ucc-hdlc";
> + rx-clock-name = "clk8";
> + tx-clock-name = "clk9";
> + fsl,rx-sync-clock = "rsync_pin";
> + fsl,tx-sync-clock = "tsync_pin";
> + fsl,tx-timeslot = <0xfffe>;
> + fsl,rx-timeslot = <0xfffe>;
> + fsl,tdm-framer-type = "e1";
> + fsl,tdm-mode = "normal";
> + fsl,tdm-id = <0>;
> + fsl,siram-entry-id = <0>;
> + fsl,tdm-interface;
> + };

> +fsl,siram-entry-id : SI RAM entry ID for the TDM
> +fsl,tdm-interface : hdlc is based on tdm-interface

Should be deleted?

> +
> +Example:
> +
> + ucc@2000 {
> + compatible = "fsl,ucc-hdlc";
> + rx-clock-name = "clk8";
> + tx-clock-name = "clk9";
> + fsl,rx-sync-clock = "rsync_pin";
> + fsl,tx-sync-clock = "tsync_pin";
> + fsl,tx-timeslot = <0xfffe>;
> + fsl,rx-timeslot = <0xfffe>;
> + fsl,tdm-framer-type = "e1";
> + fsl,tdm-mode = "normal";
> + fsl,tdm-id = <0>;
> + fsl,siram-entry-id = <0>;
> + fsl,tdm-interface;
> + };
> -- 
> 2.1.0.27.g96db324
> 

Re: [PATCH v2 2/7] QE: Add ucc hdlc document to bindings

[Rob Herring]

On Thu, Feb 18, 2016 at 09:06:07AM +0800, Zhao Qiang wrote:
> Add ucc hdlc document to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt

Not a very useful description.

> Signed-off-by: Zhao Qiang 
> ---
> Changes for v2
>   - use ucc-hdlc instead of ucc_hdlc
>   - add more information to properties.
> 
>  .../bindings/powerpc/fsl/cpm_qe/network.txt| 93 
> ++
>  1 file changed, 93 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt 
> b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> index 29b28b8..936158c 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
> @@ -41,3 +41,96 @@ Example:
>   fsl,mdio-pin = <12>;
>   fsl,mdc-pin = <13>;
>   };
> +
> +* HDLC
> +
> +Currently defined compatibles:
> +- fsl,ucc-hdlc
> +
> +Properties for fsl,ucc-hdlc:
> +- rx-clock-name
> +- tx-clock-name
> + Usage: required
> + Value type: 
> + Definition : should be "brg1"-"brg16" for internal clock source,
> +  should be "clk1"-"clk28" for external clock source.
> +
> +- fsl,rx-sync-clock
> + Usage: required
> + Value type: 
> + Definition : should be "none" when using internal clock source,
> +  should be "rsync_pin" when using external clock source.

Why not a boolean property here?

> +
> +- fsl,tx-sync-clock
> + Usage: required
> + Value type: 
> + Definition : should be "none" when using internal clock source,
> +  should be "tsync_pin" when using external clock source.

And here.

> +
> +- fsl,tx-timeslot
> +- fsl,rx-timeslot

Perhaps append "-mask"

> + Usage: required
> + Value type: 
> + Definition : time slot for TDM operation. Indicates which time slots
> +  used for transmitting and receiving.
> +
> +- fsl,tdm-framer-type
> + Usage: required
> + Value type: 
> + Definition : "e1" or "t1"

Boolean? 

> +
> +- fsl,tdm-mode
> + Usage: required
> + Value type: 
> + Definition : "normal" or "internal-loopback"

Boolean?
> +
> +- fsl,tdm-id
> + Usage: required
> + Value type: 
> + Definition : number of TDM ID
> +
> +- fsl,siram-entry-id
> + Usage: required
> + Value type: 
> + Definition : should be 0,2,4...64. the number of TDM entry.
> +
> +- fsl,tdm-interface
> + Usage: optional
> + Value type: 
> + Definition : Specify that hdlc is based on tdm-interface
> +
> +Example:
> +
> + ucc@2000 {
> + compatible = "fsl,ucc-hdlc";
> + rx-clock-name = "clk8";
> + tx-clock-name = "clk9";
> + fsl,rx-sync-clock = "rsync_pin";
> + fsl,tx-sync-clock = "tsync_pin";
> + fsl,tx-timeslot = <0xfffe>;
> + fsl,rx-timeslot = <0xfffe>;
> + fsl,tdm-framer-type = "e1";
> + fsl,tdm-mode = "normal";
> + fsl,tdm-id = <0>;
> + fsl,siram-entry-id = <0>;
> + fsl,tdm-interface;
> + };

> +fsl,siram-entry-id : SI RAM entry ID for the TDM
> +fsl,tdm-interface : hdlc is based on tdm-interface

Should be deleted?

> +
> +Example:
> +
> + ucc@2000 {
> + compatible = "fsl,ucc-hdlc";
> + rx-clock-name = "clk8";
> + tx-clock-name = "clk9";
> + fsl,rx-sync-clock = "rsync_pin";
> + fsl,tx-sync-clock = "tsync_pin";
> + fsl,tx-timeslot = <0xfffe>;
> + fsl,rx-timeslot = <0xfffe>;
> + fsl,tdm-framer-type = "e1";
> + fsl,tdm-mode = "normal";
> + fsl,tdm-id = <0>;
> + fsl,siram-entry-id = <0>;
> + fsl,tdm-interface;
> + };
> -- 
> 2.1.0.27.g96db324
>