Re: [GIT PULL] RISC-V Patches for the 5.2 Merge Window, Part 1 v3
The pull request you sent on Fri, 17 May 2019 15:54:33 -0700 (PDT): > git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git > tags/riscv-for-linus-5.2-mw2 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/b0bb1269b9788a35af68587505d8df90498df75f Thank you! -- Deet-doot-dot, I am a bot. https://korg.wiki.kernel.org/userdoc/prtracker
Re: [GIT PULL] RISC-V Patches for the 5.2 Merge Window, Part 1 v2
On Thu, 16 May 2019 19:17:17 PDT (-0700), Linus Torvalds wrote: On Thu, May 16, 2019 at 5:27 PM Palmer Dabbelt wrote: git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git tags/riscv-for-linus-5.2-mw1 Oh no no no. You're creating a binary file from your build or something like that: modules.builtin.modinfo| Bin 0 -> 46064 bytes which is completely unacceptable. I have no idea what you're doing, but this kind of "random garbage in git commits" is not going to fly. And the fact that you're adding random files really means that you are doing something *horribly* wrong. Sorry, I have no idea how I missed that. It looks like I managed to screw something up while trying to fix up that patch, but I'm not really sure what I did. I'll try to figure out how to not screw it up next time. Thanks for catching this!
Re: [GIT PULL] RISC-V Patches for the 5.2 Merge Window, Part 1 v2
On Thu, May 16, 2019 at 5:27 PM Palmer Dabbelt wrote: > > > git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git > tags/riscv-for-linus-5.2-mw1 Oh no no no. You're creating a binary file from your build or something like that: > modules.builtin.modinfo| Bin 0 -> 46064 bytes which is completely unacceptable. I have no idea what you're doing, but this kind of "random garbage in git commits" is not going to fly. And the fact that you're adding random files really means that you are doing something *horribly* wrong. Linus
Re: [GIT PULL] RISC-V Patches for the 5.2 Merge Window, Part 1
On Wed, 15 May 2019 18:49:57 PDT (-0700), Linus Torvalds wrote:
On Wed, May 15, 2019 at 6:43 PM Palmer Dabbelt wrote:
Linus: I'm not sure how to tag this PR as a mistake, so I'm going to just send
another one. If this gets merged then I'll handle the follow-on.
Just emailing in the same thread ends up with me hopefully seeing the
"oops, cancel pull request" before I actually pull, so you did the
right thing.
To make sure, you _could_ obviously also just force-remove the tag you
asked me to pull, so that if I miss an email any pull attempt of mine
would just fail.
Ah, OK, I hadn't thought of that one.
.., and if were to have ended up pulling before you sent the cancel
email and/or removed the tag, it's obviously all too late, and then
we'd have to fix things up after the fact, but at least this time it
got caught in time.
Ya, that's fine. It's just an extra 0-length file that doesn't get built
("file." instead of "file.c"), which explains how it went unnoticed. That
said, it's a bit of an embarassment and I wanted to submit two more patches
anyway so I was going to send another PR. The rebased patches are sitting on
my for-next now, I'll send them up tomorrow unless someone points something
out.
Thanks for the quick reply!
Re: [GIT PULL] RISC-V Patches for the 5.2 Merge Window, Part 1
On Wed, 15 May 2019 12:08:36 PDT (-0700), atish.pa...@wdc.com wrote:
On 5/15/19 10:40 AM, Palmer Dabbelt wrote:
The following changes since commit 085b7755808aa11f78ab9377257e1dad2e6fa4bb:
Linux 5.1-rc6 (2019-04-21 10:45:57 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git
tags/riscv-for-linus-5.2-mw0
for you to fetch changes up to e23fc917f04ffac8c156fdb4ee8b56f3867fa50b:
RISC-V: Avoid using invalid intermediate translations (2019-05-08 15:06:18
-0700)
RISC-V Patches for the 5.2 Merge Window, Part 1
This patch set contains an assortment of RISC-V related patches that I'd
like to target for the 5.2 merge window. Most of the patches are
cleanups, but there are a handful of user-visible changes:
* The nosmp and nr_cpus command-line arguments are now supported, which
work like normal.
* The SBI console no longer installs itself as a preferred console, we
rely on standard mechanisms (/chosen, command-line, hueristics)
instead.
* sfence_remove_sfence_vma{,_asid} now pass their arguments along to the
SBI call.
* Modules now support BUG().
* A missing sfence.vma during boot has been added. This bug only
manifests during boot.
I've only tested this on QEMU again, as I didn't have time to get things
running on the Unleashed. The latest master from this morning merges in
cleanly and passes the tests as well.
Anup Patel (4):
RISC-V: Use tabs to align macro values in asm/csr.h
RISC-V: Add interrupt related SCAUSE defines in asm/csr.h
RISC-V: Access CSRs using CSR numbers
tty: Don't force RISCV SBI console as preferred console
Atish Patra (4):
RISC-V: Add RISC-V specific arch_match_cpu_phys_id
RISC-V: Implement nosmp commandline option.
RISC-V: Support nr_cpus command line option.
RISC-V: Fix minor checkpatch issues.
Christoph Hellwig (11):
riscv: use asm-generic/extable.h
riscv: turn mm_segment_t into a struct
riscv: remove unreachable big endian code
riscv: remove CONFIG_RISCV_ISA_A
riscv: clear all pending interrupts when booting
riscv: simplify the stack pointer setup in head.S
riscv: cleanup the parse_dtb calling conventions
riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR code
riscv: remove duplicate macros from ptrace.h
riscv: print the unexpected interrupt cause
riscv: call pm_power_off from machine_halt / machine_power_off
Gary Guo (3):
riscv: move flush_icache_{all,mm} to cacheflush.c
riscv: move switch_mm to its own file
riscv: fix sbi_remote_sfence_vma{,_asid}.
Guo Ren (1):
riscv/signal: Fixup additional syscall restarting
Nick Desaulniers (1):
riscv: vdso: drop unnecessary cc-ldoption
Palmer Dabbelt (1):
RISC-V: Avoid using invalid intermediate translations
Vincent Chen (3):
riscv: support trap-based WARN()
riscv: Add the support for c.ebreak check in is_valid_bugaddr()
riscv: Support BUG() in kernel module
arch/riscv/Kconfig | 6 +-
arch/riscv/Makefile | 5 +-
arch/riscv/include/asm/Kbuild| 1 +
arch/riscv/include/asm/bug.h | 35 ++
arch/riscv/include/asm/cacheflush.h | 2 +-
arch/riscv/include/asm/csr.h | 123 ++-
arch/riscv/include/asm/elf.h | 6 --
arch/riscv/include/asm/futex.h | 13
arch/riscv/include/asm/irqflags.h| 10 +--
arch/riscv/include/asm/mmu_context.h | 59 +
arch/riscv/include/asm/ptrace.h | 21 ++
arch/riscv/include/asm/sbi.h | 19 --
arch/riscv/include/asm/thread_info.h | 4 +-
arch/riscv/include/asm/uaccess.h | 28 +++-
arch/riscv/kernel/asm-offsets.c | 3 -
arch/riscv/kernel/cpu.c | 3 +-
arch/riscv/kernel/entry.S| 22 +++
arch/riscv/kernel/head.S | 33 ++
arch/riscv/kernel/irq.c | 19 ++
arch/riscv/kernel/perf_event.c | 4 +-
arch/riscv/kernel/reset.c| 15 +++--
arch/riscv/kernel/setup.c| 6 +-
arch/riscv/kernel/signal.c | 6 ++
arch/riscv/kernel/smp.c | 61 +++--
arch/riscv/kernel/smpboot. | 0
arch/riscv/kernel/smpboot.c | 22 ++-
arch/riscv/kernel/stacktrace.c | 14 ++--
arch/riscv/kernel/traps.c| 30 ++---
arch/riscv/kernel/vdso/Makefile | 2 +-
arch/riscv/mm/Makefile | 1 +
arch/riscv/mm/cacheflush.c | 61 +
arch/riscv/mm/context.c | 69
arch/riscv/mm/fault.c| 6 +-
drivers/tty/hvc/hvc_riscv_sbi.c | 1 -
34
Re: [GIT PULL] RISC-V Patches for the 5.2 Merge Window, Part 1
On Wed, May 15, 2019 at 6:43 PM Palmer Dabbelt wrote: > > Linus: I'm not sure how to tag this PR as a mistake, so I'm going to just send > another one. If this gets merged then I'll handle the follow-on. Just emailing in the same thread ends up with me hopefully seeing the "oops, cancel pull request" before I actually pull, so you did the right thing. To make sure, you _could_ obviously also just force-remove the tag you asked me to pull, so that if I miss an email any pull attempt of mine would just fail. .., and if were to have ended up pulling before you sent the cancel email and/or removed the tag, it's obviously all too late, and then we'd have to fix things up after the fact, but at least this time it got caught in time. Linus
Re: [GIT PULL] RISC-V Patches for the 5.2 Merge Window, Part 1
On 5/15/19 10:40 AM, Palmer Dabbelt wrote:
The following changes since commit 085b7755808aa11f78ab9377257e1dad2e6fa4bb:
Linux 5.1-rc6 (2019-04-21 10:45:57 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git
tags/riscv-for-linus-5.2-mw0
for you to fetch changes up to e23fc917f04ffac8c156fdb4ee8b56f3867fa50b:
RISC-V: Avoid using invalid intermediate translations (2019-05-08 15:06:18
-0700)
RISC-V Patches for the 5.2 Merge Window, Part 1
This patch set contains an assortment of RISC-V related patches that I'd
like to target for the 5.2 merge window. Most of the patches are
cleanups, but there are a handful of user-visible changes:
* The nosmp and nr_cpus command-line arguments are now supported, which
work like normal.
* The SBI console no longer installs itself as a preferred console, we
rely on standard mechanisms (/chosen, command-line, hueristics)
instead.
* sfence_remove_sfence_vma{,_asid} now pass their arguments along to the
SBI call.
* Modules now support BUG().
* A missing sfence.vma during boot has been added. This bug only
manifests during boot.
I've only tested this on QEMU again, as I didn't have time to get things
running on the Unleashed. The latest master from this morning merges in
cleanly and passes the tests as well.
Anup Patel (4):
RISC-V: Use tabs to align macro values in asm/csr.h
RISC-V: Add interrupt related SCAUSE defines in asm/csr.h
RISC-V: Access CSRs using CSR numbers
tty: Don't force RISCV SBI console as preferred console
Atish Patra (4):
RISC-V: Add RISC-V specific arch_match_cpu_phys_id
RISC-V: Implement nosmp commandline option.
RISC-V: Support nr_cpus command line option.
RISC-V: Fix minor checkpatch issues.
Christoph Hellwig (11):
riscv: use asm-generic/extable.h
riscv: turn mm_segment_t into a struct
riscv: remove unreachable big endian code
riscv: remove CONFIG_RISCV_ISA_A
riscv: clear all pending interrupts when booting
riscv: simplify the stack pointer setup in head.S
riscv: cleanup the parse_dtb calling conventions
riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR code
riscv: remove duplicate macros from ptrace.h
riscv: print the unexpected interrupt cause
riscv: call pm_power_off from machine_halt / machine_power_off
Gary Guo (3):
riscv: move flush_icache_{all,mm} to cacheflush.c
riscv: move switch_mm to its own file
riscv: fix sbi_remote_sfence_vma{,_asid}.
Guo Ren (1):
riscv/signal: Fixup additional syscall restarting
Nick Desaulniers (1):
riscv: vdso: drop unnecessary cc-ldoption
Palmer Dabbelt (1):
RISC-V: Avoid using invalid intermediate translations
Vincent Chen (3):
riscv: support trap-based WARN()
riscv: Add the support for c.ebreak check in is_valid_bugaddr()
riscv: Support BUG() in kernel module
arch/riscv/Kconfig | 6 +-
arch/riscv/Makefile | 5 +-
arch/riscv/include/asm/Kbuild| 1 +
arch/riscv/include/asm/bug.h | 35 ++
arch/riscv/include/asm/cacheflush.h | 2 +-
arch/riscv/include/asm/csr.h | 123 ++-
arch/riscv/include/asm/elf.h | 6 --
arch/riscv/include/asm/futex.h | 13
arch/riscv/include/asm/irqflags.h| 10 +--
arch/riscv/include/asm/mmu_context.h | 59 +
arch/riscv/include/asm/ptrace.h | 21 ++
arch/riscv/include/asm/sbi.h | 19 --
arch/riscv/include/asm/thread_info.h | 4 +-
arch/riscv/include/asm/uaccess.h | 28 +++-
arch/riscv/kernel/asm-offsets.c | 3 -
arch/riscv/kernel/cpu.c | 3 +-
arch/riscv/kernel/entry.S| 22 +++
arch/riscv/kernel/head.S | 33 ++
arch/riscv/kernel/irq.c | 19 ++
arch/riscv/kernel/perf_event.c | 4 +-
arch/riscv/kernel/reset.c| 15 +++--
arch/riscv/kernel/setup.c| 6 +-
arch/riscv/kernel/signal.c | 6 ++
arch/riscv/kernel/smp.c | 61 +++--
arch/riscv/kernel/smpboot. | 0
arch/riscv/kernel/smpboot.c | 22 ++-
arch/riscv/kernel/stacktrace.c | 14 ++--
arch/riscv/kernel/traps.c| 30 ++---
arch/riscv/kernel/vdso/Makefile | 2 +-
arch/riscv/mm/Makefile | 1 +
arch/riscv/mm/cacheflush.c | 61 +
arch/riscv/mm/context.c | 69
arch/riscv/mm/fault.c| 6 +-
drivers/tty/hvc/hvc_riscv_sbi.c | 1 -
34 files changed, 390 insertions(+), 320 deletions(-)
create mode 100644
