Re: [PATCH] gpio: Added zynq specific check for special pins on bank zero

2016-09-23 Thread Linus Walleij 
On Tue, Sep 20, 2016 at 10:32 AM, Nava kishore Manne
 wrote:

> From: Nava kishore Manne 
>
> This patch adds zynq specific check for bank 0 pins 7 and 8
> are special and cannot be used as inputs
>
> Signed-off-by: Nava kishore Manne 

I'm waiting for a revised version of this patch with comments adressed
and ACKs added.

Yours,
Linus Walleij

Re: [PATCH] gpio: Added zynq specific check for special pins on bank zero

2016-09-23 Thread Linus Walleij 
On Tue, Sep 20, 2016 at 10:32 AM, Nava kishore Manne
 wrote:

> From: Nava kishore Manne 
>
> This patch adds zynq specific check for bank 0 pins 7 and 8
> are special and cannot be used as inputs
>
> Signed-off-by: Nava kishore Manne 

I'm waiting for a revised version of this patch with comments adressed
and ACKs added.

Yours,
Linus Walleij

Re: [PATCH] gpio: Added zynq specific check for special pins on bank zero

2016-09-21 Thread Shubhrajyoti Datta 
On Tue, Sep 20, 2016 at 2:02 PM, Nava kishore Manne
 wrote:
> From: Nava kishore Manne 
>
> This patch adds zynq specific check for bank 0 pins 7 and 8
> are special and cannot be used as inputs

Is there any such pins for zynqmp?

>
> Signed-off-by: Nava kishore Manne 
> ---
>  drivers/gpio/gpio-zynq.c | 17 +++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
> index e72794e..eae9d24 100644
> --- a/drivers/gpio/gpio-zynq.c
> +++ b/drivers/gpio/gpio-zynq.c
> @@ -96,6 +96,10 @@
>  /* GPIO upper 16 bit mask */
>  #define ZYNQ_GPIO_UPPER_MASK 0x
>
> +/* For GPIO quirks */
> +#define ZYNQ_GPIO  BIT(0)
> +#define ZYNQMP_GPIOBIT(1)

if not can we remove ZYNQMP_GPIO?

Re: [PATCH] gpio: Added zynq specific check for special pins on bank zero

2016-09-21 Thread Shubhrajyoti Datta 
On Tue, Sep 20, 2016 at 2:02 PM, Nava kishore Manne
 wrote:
> From: Nava kishore Manne 
>
> This patch adds zynq specific check for bank 0 pins 7 and 8
> are special and cannot be used as inputs

Is there any such pins for zynqmp?

>
> Signed-off-by: Nava kishore Manne 
> ---
>  drivers/gpio/gpio-zynq.c | 17 +++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
> index e72794e..eae9d24 100644
> --- a/drivers/gpio/gpio-zynq.c
> +++ b/drivers/gpio/gpio-zynq.c
> @@ -96,6 +96,10 @@
>  /* GPIO upper 16 bit mask */
>  #define ZYNQ_GPIO_UPPER_MASK 0x
>
> +/* For GPIO quirks */
> +#define ZYNQ_GPIO  BIT(0)
> +#define ZYNQMP_GPIOBIT(1)

if not can we remove ZYNQMP_GPIO?

Re: [PATCH] gpio: Added zynq specific check for special pins on bank zero

2016-09-21 Thread Michal Simek 
On 20.9.2016 16:06, Sören Brinkmann wrote:
> On Tue, 2016-09-20 at 14:02:04 +0530, Nava kishore Manne wrote:
>> From: Nava kishore Manne 
>>
>> This patch adds zynq specific check for bank 0 pins 7 and 8
>> are special and cannot be used as inputs
>>
>> Signed-off-by: Nava kishore Manne 
>> ---
>>  drivers/gpio/gpio-zynq.c | 17 +++--
>>  1 file changed, 15 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
>> index e72794e..eae9d24 100644
>> --- a/drivers/gpio/gpio-zynq.c
>> +++ b/drivers/gpio/gpio-zynq.c
>> @@ -96,6 +96,10 @@
>>  /* GPIO upper 16 bit mask */
>>  #define ZYNQ_GPIO_UPPER_MASK 0x
>>  
>> +/* For GPIO quirks */
>> +#define ZYNQ_GPIO   BIT(0)
>> +#define ZYNQMP_GPIO BIT(1)
> 
> I'd make sure all quirks are easily identifiable and call them something
> like 'ZYNQ_GPIO_QUIRK_FOO'
> 
> Apart from that:
> Acked-by: Sören Brinkmann 
> 

This issue was:
Reported-by: Jonas Karlsson 

And here is also my:
Acked-by: Michal Simek 

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs




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Description: OpenPGP digital signature

Re: [PATCH] gpio: Added zynq specific check for special pins on bank zero

2016-09-21 Thread Michal Simek 
On 20.9.2016 16:06, Sören Brinkmann wrote:
> On Tue, 2016-09-20 at 14:02:04 +0530, Nava kishore Manne wrote:
>> From: Nava kishore Manne 
>>
>> This patch adds zynq specific check for bank 0 pins 7 and 8
>> are special and cannot be used as inputs
>>
>> Signed-off-by: Nava kishore Manne 
>> ---
>>  drivers/gpio/gpio-zynq.c | 17 +++--
>>  1 file changed, 15 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
>> index e72794e..eae9d24 100644
>> --- a/drivers/gpio/gpio-zynq.c
>> +++ b/drivers/gpio/gpio-zynq.c
>> @@ -96,6 +96,10 @@
>>  /* GPIO upper 16 bit mask */
>>  #define ZYNQ_GPIO_UPPER_MASK 0x
>>  
>> +/* For GPIO quirks */
>> +#define ZYNQ_GPIO   BIT(0)
>> +#define ZYNQMP_GPIO BIT(1)
> 
> I'd make sure all quirks are easily identifiable and call them something
> like 'ZYNQ_GPIO_QUIRK_FOO'
> 
> Apart from that:
> Acked-by: Sören Brinkmann 
> 

This issue was:
Reported-by: Jonas Karlsson 

And here is also my:
Acked-by: Michal Simek 

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs




signature.asc
Description: OpenPGP digital signature

Re: [PATCH] gpio: Added zynq specific check for special pins on bank zero

2016-09-20 Thread Sören Brinkmann 
On Tue, 2016-09-20 at 14:02:04 +0530, Nava kishore Manne wrote:
> From: Nava kishore Manne 
> 
> This patch adds zynq specific check for bank 0 pins 7 and 8
> are special and cannot be used as inputs
> 
> Signed-off-by: Nava kishore Manne 
> ---
>  drivers/gpio/gpio-zynq.c | 17 +++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
> index e72794e..eae9d24 100644
> --- a/drivers/gpio/gpio-zynq.c
> +++ b/drivers/gpio/gpio-zynq.c
> @@ -96,6 +96,10 @@
>  /* GPIO upper 16 bit mask */
>  #define ZYNQ_GPIO_UPPER_MASK 0x
>  
> +/* For GPIO quirks */
> +#define ZYNQ_GPIOBIT(0)
> +#define ZYNQMP_GPIO  BIT(1)

I'd make sure all quirks are easily identifiable and call them something
like 'ZYNQ_GPIO_QUIRK_FOO'

Apart from that:
Acked-by: Sören Brinkmann 

Sören

Re: [PATCH] gpio: Added zynq specific check for special pins on bank zero

2016-09-20 Thread Sören Brinkmann 
On Tue, 2016-09-20 at 14:02:04 +0530, Nava kishore Manne wrote:
> From: Nava kishore Manne 
> 
> This patch adds zynq specific check for bank 0 pins 7 and 8
> are special and cannot be used as inputs
> 
> Signed-off-by: Nava kishore Manne 
> ---
>  drivers/gpio/gpio-zynq.c | 17 +++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
> index e72794e..eae9d24 100644
> --- a/drivers/gpio/gpio-zynq.c
> +++ b/drivers/gpio/gpio-zynq.c
> @@ -96,6 +96,10 @@
>  /* GPIO upper 16 bit mask */
>  #define ZYNQ_GPIO_UPPER_MASK 0x
>  
> +/* For GPIO quirks */
> +#define ZYNQ_GPIOBIT(0)
> +#define ZYNQMP_GPIO  BIT(1)

I'd make sure all quirks are easily identifiable and call them something
like 'ZYNQ_GPIO_QUIRK_FOO'

Apart from that:
Acked-by: Sören Brinkmann 

Sören