Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-10 Thread Jingoo Han
On Wednesday, July 10, 2013 11:02 PM, Kishon Vijay Abraham I: > On Friday 05 July 2013 01:59 PM, Jingoo Han wrote: > > Exynos PCIe IP consists of Synopsys specific part and Exynos > > specific part. Only core block is a Synopsys designware part; > > other parts are Exynos specific. > > Also, the

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-10 Thread Kishon Vijay Abraham I
Hi, On Friday 05 July 2013 01:59 PM, Jingoo Han wrote: > Exynos PCIe IP consists of Synopsys specific part and Exynos > specific part. Only core block is a Synopsys designware part; > other parts are Exynos specific. > Also, the Synopsys designware part can be shared with other > platforms; thus,

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-10 Thread Kishon Vijay Abraham I
Hi, On Friday 05 July 2013 01:59 PM, Jingoo Han wrote: Exynos PCIe IP consists of Synopsys specific part and Exynos specific part. Only core block is a Synopsys designware part; other parts are Exynos specific. Also, the Synopsys designware part can be shared with other platforms; thus, it

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-10 Thread Jingoo Han
On Wednesday, July 10, 2013 11:02 PM, Kishon Vijay Abraham I: On Friday 05 July 2013 01:59 PM, Jingoo Han wrote: Exynos PCIe IP consists of Synopsys specific part and Exynos specific part. Only core block is a Synopsys designware part; other parts are Exynos specific. Also, the Synopsys

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-08 Thread Jingoo Han
On Friday, July 05, 2013 7:46 PM, Arnd Bergmann wrote: > On Friday 05 July 2013, Jingoo Han wrote: > > > --- /dev/null > > +++ b/drivers/pci/host/pcie-exynos.c > > > + > > +/* PCIe ELBI registers */ > > +#define PCIE_IRQ_PULSE 0x000 > > +#define IRQ_INTA_ASSERT

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-08 Thread Jingoo Han
On Friday, July 05, 2013 7:44 PM, Pratyush Anand wrote: > On 7/5/2013 1:59 PM, Jingoo Han wrote: > > Exynos PCIe IP consists of Synopsys specific part and Exynos > > specific part. Only core block is a Synopsys designware part; > > other parts are Exynos specific. > > Also, the Synopsys designware

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-08 Thread Jingoo Han
On Friday, July 05, 2013 7:44 PM, Pratyush Anand wrote: On 7/5/2013 1:59 PM, Jingoo Han wrote: Exynos PCIe IP consists of Synopsys specific part and Exynos specific part. Only core block is a Synopsys designware part; other parts are Exynos specific. Also, the Synopsys designware part can

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-08 Thread Jingoo Han
On Friday, July 05, 2013 7:46 PM, Arnd Bergmann wrote: On Friday 05 July 2013, Jingoo Han wrote: --- /dev/null +++ b/drivers/pci/host/pcie-exynos.c + +/* PCIe ELBI registers */ +#define PCIE_IRQ_PULSE 0x000 +#define IRQ_INTA_ASSERT(0x1 0)

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-07 Thread Jingoo Han
On Monday, July 08, 2013 2:06 PM, Jingoo Han wrote: > On Friday, July 05, 2013 7:44 PM, Pratyush Anand wrote: > > On 7/5/2013 1:59 PM, Jingoo Han wrote: > > > Exynos PCIe IP consists of Synopsys specific part and Exynos > > > specific part. Only core block is a Synopsys designware part; > > >

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-07 Thread Jingoo Han
On Friday, July 05, 2013 7:44 PM, Pratyush Anand wrote: > On 7/5/2013 1:59 PM, Jingoo Han wrote: > > Exynos PCIe IP consists of Synopsys specific part and Exynos > > specific part. Only core block is a Synopsys designware part; > > other parts are Exynos specific. > > Also, the Synopsys designware

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-07 Thread Jingoo Han
On Friday, July 05, 2013 7:44 PM, Pratyush Anand wrote: On 7/5/2013 1:59 PM, Jingoo Han wrote: Exynos PCIe IP consists of Synopsys specific part and Exynos specific part. Only core block is a Synopsys designware part; other parts are Exynos specific. Also, the Synopsys designware part can

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-07 Thread Jingoo Han
On Monday, July 08, 2013 2:06 PM, Jingoo Han wrote: On Friday, July 05, 2013 7:44 PM, Pratyush Anand wrote: On 7/5/2013 1:59 PM, Jingoo Han wrote: Exynos PCIe IP consists of Synopsys specific part and Exynos specific part. Only core block is a Synopsys designware part; other parts are

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-05 Thread Arnd Bergmann
On Friday 05 July 2013, Jingoo Han wrote: > --- /dev/null > +++ b/drivers/pci/host/pcie-exynos.c > + > +/* PCIe ELBI registers */ > +#define PCIE_IRQ_PULSE 0x000 > +#define IRQ_INTA_ASSERT (0x1 << 0) > +#define IRQ_INTB_ASSERT (0x1

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-05 Thread Pratyush Anand
On 7/5/2013 1:59 PM, Jingoo Han wrote: Exynos PCIe IP consists of Synopsys specific part and Exynos specific part. Only core block is a Synopsys designware part; other parts are Exynos specific. Also, the Synopsys designware part can be shared with other platforms; thus, it can be split two

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-05 Thread Pratyush Anand
On 7/5/2013 1:59 PM, Jingoo Han wrote: Exynos PCIe IP consists of Synopsys specific part and Exynos specific part. Only core block is a Synopsys designware part; other parts are Exynos specific. Also, the Synopsys designware part can be shared with other platforms; thus, it can be split two

Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

2013-07-05 Thread Arnd Bergmann
On Friday 05 July 2013, Jingoo Han wrote: --- /dev/null +++ b/drivers/pci/host/pcie-exynos.c + +/* PCIe ELBI registers */ +#define PCIE_IRQ_PULSE 0x000 +#define IRQ_INTA_ASSERT (0x1 0) +#define IRQ_INTB_ASSERT (0x1 2)