On Thu, May 21, 2020 at 9:12 AM Serge Semin
wrote:
>
> On Thu, May 21, 2020 at 08:57:10AM -0600, Rob Herring wrote:
> > On Mon, May 18, 2020 at 3:27 PM Serge Semin
> > wrote:
> > >
> > > On Mon, May 18, 2020 at 09:26:59AM -0600, Rob Herring wrote:
> > > > On Fri, May 08, 2020 at 12:36:20PM
On Thu, May 21, 2020 at 08:57:10AM -0600, Rob Herring wrote:
> On Mon, May 18, 2020 at 3:27 PM Serge Semin
> wrote:
> >
> > On Mon, May 18, 2020 at 09:26:59AM -0600, Rob Herring wrote:
> > > On Fri, May 08, 2020 at 12:36:20PM +0300, Serge Semin wrote:
> > > > Baikal-T1 Boot SPI is a part of the
On Mon, May 18, 2020 at 3:27 PM Serge Semin
wrote:
>
> On Mon, May 18, 2020 at 09:26:59AM -0600, Rob Herring wrote:
> > On Fri, May 08, 2020 at 12:36:20PM +0300, Serge Semin wrote:
> > > Baikal-T1 Boot SPI is a part of the SoC System Controller and is
> > > responsible for the system bootup from
On Mon, May 18, 2020 at 09:26:59AM -0600, Rob Herring wrote:
> On Fri, May 08, 2020 at 12:36:20PM +0300, Serge Semin wrote:
> > Baikal-T1 Boot SPI is a part of the SoC System Controller and is
> > responsible for the system bootup from an external SPI flash. It's a DW
> > APB SSI-based
On Mon, May 18, 2020 at 09:26:59AM -0600, Rob Herring wrote:
> On Fri, May 08, 2020 at 12:36:20PM +0300, Serge Semin wrote:
> > Baikal-T1 Boot SPI is a part of the SoC System Controller and is
> > responsible for the system bootup from an external SPI flash. It's a DW
> > APB SSI-based
On Fri, May 08, 2020 at 12:36:20PM +0300, Serge Semin wrote:
> Baikal-T1 Boot SPI is a part of the SoC System Controller and is
> responsible for the system bootup from an external SPI flash. It's a DW
> APB SSI-based SPI-controller with no interrupts, no DMA, with just one
> native chip-select
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