Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
On Tuesday, July 28, 2015 at 05:19:18 PM, Rafał Miłecki wrote:
> On 28 July 2015 at 16:33, Marek Vasut wrote:
> > On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
> >> This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
> >> something like 25LQ32VIG in the middle.
> >>
> >> Signed-off-by: Michal Suchanek
> >> ---
> >>
> >> drivers/mtd/spi-nor/spi-nor.c | 1 +
> >> 1 file changed, 1 insertion(+)
> >>
> >> diff --git a/drivers/mtd/spi-nor/spi-nor.c
> >> b/drivers/mtd/spi-nor/spi-nor.c index d78831b..cba3bd0 100644
> >> --- a/drivers/mtd/spi-nor/spi-nor.c
> >> +++ b/drivers/mtd/spi-nor/spi-nor.c
> >> @@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
> >>
> >> /* GigaDevice */
> >> { "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
> >>
> >> + { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024, 64, SECT_4K) },
> >>
> >> { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
> >> { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
> >
> > Don't we have DT bindings, so we can use jedec,spi-nor prop for all
> > new SPI NORs without growing this table ?
>
> You confused this table with the one in m25p80.c.
Uh oh, sorry.
Best regards,
Marek Vasut
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Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
On 28 July 2015 at 16:33, Marek Vasut wrote:
> On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
>> This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
>> something like 25LQ32VIG in the middle.
>>
>> Signed-off-by: Michal Suchanek
>> ---
>> drivers/mtd/spi-nor/spi-nor.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index d78831b..cba3bd0 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
>>
>> /* GigaDevice */
>> { "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
>> + { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024, 64, SECT_4K) },
>> { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
>> { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
>
> Don't we have DT bindings, so we can use jedec,spi-nor prop for all
> new SPI NORs without growing this table ?
You confused this table with the one in m25p80.c.
--
Rafał
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Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
On 28 July 2015 at 16:38, Marek Vasut wrote:
> On Tuesday, July 28, 2015 at 04:36:29 PM, Michal Suchanek wrote:
>> On 28 July 2015 at 16:33, Marek Vasut wrote:
>> > On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
>> >> This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
>> >> something like 25LQ32VIG in the middle.
>> >>
>> >> Signed-off-by: Michal Suchanek
>> >> ---
>> >>
>> >> drivers/mtd/spi-nor/spi-nor.c | 1 +
>> >> 1 file changed, 1 insertion(+)
>> >>
>> >> diff --git a/drivers/mtd/spi-nor/spi-nor.c
>> >> b/drivers/mtd/spi-nor/spi-nor.c index d78831b..cba3bd0 100644
>> >> --- a/drivers/mtd/spi-nor/spi-nor.c
>> >> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> >> @@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
>> >>
>> >> /* GigaDevice */
>> >> { "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
>> >>
>> >> + { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024, 64, SECT_4K) },
>> >>
>> >> { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
>> >> { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
>> >
>> > Don't we have DT bindings, so we can use jedec,spi-nor prop for all
>> > new SPI NORs without growing this table ?
>>
>> When jedec,spi-nor compatible is used an attempt is made to identify
>> the chip using this table.
>>
>> When the ID is not in the table (or is misread due to transfer error)
>> spi-nor probe fails.
>
> Dang, I was under the impression we want to avoid growing this table :(
>
The table not to be grown is the devicetree compatibles table.
jedec,spi-nor should be enough for chips that respond to the ID
command.
BTW jedec is not a registered vendor and adding flash chips to
devicetree causes checkpatch warnings.
Theoretically you could use the ID data to infer block and whole flash
size but code for that is not in the driver. Not sure how many
vendor-specific encodings and exceptions are out there.
Thanks
Michal
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Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
On Tuesday, July 28, 2015 at 04:36:29 PM, Michal Suchanek wrote:
> On 28 July 2015 at 16:33, Marek Vasut wrote:
> > On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
> >> This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
> >> something like 25LQ32VIG in the middle.
> >>
> >> Signed-off-by: Michal Suchanek
> >> ---
> >>
> >> drivers/mtd/spi-nor/spi-nor.c | 1 +
> >> 1 file changed, 1 insertion(+)
> >>
> >> diff --git a/drivers/mtd/spi-nor/spi-nor.c
> >> b/drivers/mtd/spi-nor/spi-nor.c index d78831b..cba3bd0 100644
> >> --- a/drivers/mtd/spi-nor/spi-nor.c
> >> +++ b/drivers/mtd/spi-nor/spi-nor.c
> >> @@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
> >>
> >> /* GigaDevice */
> >> { "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
> >>
> >> + { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024, 64, SECT_4K) },
> >>
> >> { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
> >> { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
> >
> > Don't we have DT bindings, so we can use jedec,spi-nor prop for all
> > new SPI NORs without growing this table ?
>
> When jedec,spi-nor compatible is used an attempt is made to identify
> the chip using this table.
>
> When the ID is not in the table (or is misread due to transfer error)
> spi-nor probe fails.
Dang, I was under the impression we want to avoid growing this table :(
Best regards,
Marek Vasut
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Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
On 28 July 2015 at 16:33, Marek Vasut wrote:
> On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
>> This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
>> something like 25LQ32VIG in the middle.
>>
>> Signed-off-by: Michal Suchanek
>> ---
>> drivers/mtd/spi-nor/spi-nor.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index d78831b..cba3bd0 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
>>
>> /* GigaDevice */
>> { "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
>> + { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024, 64, SECT_4K) },
>> { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
>> { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
>
> Don't we have DT bindings, so we can use jedec,spi-nor prop for all
> new SPI NORs without growing this table ?
When jedec,spi-nor compatible is used an attempt is made to identify
the chip using this table.
When the ID is not in the table (or is misread due to transfer error)
spi-nor probe fails.
Thanks
Michal
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Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
> This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
> something like 25LQ32VIG in the middle.
>
> Signed-off-by: Michal Suchanek
> ---
> drivers/mtd/spi-nor/spi-nor.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index d78831b..cba3bd0 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
>
> /* GigaDevice */
> { "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
> + { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024, 64, SECT_4K) },
> { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
> { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
Don't we have DT bindings, so we can use jedec,spi-nor prop for all
new SPI NORs without growing this table ?
Best regards,
Marek Vasut
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Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
something like 25LQ32VIG in the middle.
Signed-off-by: Michal Suchanek hramr...@gmail.com
---
drivers/mtd/spi-nor/spi-nor.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index d78831b..cba3bd0 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
/* GigaDevice */
{ gd25q32, INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
+ { gd25lq32c, INFO(0xc86016, 0, 64 * 1024, 64, SECT_4K) },
{ gd25q64, INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
{ gd25q128, INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
Don't we have DT bindings, so we can use jedec,spi-nor prop for all
new SPI NORs without growing this table ?
Best regards,
Marek Vasut
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Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
On 28 July 2015 at 16:33, Marek Vasut ma...@denx.de wrote:
On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
something like 25LQ32VIG in the middle.
Signed-off-by: Michal Suchanek hramr...@gmail.com
---
drivers/mtd/spi-nor/spi-nor.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index d78831b..cba3bd0 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
/* GigaDevice */
{ gd25q32, INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
+ { gd25lq32c, INFO(0xc86016, 0, 64 * 1024, 64, SECT_4K) },
{ gd25q64, INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
{ gd25q128, INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
Don't we have DT bindings, so we can use jedec,spi-nor prop for all
new SPI NORs without growing this table ?
When jedec,spi-nor compatible is used an attempt is made to identify
the chip using this table.
When the ID is not in the table (or is misread due to transfer error)
spi-nor probe fails.
Thanks
Michal
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the body of a message to majord...@vger.kernel.org
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Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
On Tuesday, July 28, 2015 at 04:36:29 PM, Michal Suchanek wrote:
On 28 July 2015 at 16:33, Marek Vasut ma...@denx.de wrote:
On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
something like 25LQ32VIG in the middle.
Signed-off-by: Michal Suchanek hramr...@gmail.com
---
drivers/mtd/spi-nor/spi-nor.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c
b/drivers/mtd/spi-nor/spi-nor.c index d78831b..cba3bd0 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
/* GigaDevice */
{ gd25q32, INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
+ { gd25lq32c, INFO(0xc86016, 0, 64 * 1024, 64, SECT_4K) },
{ gd25q64, INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
{ gd25q128, INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
Don't we have DT bindings, so we can use jedec,spi-nor prop for all
new SPI NORs without growing this table ?
When jedec,spi-nor compatible is used an attempt is made to identify
the chip using this table.
When the ID is not in the table (or is misread due to transfer error)
spi-nor probe fails.
Dang, I was under the impression we want to avoid growing this table :(
Best regards,
Marek Vasut
--
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Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
On Tuesday, July 28, 2015 at 05:19:18 PM, Rafał Miłecki wrote:
On 28 July 2015 at 16:33, Marek Vasut ma...@denx.de wrote:
On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
something like 25LQ32VIG in the middle.
Signed-off-by: Michal Suchanek hramr...@gmail.com
---
drivers/mtd/spi-nor/spi-nor.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c
b/drivers/mtd/spi-nor/spi-nor.c index d78831b..cba3bd0 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
/* GigaDevice */
{ gd25q32, INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
+ { gd25lq32c, INFO(0xc86016, 0, 64 * 1024, 64, SECT_4K) },
{ gd25q64, INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
{ gd25q128, INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
Don't we have DT bindings, so we can use jedec,spi-nor prop for all
new SPI NORs without growing this table ?
You confused this table with the one in m25p80.c.
Uh oh, sorry.
Best regards,
Marek Vasut
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Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
On 28 July 2015 at 16:38, Marek Vasut ma...@denx.de wrote:
On Tuesday, July 28, 2015 at 04:36:29 PM, Michal Suchanek wrote:
On 28 July 2015 at 16:33, Marek Vasut ma...@denx.de wrote:
On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
something like 25LQ32VIG in the middle.
Signed-off-by: Michal Suchanek hramr...@gmail.com
---
drivers/mtd/spi-nor/spi-nor.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c
b/drivers/mtd/spi-nor/spi-nor.c index d78831b..cba3bd0 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
/* GigaDevice */
{ gd25q32, INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
+ { gd25lq32c, INFO(0xc86016, 0, 64 * 1024, 64, SECT_4K) },
{ gd25q64, INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
{ gd25q128, INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
Don't we have DT bindings, so we can use jedec,spi-nor prop for all
new SPI NORs without growing this table ?
When jedec,spi-nor compatible is used an attempt is made to identify
the chip using this table.
When the ID is not in the table (or is misread due to transfer error)
spi-nor probe fails.
Dang, I was under the impression we want to avoid growing this table :(
The table not to be grown is the devicetree compatibles table.
jedec,spi-nor should be enough for chips that respond to the ID
command.
BTW jedec is not a registered vendor and adding flash chips to
devicetree causes checkpatch warnings.
Theoretically you could use the ID data to infer block and whole flash
size but code for that is not in the driver. Not sure how many
vendor-specific encodings and exceptions are out there.
Thanks
Michal
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Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
On 28 July 2015 at 16:33, Marek Vasut ma...@denx.de wrote:
On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
something like 25LQ32VIG in the middle.
Signed-off-by: Michal Suchanek hramr...@gmail.com
---
drivers/mtd/spi-nor/spi-nor.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index d78831b..cba3bd0 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
/* GigaDevice */
{ gd25q32, INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
+ { gd25lq32c, INFO(0xc86016, 0, 64 * 1024, 64, SECT_4K) },
{ gd25q64, INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
{ gd25q128, INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
Don't we have DT bindings, so we can use jedec,spi-nor prop for all
new SPI NORs without growing this table ?
You confused this table with the one in m25p80.c.
--
Rafał
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