On Thu, Mar 8, 2018 at 1:24 AM, Daniel Kurtz <djku...@chromium.org> wrote: > Not all x86 CPUs have UARTs that use a baud reference clock (BASE_BAUD) of > 115200 = 1843200 / 16. For example, the UARTs on AMD Carrizo and later > use a fixed input clock of 48000000, and hence require BASE_BAUD=3000000. > > The BASE_BAUD value is used by the generic earlycon driver to compute the > UART clock used early in boot before the real serial drivers have a > chance to load and read their input clock configuration from ACPI. > > Add a Kconfig option to override this default hard coded value.
This makes a deviation that prevents to have less kernels to cover most of x86 cases. Now we have the following: - x86-32 (covers i686) - x86-64 (covers x86_64) - quark (covers 1 core i586 TSC type of platforms) In almost all above cases the 1843200 is used as UART clock. (Exceptions are some of Intel MID devices) Besides that I told you already the alternatives to mitigate the issue (in order from preferable to non-preferable): - since it's ACPI based platform, provide an SPCR table (problem solved!) - fix your crap firmware to be compatible (even DT drivers are using the same clock rate!) - add a specific ->setup() callback for your crap hardware (see drivers/tty/serial/amba-pl011.c as an example) NAK. > > Signed-off-by: Daniel Kurtz <djku...@chromium.org> > --- > arch/x86/Kconfig | 9 +++++++++ > arch/x86/include/asm/serial.h | 4 ++++ > 2 files changed, 13 insertions(+) > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > index eb7f43f23521..0a258bb30159 100644 > --- a/arch/x86/Kconfig > +++ b/arch/x86/Kconfig > @@ -454,6 +454,15 @@ config INTEL_RDT > > Say N if unsure. > > +config X86_SERIAL_BASE_BAUD > + int "UART input clock for platform 8250/16550 serial ports" > + default "115200" > + help > + This specifies the default frequency for the reference clock of the > + serial ports. For many systems this is 1843200 / 16, which is the > + default, but may need to be changed to get earlycon to work on > + some hardware, such as those that use AMD Carrizo or later SoCs. > + > if X86_32 > config X86_BIGSMP > bool "Support for big SMP systems with more than 8 CPUs" > diff --git a/arch/x86/include/asm/serial.h b/arch/x86/include/asm/serial.h > index ece8299d2695..c28151090b51 100644 > --- a/arch/x86/include/asm/serial.h > +++ b/arch/x86/include/asm/serial.h > @@ -9,7 +9,11 @@ > * clock, since the 16550A is capable of handling a top speed of 1.5 > * megabits/second; but this requires a faster clock. > */ > +#ifdef CONFIG_X86_SERIAL_BASE_BAUD > +#define BASE_BAUD CONFIG_X86_SERIAL_BASE_BAUD > +#else > #define BASE_BAUD (1843200/16) > +#endif > > /* Standard COM flags (except for COM4, because of the 8514 problem) */ > #ifdef CONFIG_SERIAL_8250_DETECT_IRQ > -- > 2.16.2.395.g2e18187dfd-goog > -- With Best Regards, Andy Shevchenko
