Re: [PATCH 1/6] reset: qcom: AOSS (Always on subsystem) reset controller
Hi Trilok, Thanks for the review. I will include it in the v3 patch series. On 03/10/2018 02:59 AM, Trilok Soni wrote: Sibi, One cosmetic comment below. On 3/9/2018 6:55 AM, Sibi S wrote: + +This binding describes a reset-controller found on AOSS (Always on SubSysem) +for Qualcomm SDM845 SoCs. S/SubSysem/Subsytem Will correct it ---Trilok Soni -- Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc, is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
Re: [PATCH 1/6] reset: qcom: AOSS (Always on subsystem) reset controller
Sibi, One cosmetic comment below. On 3/9/2018 6:55 AM, Sibi S wrote: + +This binding describes a reset-controller found on AOSS (Always on SubSysem) +for Qualcomm SDM845 SoCs. S/SubSysem/Subsytem ---Trilok Soni
Re: [PATCH 1/6] reset: qcom: AOSS (Always on subsystem) reset controller
Hi Rob,
Thanks for the review, will add the changes in v3 of the patch series
On 03/08/2018 03:05 AM, Rob Herring wrote:
On Mon, Mar 05, 2018 at 03:23:28PM +0530, sibis wrote:
Add reset controller driver for Qualcomm SDM845 SoC to
control reset signals provided by AOSS for Modem, Venus
ADSP, GPU, Camera, Wireless, Display subsystem
Signed-off-by: sibis
Need a full name here.
Will correct it
---
.../devicetree/bindings/reset/qcom,aoss-reset.txt | 54
Separate patch for bindings (with the header) please.
Will make a separate patch
drivers/reset/Kconfig | 10 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-qcom-aoss.c| 151 +
include/dt-bindings/reset/qcom,aoss-sdm845.h | 17 +++
5 files changed, 233 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
create mode 100644 drivers/reset/reset-qcom-aoss.c
create mode 100644 include/dt-bindings/reset/qcom,aoss-sdm845.h
diff --git a/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
new file mode 100644
index 000..5318e14
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
@@ -0,0 +1,54 @@
+Qualcomm AOSS Reset Controller
+==
+
+This binding describes a reset-controller found on AOSS (Always on SubSysem)
+for Qualcomm SDM845 SoCs.
+
+Required properties:
+- compatible:
+ Usage: required
+ Value type:
+ Definition: must be:
+ "qcom,aoss-reset-sdm845", "syscon"
Someone in QCom needs to go fix the order of all your downstream
compatibles or review your bindings before sending upstream. The
standard ordering is ,-.
Will correct it.
Why syscon? The description is this is just a reset controller.
syscon was needed in the compatible list due to using
syscon_node_to_regmap in the reset driver but I guess
since it is just a reset controller the correct thing to do
be ioremap the reg space and do devm_regmap_init_mmio on it.
Will remove syscon.
+
+- reg:
+ Usage: required
+ Value type:
+ Definition: must specify the base address and size of the
+ syscon device.
+
+
+- #reset-cells:
+ Usage: required
+ Value type:
+ Definition: must be 1; cell entry represents the reset index.
+
+example:
+
+aoss_reset: qcom,reset-controller@b2e0100 {
+ compatible = "qcom,aoss-reset-sdm845", "syscon";
+ reg = <0xc2b 0x20004>;
+ #reset-cells = <1>;
+};
+
+
+Specifying reset lines connected to IP modules
+==
+
+Device nodes that need access to reset lines should
+specify them as a reset phandle in their corresponding node as
+specified in reset.txt.
+
+Example:
+
+ modem-pil@408 {
+ ...
+
+ resets = <&aoss_reset AOSS_CC_MSS_RESTART>;
+ reset-names = "mss_restart";
+
+ ...
+};
+
+For list of all valid reset indicies see
+
Put this before the example.
ok
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Re: [PATCH 1/6] reset: qcom: AOSS (Always on subsystem) reset controller
On Mon, Mar 05, 2018 at 03:23:28PM +0530, sibis wrote:
> Add reset controller driver for Qualcomm SDM845 SoC to
> control reset signals provided by AOSS for Modem, Venus
> ADSP, GPU, Camera, Wireless, Display subsystem
>
> Signed-off-by: sibis
Need a full name here.
> ---
> .../devicetree/bindings/reset/qcom,aoss-reset.txt | 54
Separate patch for bindings (with the header) please.
> drivers/reset/Kconfig | 10 ++
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-qcom-aoss.c| 151
> +
> include/dt-bindings/reset/qcom,aoss-sdm845.h | 17 +++
> 5 files changed, 233 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
> create mode 100644 drivers/reset/reset-qcom-aoss.c
> create mode 100644 include/dt-bindings/reset/qcom,aoss-sdm845.h
>
> diff --git a/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
> b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
> new file mode 100644
> index 000..5318e14
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
> @@ -0,0 +1,54 @@
> +Qualcomm AOSS Reset Controller
> +==
> +
> +This binding describes a reset-controller found on AOSS (Always on SubSysem)
> +for Qualcomm SDM845 SoCs.
> +
> +Required properties:
> +- compatible:
> + Usage: required
> + Value type:
> + Definition: must be:
> + "qcom,aoss-reset-sdm845", "syscon"
Someone in QCom needs to go fix the order of all your downstream
compatibles or review your bindings before sending upstream. The
standard ordering is ,-.
Why syscon? The description is this is just a reset controller.
> +
> +- reg:
> + Usage: required
> + Value type:
> + Definition: must specify the base address and size of the
> + syscon device.
> +
> +
> +- #reset-cells:
> + Usage: required
> + Value type:
> + Definition: must be 1; cell entry represents the reset index.
> +
> +example:
> +
> +aoss_reset: qcom,reset-controller@b2e0100 {
> + compatible = "qcom,aoss-reset-sdm845", "syscon";
> + reg = <0xc2b 0x20004>;
> + #reset-cells = <1>;
> +};
> +
> +
> +Specifying reset lines connected to IP modules
> +==
> +
> +Device nodes that need access to reset lines should
> +specify them as a reset phandle in their corresponding node as
> +specified in reset.txt.
> +
> +Example:
> +
> + modem-pil@408 {
> + ...
> +
> + resets = <&aoss_reset AOSS_CC_MSS_RESTART>;
> + reset-names = "mss_restart";
> +
> + ...
> +};
> +
> +For list of all valid reset indicies see
> +
Put this before the example.
Re: [PATCH 1/6] reset: qcom: AOSS (Always on subsystem) reset controller
Hi Philipp,
Thanks for the review. I will post out the v2 of the patch series.
On 03/02/2018 04:00 PM, Philipp Zabel wrote:
Hi sibis,
thank you for the patch. I have a few questions and comments below.
On Fri, 2018-03-02 at 14:53 +0530, sibis wrote:
Add reset controller driver for Qualcomm SDM845 SoC to
control reset signals provided by AOSS for Modem, Venus
ADSP, GPU, Camera, Wireless, Display subsystem
Signed-off-by: sibis
---
.../devicetree/bindings/reset/qcom,aoss-reset.txt | 54 +++
drivers/reset/Kconfig | 10 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-qcom-aoss.c| 161 +
include/dt-bindings/reset/qcom,aoss-sdm845.h | 17 +++
5 files changed, 243 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
create mode 100644 drivers/reset/reset-qcom-aoss.c
create mode 100644 include/dt-bindings/reset/qcom,aoss-sdm845.h
diff --git a/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
new file mode 100644
index 000..5318e14
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
@@ -0,0 +1,54 @@
+Qualcomm AOSS Reset Controller
+==
+
+This binding describes a reset-controller found on AOSS (Always on SubSysem)
+for Qualcomm SDM845 SoCs.
+
+Required properties:
+- compatible:
+ Usage: required
+ Value type:
+ Definition: must be:
+ "qcom,aoss-reset-sdm845", "syscon"
+
+- reg:
+ Usage: required
+ Value type:
+ Definition: must specify the base address and size of the
+ syscon device.
+
+
+- #reset-cells:
+ Usage: required
+ Value type:
+ Definition: must be 1; cell entry represents the reset index.
+
+example:
+
+aoss_reset: qcom,reset-controller@b2e0100 {
+ compatible = "qcom,aoss-reset-sdm845", "syscon";
+ reg = <0xc2b 0x20004>;
+ #reset-cells = <1>;
+};
+
+
+Specifying reset lines connected to IP modules
+==
+
+Device nodes that need access to reset lines should
+specify them as a reset phandle in their corresponding node as
+specified in reset.txt.
+
+Example:
+
+ modem-pil@408 {
+ ...
+
+ resets = <&aoss_reset AOSS_CC_MSS_RESTART>;
+ reset-names = "mss_restart";
+
+ ...
+};
+
+For list of all valid reset indicies see
+
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 7fc7769..4b1da86 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -81,6 +81,16 @@ config RESET_PISTACHIO
help
This enables the reset driver for ImgTec Pistachio SoCs.
+config RESET_QCOM_AOSS
+ bool "Qcom AOSS Reset Driver"
+ depends on ARCH_QCOM || COMPILE_TEST
Do all ARCH_QCOM have AOSS? If so, should this be enabled by default?
AOSS reset is currently supported on SDM845 SoCs and not on any of other
the previously upstreamed Qualcomm SoCs. I will change description to
convey the same. I needs to explicitly enabled for SDM845 SoCs.
+ select MFD_SYSCON
+ help
+ This enables the AOSS (Always On SubSystem) reset driver
+ for Qcom SoCs. Say Y if you want to control reset signals
Is Qcom and Qualcomm interchangeable?
Though it is used interchangeably, it will make more sense if I
change it to Qualcomm here.
+ provided by AOSS for Modem, Venus, ADSP, GPU, Camera,
+ Wireless, Display subsystem. Otherwise, say N.
+
config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST
default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI ||
ARCH_ZX
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 132c24f..c30044a 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
obj-$(CONFIG_RESET_MESON) += reset-meson.o
obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
+obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o
obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
diff --git a/drivers/reset/reset-qcom-aoss.c b/drivers/reset/reset-qcom-aoss.c
new file mode 100644
index 000..eb8c69b
--- /dev/null
+++ b/drivers/reset/reset-qcom-aoss.c
@@ -0,0 +1,161 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 The Linux Foundation. All rights reserved.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct qcom_aoss_reset_map {
+ unsigned int reg;
+ u8 bit;
+};
+
+struct qcom_aoss_desc {
+ const struct regmap_config *config;
+ const struct qcom_aoss_reset_map *
Re: [PATCH 1/6] reset: qcom: AOSS (Always on subsystem) reset controller
Hi sibis,
thank you for the patch. I have a few questions and comments below.
On Fri, 2018-03-02 at 14:53 +0530, sibis wrote:
> Add reset controller driver for Qualcomm SDM845 SoC to
> control reset signals provided by AOSS for Modem, Venus
> ADSP, GPU, Camera, Wireless, Display subsystem
>
> Signed-off-by: sibis
> ---
> .../devicetree/bindings/reset/qcom,aoss-reset.txt | 54 +++
> drivers/reset/Kconfig | 10 ++
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-qcom-aoss.c| 161
> +
> include/dt-bindings/reset/qcom,aoss-sdm845.h | 17 +++
> 5 files changed, 243 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
> create mode 100644 drivers/reset/reset-qcom-aoss.c
> create mode 100644 include/dt-bindings/reset/qcom,aoss-sdm845.h
>
> diff --git a/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
> b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
> new file mode 100644
> index 000..5318e14
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
> @@ -0,0 +1,54 @@
> +Qualcomm AOSS Reset Controller
> +==
> +
> +This binding describes a reset-controller found on AOSS (Always on SubSysem)
> +for Qualcomm SDM845 SoCs.
> +
> +Required properties:
> +- compatible:
> + Usage: required
> + Value type:
> + Definition: must be:
> + "qcom,aoss-reset-sdm845", "syscon"
> +
> +- reg:
> + Usage: required
> + Value type:
> + Definition: must specify the base address and size of the
> + syscon device.
> +
> +
> +- #reset-cells:
> + Usage: required
> + Value type:
> + Definition: must be 1; cell entry represents the reset index.
> +
> +example:
> +
> +aoss_reset: qcom,reset-controller@b2e0100 {
> + compatible = "qcom,aoss-reset-sdm845", "syscon";
> + reg = <0xc2b 0x20004>;
> + #reset-cells = <1>;
> +};
> +
> +
> +Specifying reset lines connected to IP modules
> +==
> +
> +Device nodes that need access to reset lines should
> +specify them as a reset phandle in their corresponding node as
> +specified in reset.txt.
> +
> +Example:
> +
> + modem-pil@408 {
> + ...
> +
> + resets = <&aoss_reset AOSS_CC_MSS_RESTART>;
> + reset-names = "mss_restart";
> +
> + ...
> +};
> +
> +For list of all valid reset indicies see
> +
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 7fc7769..4b1da86 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -81,6 +81,16 @@ config RESET_PISTACHIO
> help
> This enables the reset driver for ImgTec Pistachio SoCs.
>
> +config RESET_QCOM_AOSS
> + bool "Qcom AOSS Reset Driver"
> + depends on ARCH_QCOM || COMPILE_TEST
Do all ARCH_QCOM have AOSS? If so, should this be enabled by default?
> + select MFD_SYSCON
> + help
> + This enables the AOSS (Always On SubSystem) reset driver
> + for Qcom SoCs. Say Y if you want to control reset signals
Is Qcom and Qualcomm interchangeable?
> + provided by AOSS for Modem, Venus, ADSP, GPU, Camera,
> + Wireless, Display subsystem. Otherwise, say N.
> +
> config RESET_SIMPLE
> bool "Simple Reset Controller Driver" if COMPILE_TEST
> default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI ||
> ARCH_ZX
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 132c24f..c30044a 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
> obj-$(CONFIG_RESET_MESON) += reset-meson.o
> obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
> obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
> +obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o
> obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
> obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
> obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
> diff --git a/drivers/reset/reset-qcom-aoss.c b/drivers/reset/reset-qcom-aoss.c
> new file mode 100644
> index 000..eb8c69b
> --- /dev/null
> +++ b/drivers/reset/reset-qcom-aoss.c
> @@ -0,0 +1,161 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2018 The Linux Foundation. All rights reserved.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +struct qcom_aoss_reset_map {
> + unsigned int reg;
> + u8 bit;
> +};
> +
> +struct qcom_aoss_desc {
> + const struct regmap_config *config;
> + const struct qcom_aoss_reset_map *resets;
> + int delay;
> + size_t num_resets;
> +};
> +
> +struct qcom_aoss_reset_data {
> + struct reset_controller_dev rcdev;
> + struct regmap *regmap;
> + const struct qcom_aoss_desc *desc;
> +};
> +
> +static const struct
