Re: [PATCH 4/5] PCI: designware: Add setup bus-related to pcie_host_ops

2015-01-19 Thread Lorenzo Pieralisi
On Mon, Jan 19, 2015 at 01:54:26PM +, Arnd Bergmann wrote: > On Monday 19 January 2015 13:38:53 Gabriel Fernandez wrote: > > > > On 18 December 2014 at 05:58, Jingoo Han wrote: > > > > > On Thursday, December 18, 2014 7:16 AM, Arnd Bergmann wrote: > > > > On Wednesday 17 December 2014

Re: [PATCH 4/5] PCI: designware: Add setup bus-related to pcie_host_ops

2015-01-19 Thread Arnd Bergmann
On Monday 19 January 2015 13:38:53 Gabriel Fernandez wrote: > > On 18 December 2014 at 05:58, Jingoo Han wrote: > > > On Thursday, December 18, 2014 7:16 AM, Arnd Bergmann wrote: > > > On Wednesday 17 December 2014 11:34:45 Gabriel FERNANDEZ wrote: > > > > ST sti SoCs PCIe IPs are built around

Re: [PATCH 4/5] PCI: designware: Add setup bus-related to pcie_host_ops

2015-01-19 Thread Gabriel Fernandez
Hi Arnd, Jingoo, On 18 December 2014 at 05:58, Jingoo Han wrote: > On Thursday, December 18, 2014 7:16 AM, Arnd Bergmann wrote: >> On Wednesday 17 December 2014 11:34:45 Gabriel FERNANDEZ wrote: >> > ST sti SoCs PCIe IPs are built around DesignWare IP Core. >> > But in these SoCs PCIe IP doesn't

Re: [PATCH 4/5] PCI: designware: Add setup bus-related to pcie_host_ops

2015-01-19 Thread Gabriel Fernandez
Hi Arnd, Jingoo, On 18 December 2014 at 05:58, Jingoo Han jg1@samsung.com wrote: On Thursday, December 18, 2014 7:16 AM, Arnd Bergmann wrote: On Wednesday 17 December 2014 11:34:45 Gabriel FERNANDEZ wrote: ST sti SoCs PCIe IPs are built around DesignWare IP Core. But in these SoCs PCIe

Re: [PATCH 4/5] PCI: designware: Add setup bus-related to pcie_host_ops

2015-01-19 Thread Arnd Bergmann
On Monday 19 January 2015 13:38:53 Gabriel Fernandez wrote: On 18 December 2014 at 05:58, Jingoo Han jg1@samsung.com wrote: On Thursday, December 18, 2014 7:16 AM, Arnd Bergmann wrote: On Wednesday 17 December 2014 11:34:45 Gabriel FERNANDEZ wrote: ST sti SoCs PCIe IPs are built

Re: [PATCH 4/5] PCI: designware: Add setup bus-related to pcie_host_ops

2015-01-19 Thread Lorenzo Pieralisi
On Mon, Jan 19, 2015 at 01:54:26PM +, Arnd Bergmann wrote: On Monday 19 January 2015 13:38:53 Gabriel Fernandez wrote: On 18 December 2014 at 05:58, Jingoo Han jg1@samsung.com wrote: On Thursday, December 18, 2014 7:16 AM, Arnd Bergmann wrote: On Wednesday 17 December 2014

Re: [PATCH 4/5] PCI: designware: Add setup bus-related to pcie_host_ops

2014-12-17 Thread Jingoo Han
On Thursday, December 18, 2014 7:16 AM, Arnd Bergmann wrote: > On Wednesday 17 December 2014 11:34:45 Gabriel FERNANDEZ wrote: > > ST sti SoCs PCIe IPs are built around DesignWare IP Core. > > But in these SoCs PCIe IP doesn't support IO. Hi Gabriel, I cannot understand how ST sti SoCs PCIe IP

Re: [PATCH 4/5] PCI: designware: Add setup bus-related to pcie_host_ops

2014-12-17 Thread Arnd Bergmann
On Wednesday 17 December 2014 11:34:45 Gabriel FERNANDEZ wrote: > ST sti SoCs PCIe IPs are built around DesignWare IP Core. > But in these SoCs PCIe IP doesn't support IO. > > To support this, add setup_bus() to pcie_host_ops. > > Signed-off-by: Fabrice Gasnier > Signed-off-by: Gabriel

Re: [PATCH 4/5] PCI: designware: Add setup bus-related to pcie_host_ops

2014-12-17 Thread Arnd Bergmann
On Wednesday 17 December 2014 11:34:45 Gabriel FERNANDEZ wrote: ST sti SoCs PCIe IPs are built around DesignWare IP Core. But in these SoCs PCIe IP doesn't support IO. To support this, add setup_bus() to pcie_host_ops. Signed-off-by: Fabrice Gasnier fabrice.gasn...@st.com Signed-off-by:

Re: [PATCH 4/5] PCI: designware: Add setup bus-related to pcie_host_ops

2014-12-17 Thread Jingoo Han
On Thursday, December 18, 2014 7:16 AM, Arnd Bergmann wrote: On Wednesday 17 December 2014 11:34:45 Gabriel FERNANDEZ wrote: ST sti SoCs PCIe IPs are built around DesignWare IP Core. But in these SoCs PCIe IP doesn't support IO. Hi Gabriel, I cannot understand how ST sti SoCs PCIe IP does