Re: [PATCH 4/8] perf x86: Adding hardware events translations for amd cpus
On Wed, 2012-10-10 at 16:25 +0200, Jiri Olsa wrote:
> On Wed, Oct 10, 2012 at 04:11:42PM +0200, Peter Zijlstra wrote:
> > On Wed, 2012-10-10 at 14:53 +0200, Jiri Olsa wrote:
> > > +static ssize_t amd_event_sysfs_show(char *page, u64 config)
> > > +{
> > > + u64 event = (config & ARCH_PERFMON_EVENTSEL_EVENT) |
> > > + (config & AMD64_EVENTSEL_EVENT) >> 24;
> > > +
> > > + return x86_event_sysfs_show(page, config, event);
> > > +}
> >
> > You'll need to filter out 0xF<<32 bits before passing them on in
> > @config, Intel has a different meaning for them.
>
> Right, that would be those 'intx and intx_cp' bits we discussed, right?
Right.
> My thinking was to customize this once those bits are introduced and
> part of the format stuff. Until that time the x86_event_sysfs_show
> function shows proper data for both amd and intel. Or is it already
> on its way in?
No thats fine, just something we shouldn't forget about. They're in Andi
Kleen's HSW patches, I need to go over the v2 of that.
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Re: [PATCH 4/8] perf x86: Adding hardware events translations for amd cpus
On Wed, Oct 10, 2012 at 04:11:42PM +0200, Peter Zijlstra wrote:
> On Wed, 2012-10-10 at 14:53 +0200, Jiri Olsa wrote:
> > +static ssize_t amd_event_sysfs_show(char *page, u64 config)
> > +{
> > + u64 event = (config & ARCH_PERFMON_EVENTSEL_EVENT) |
> > + (config & AMD64_EVENTSEL_EVENT) >> 24;
> > +
> > + return x86_event_sysfs_show(page, config, event);
> > +}
>
> You'll need to filter out 0xF<<32 bits before passing them on in
> @config, Intel has a different meaning for them.
Right, that would be those 'intx and intx_cp' bits we discussed, right?
My thinking was to customize this once those bits are introduced and
part of the format stuff. Until that time the x86_event_sysfs_show
function shows proper data for both amd and intel. Or is it already
on its way in?
jirka
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Re: [PATCH 4/8] perf x86: Adding hardware events translations for amd cpus
On Wed, 2012-10-10 at 14:53 +0200, Jiri Olsa wrote:
> +static ssize_t amd_event_sysfs_show(char *page, u64 config)
> +{
> + u64 event = (config & ARCH_PERFMON_EVENTSEL_EVENT) |
> + (config & AMD64_EVENTSEL_EVENT) >> 24;
> +
> + return x86_event_sysfs_show(page, config, event);
> +}
You'll need to filter out 0xF<<32 bits before passing them on in
@config, Intel has a different meaning for them.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 4/8] perf x86: Adding hardware events translations for amd cpus
On Wed, 2012-10-10 at 14:53 +0200, Jiri Olsa wrote:
+static ssize_t amd_event_sysfs_show(char *page, u64 config)
+{
+ u64 event = (config ARCH_PERFMON_EVENTSEL_EVENT) |
+ (config AMD64_EVENTSEL_EVENT) 24;
+
+ return x86_event_sysfs_show(page, config, event);
+}
You'll need to filter out 0xF32 bits before passing them on in
@config, Intel has a different meaning for them.
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 4/8] perf x86: Adding hardware events translations for amd cpus
On Wed, Oct 10, 2012 at 04:11:42PM +0200, Peter Zijlstra wrote:
On Wed, 2012-10-10 at 14:53 +0200, Jiri Olsa wrote:
+static ssize_t amd_event_sysfs_show(char *page, u64 config)
+{
+ u64 event = (config ARCH_PERFMON_EVENTSEL_EVENT) |
+ (config AMD64_EVENTSEL_EVENT) 24;
+
+ return x86_event_sysfs_show(page, config, event);
+}
You'll need to filter out 0xF32 bits before passing them on in
@config, Intel has a different meaning for them.
Right, that would be those 'intx and intx_cp' bits we discussed, right?
My thinking was to customize this once those bits are introduced and
part of the format stuff. Until that time the x86_event_sysfs_show
function shows proper data for both amd and intel. Or is it already
on its way in?
jirka
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 4/8] perf x86: Adding hardware events translations for amd cpus
On Wed, 2012-10-10 at 16:25 +0200, Jiri Olsa wrote:
On Wed, Oct 10, 2012 at 04:11:42PM +0200, Peter Zijlstra wrote:
On Wed, 2012-10-10 at 14:53 +0200, Jiri Olsa wrote:
+static ssize_t amd_event_sysfs_show(char *page, u64 config)
+{
+ u64 event = (config ARCH_PERFMON_EVENTSEL_EVENT) |
+ (config AMD64_EVENTSEL_EVENT) 24;
+
+ return x86_event_sysfs_show(page, config, event);
+}
You'll need to filter out 0xF32 bits before passing them on in
@config, Intel has a different meaning for them.
Right, that would be those 'intx and intx_cp' bits we discussed, right?
Right.
My thinking was to customize this once those bits are introduced and
part of the format stuff. Until that time the x86_event_sysfs_show
function shows proper data for both amd and intel. Or is it already
on its way in?
No thats fine, just something we shouldn't forget about. They're in Andi
Kleen's HSW patches, I need to go over the v2 of that.
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
